ADL5306

ADL5306 Data Sheet (Rev. 0)

Document overview

• Manufacturer or author: Analog Devices, Inc.
• PDF pages: 16

Technical content

60 dB Range (100 nA to 100 µA) Low Cost Logarithmic Converter ADL5306 Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective companies. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 © 2003 Analog Devices, Inc. All rights reserved.

FEATURES

Optimized for fiber optic photodiode interfacing Measures current over 3 decades Law conformance 0.1 dB from 100 nA to 100 μA Single- or dual-supply operation (3 V to ±5.5 V total) Full log-ratio capabilities Temperature stable Nominal slope of 10 mV/dB (200 mV/decade) Nominal intercept of 1 nA (set by external resistor) Optional adjustment of slope and intercept Rapid response time for a given current level Miniature 16-lead chip scale package (LFCSP 3 mm × 3 mm) Low power: ~5 mA quiescent current

APPLICATIONS

Low cost optical power measurement Wide range baseband logarithmic compression Measurement of current and voltage ratios Optical absorbance measurement GENERAL DESCRIPTION The ADL5306∗ is a low cost microminiature logarithmic converter optimized for determining optical power in fiber optic systems. The ADL5306 is derived from the AD8304 and AD8305 translinear logarithmic converters. This family of devices provides wide measurement dynamic range in a versatile and easy-to-use form. A single-supply voltage between 3 V and 5.5 V is adequate; dual supplies may optionally be used. Low quiescent current (5 mA typical) permits use in battery-operated applications. I PD, the 100 nA to 100 µA input current applied to the INPT pin, is the collector current of an optimally scaled NPN transistor that converts this current to a voltage (VBE) with a precise logarithmic relationship. A second converter is used to handle the reference current, I REF, applied to IREF . These input nodes are biased slightly above ground (0.5 V). This is generally acceptable for photodiode applications where the anode does not need to be grounded. Similarly, this bias voltage is easily accounted for in generating I REF. The logarithmic front end’s output is available at VLOG. The basic logarithmic slope at this output is 200 mV/decade (10 mV/dB) nominal; a 60 dB range corresponds to a 600 mV output change. When this voltage (or the buffer output) is applied to an ADC that permits an external reference voltage to be employed, the ADL5306’s 2.5 V voltage reference output at VREF can be used to improve scaling accuracy. FUNCTIONAL BLOCK DIAGRAM TEMPERATURE COMPENSATION BIAS GENERATOR 451Ω 14.2kΩ 80kΩ 20kΩRREF 200kΩ 6.69kΩ COMM COMM COMM VNEG VSUM VPOS INPT VREF NC IREF 0.5V +5V 2.5V 0.5V VBE1 ILOG VBE2 VOUT SCAL BFIN VLOG 03727-0-001 0.2 log10 ( ) IPD 1nA 1kΩ 1kΩ 1nF 1nF 1nF VBIAS IPD Figure 1. Functional Block Diagram denominator currents are applied to INPT and IREF , respectively. rails, and its peak current-sourcing capacity is 25 mA. realize low-pass filters of up to three poles. specified for operation from–40°C to +85°C. ∗Protected by US Patent 5,519,308.

Rev. 0 | Page 2 of 16 TABLE OF CONTENTS

REVISION HISTORY

Rev. 0: Initial Version

Table 1. VP = 5 V, VN = 0, TA = 25°C, RREF = 200 kΩ, unless otherwise noted 1 Minimum and maximum specified limits on parameters that are guaranteed but not tested are six sigma values. 2 Other values of logarithmic intercept can be achieved by adjusting RREF. 3 Output noise and incremental bandwidth are functions of input current measured using the output buffer connected for GAIN = 1.

Table 2. ADL5306 Absolute Maximum Ratings

Figure 2. 16-Lead Leadframe Chip Scale Package (LFCSP) Table 3. Pin Function Descriptions

1 NC N/A

2 VREF Reference Output Voltage of 2.5 V. 3 IREF Accepts (Sinks) Reference Current IREF. 5 VSUM Guard Pin. Used to shield the INPT current line and for optional adjustment of the INPT and IREF node potential. 6, 7 VNEG Optional Negative Supply, VN. This pin is usually grounded; for details of usage, see the Applications section. 8 VPOS Positive Supply, ( VP – VN ) ≤ 11 V. 9 VLOG Output of the Logarithmic Front End. 10 BFIN Buffer Amplifier Noninverting Input. 11 SCAL Buffer Amplifier Inverting Input.

simplified schematic in Figure 21 shows the key elements. Figure 21. Simplified Schematic this voltage is not intended as a general bias source. errors at large input currents. generated externally to a recommended value of 10 µA. with a slight degradation in law conformance (see Figure 8). temperature (PTAT), and is 25.85 mV at 300 K. dependencies must be eliminated. voltage is processed by what is essentially an analog divider. voltage-mode output, VLOG, scaled 200 mV/decade.

Rev. 0 | Page 10 of 16 It is apparent that this output should be zero for IPD = IREF, and would need to swing negative for smaller values of input current. T o avoid this, IREF would need to be as small as the smallest value of IPD. In the ADL5306, an internal offset voltage is added to VLOG to shift it upward by 0.8 V . This moves the intercept to the left by four decades, from 10 µA to 1 nA: ILOG = IY log10(IPD / IINTC) ( 4 ) where IINTC is the operational / value of the intercept current. Since values of IPD < IINTC result in a negative VLOG, a negative supply of sufficient value is required to accommodate this situation (discussed later). The voltage V LOG is generated by applying ILOG to an internal resistance of 4.55 kΩ, formed by the parallel combination of a 6.69 kΩ resistor to ground and the 14.2 kΩ resistor to the internal 2.5 V reference. At the VLOG pin, the output current I LOG generates a voltage of VLOG = ILOG × 4.55 kΩ = 44 µA × 4.55 kΩ × log10 (IPD / IREF) ( 5 ) = VY log10 (IPD / IREF) where VY = 200 mV/decade or 10 mV/dB. Note that any resistive loading on VLOG will lower this slope and will result in an overall scaling uncertainty due to the variability of the on- chip resistors. Consequently, this practice is not recommended. VLOG may also swing below ground when dual supplies (VP and VN) are used. When VN = -0.5 V or more negative, the input pins INPT and IREF may be positioned at ground level simply by grounding VSUM. MANAGING INTERCEPT AND SLOPE As previously noted, the internally generated 2.5 V bias combines with the on-chip resistors to introduce an accurate offset voltage of 0.8 V at the VLOG pin, equivalent to four decades. This results in a logarithmic transfer function that can be written as V LOG = VY log10 (104 × IPD / IREF)= VY log10 (IPD / IINTC) (6) where IINTC = IREF /104 Thus, the effective intercept current, IINTC, is only one ten- thousandth of IREF, corresponding to 10 nA when using the recommended value of IREF = 100 µA. The slope can be reduced by attaching a resistor to the VLOG pin. This is strongly discouraged because the on-chip resistors will not ratio correctly to the added resistance. Also, it is rare that one would wish to lower the basic slope of 10 mV/dB; if this is necessary, it should be done at the low impedance output of the buffer, which is provided to avoid such miscalibration and allow higher slopes to be used. The ADL5306 buffer is essentially an uncommitted op amp wit h rail-to-rail output swing, good load driving capabilities, and a unity-gain bandwidth of >20 MHz. In addition to allowing the introduction of gain using standard feedback networks, thereby increasing the slope voltage, V Y, the buffer can be used to implement multipole low-pass filters, threshold detectors, and a variety of other functions. For more details, see the AD8304 Data Sheet. RESPONSE TIME AND NOISE CONSIDERATIONS The response time and output noise of the ADL5306 are fundamentally a function of the signal current IPD. For small currents, the bandwidth is proportional to IPD. The output’s low frequency voltage-noise spectral density is a function of IPD, and increases for small values of IREF. For details of noise and bandwidth performance of translinear log amps, see the AD8304 Data Sheet.

Rev. 0 | Page 11 of 16 The ADL5306 is easy to use in optical supervisory systems and in similar situations where a wide-ranging current is to be converted to its logarithmic equivalent (i.e., represented in decibel terms). Basic connections for measuring a single current input are shown in Figure 22, which includes various nonessential components, as will be explained. TEMPERATURE COMPENSATION BIAS GENERATOR 451Ω 8kΩ 12kΩ 14.2kΩ 80kΩ20kΩRREF 200kΩ 6.69kΩ COMM COMM COMM VNEG VSUM VPOS INPT VREF NC IREF 0.5V +5V 2.5V 0.5V VBE1 ILOG VBE2 VOUT SCAL BFIN VLOG 0.5 log10 ( ) IPD 1nA 1kΩ 1kΩ 1nF 1nF 1nF VBIAS IPD CFLT 10nF 03727-0-022 Figure 22. Basic Connections for Fixed Intercept Use provide a clean reference current. Figure 22 provides an overall slope of 0.5 V/dec (25 mV/dB).

2.0 V , corresponding to a dynamic range of 60 dB electrical

supplies may be employed, as illustrated in Figure 23. Figure 23. Negative Supply Application

describes the various configuration options. Table 4. Evaluation Board Configuration Options can be monitored using a high impedance probe. C10 are provided for a variety of filtering applications. lly set to 10 µA using a 200 kΩ 1% resistor.

0.60 MAX PIN 1 INDICA TOR

1.50 REF

0.25 MIN

0.65 NOM

0.05 MAX

0.01 NOM

0.20 REF

Figure 32. 16-Lead Leadframe Chip Scale Package [LFCSP] degradation or loss of functionality.

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