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Programmable Low Power Gyroscope with Temperature Compensation Preliminary Technical Data ADIS16255 Rev. PrA Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2006 Analog Devices, Inc. All rights reserved.

FEATURES

Y aw rate gyro with digital range scaling ±80°/sec, ±160°/sec, and ±320°/sec settings 14-bit digital gyroscope sensor outputs 12-bit digital temperature sensor output Calibrated sensitivity and bias Extended temperature range In-system, auto-zero for bias drift calibration Digitally controlled sample rate Digitally controlled frequency response Dual alarm settings with rate/threshold limits Embedded integration for short-term angle estimates Digitally activated self-test Digitally activated low power mode Interrupt-driven wake-up SPI®-compatible serial interface

52 Hz Sensor Bandwidth

Auxiliary 12-bit ADC input and 12-bit DAC output Auxiliary digital input/output Single-supply operation: 4.75 V to 5.25 V 2000 g powered shock survivability

APPLICATIONS

Platform control and stabilization Motion control and analysis Avionics instrumentation Navigation Image stabilization Robotics FUNCTIONAL BLOCK DIAGRAM SCLK DIN DOUT CS RST DIO0 DIO1 SPI PORT TEMPERATURE SENSOR SELF-TEST POWER MANAGEMENT AUXILIARY I/OALARM DIGITAL CONTROL SIGNAL CONDITIONING AND CONVERSION CALIBRATION AND DIGITAL PROCESSING ADIS16250 VCC FILT RATE COM AUX ADC AUX DAC VREF 06070-001 GYROSCOPE SENSOR Figure 1. GENERAL DESCRIPTION The ADIS16255 is a complete, angular rate measurement system available in a single compact package enabled by Analog Devices iSensor™ integration. By enhancing Analog Devices iMEMS® sensor technology with an embedded signal processing solution, the ADIS16255 provides factory calibrated and tunable digital sensor data in a convenient format that can be accessed using a simple SPI serial interface. The ADIS16255 provides calibration over an extended temperature range. The SPI interface provides access to measurements for the gyroscope, temperature, power supply, and one auxiliary analog input. Easy access to calibrated digital sensor data provides developers with a system-ready device, reducing development time, cost, and program risk. The device range can be digitally selected from three different settings: ±80°/sec, ±160°/sec, and ±320°/sec. Unique characteristics of the end system are accommodated easily through several built-in features, including a single-command auto-zero recalibration function, as well as configurable sample rate and frequency response. Additional features can be used to further reduce system complexity, including:

  • Configurable alarm function
  • Auxiliary 12-bit ADC and DAC
  • Two configurable digital I/O ports
  • Digital self-test function. System power dissipation can be optimized via the ADIS16255 power management features, including an interrupt-driven wake-up. The ADIS16255 is available in an 11 mm × 11 mm × 5.5 mm, laminate-based land grid array (LGA) package with a temperature range of −40°C to +85°C.

ADIS16255 Preliminary Technical Data Rev. PrA | Page 2 of 20 TABLE OF CONTENTS

REVISION HISTORY

10/06—Revision PrA: Pre-release

Preliminary Technical Data ADIS16255 Rev. PrA | Page 3 of 20 SPECIFICATIONS TA = −40°C to +85°C, VCC = 5.0 V , angular rate = 0°/sec, ±1 g, ±320°/sec range setting, unless otherwise noted. Table 1. Parameter Conditions Min Typ Max Unit SENSITIVITY Clockwise rotation is positive output Initial 25°C, dynamic range = ±320°/sec 1 0.07326 degrees/sec/LSB 25°C, dynamic range = ±160°/sec 0.03663 degrees/sec/LSB 25°C, dynamic range = ±80°/sec 0.01832 degrees/sec/LSB Tolerance 25°C, dynamic range = ±320°/sec −1 +1 % Nonlinearity Best fit straight line 0.1 % of FS BIAS In Run Bias Stability 25°C, 1 σ 0.016 degrees/sec Turn on—Turn on Bias Stability 25°C, 1 σ 0.035 degrees/sec Angular Random Walk 25°C, 1 σ 3.6 o/√hr Linear Acceleration Effect Any axis 0.2 degrees/sec / g Voltage Sensitivity V CC = 4.75 V to 5.25 V 1.0 degrees/sec/V NOISE PERFORMANCE Output Noise At 25°C, ±320°/sec dynamic range, no filtering TBD degrees/sec rms At 25°C, ±160°/sec dynamic range, minimum four tap filter setting TBD degrees/sec rms At 25°C, ±80°/sec dynamic range, minimum 16 tap filter setting TBD degrees/sec rms Rate Noise Density At 25°C, f = 25 Hz, no average 0.05 degrees/sec/√Hz rms FREQUENCY RESPONSE 3 dB Bandwidth See Analog Bandwidth section for adjustment 52 Hz Sensor Resonant Frequency 14 kHz Turn-on Time Power on from SLEEP mode to ±2 degrees/sec of final, no averaging, minimum sample period TBD ms SELF-TEST STATE Change for positive stimulus Relative to output prior to self test 439 721 1092 LSB Change for negative stimulus Relative to output prior to self test −439 −721 −1092 LSB TEMPERATURE SENSOR Output at 25°C 0 LSB Scale Factor 6.88 LSB/°C ADC INPUT Resolution 12 Bits Integral Nonlinearity ±2 LSB Differential Nonlinearity ±1 LSB Offset Error ±4 LSB Gain Error ±2 LSB Input Range 0 2.5 V Input Capacitance During acquisition 20 pF ON-CHIP VOLTAGE REFERENCE 2.5 V Accuracy At 25°C −10 +10 mV Reference Temperature Coefficient ±40 ppm/ oK Output Impedance 70 Ω

ADIS16255 Preliminary Technical Data Rev. PrA | Page 4 of 20 DAC OUTPUT 5 kΩ/100 pF to GND Resolution 12 Bits Relative Accuracy For Code 101 to Code 4095 4 LSB Differential Nonlinearity 1 LSB Offset Error ±5 mV Gain Error ±0.5 % Output Range 0 to 2.5 V Output Impedance 2 Ω Output Settling Time 10 μs LOGIC INPUTS Input High Voltage, VINH 2.0 V Input Low Voltage, VINL 0.8 V For CS signal when used to wake up from SLEEP mode 0.55 V Logic 1 Input Current, IINH V IH = 3.3 V ±0.2 ±10 μA Logic 0 Input Current, IINL V IL = 0 V 40 60 μA Logic 0 Output Current (RST )2 1 mA Input Capacitance, CIN 10 pF DIGITAL OUTPUTS Output High Voltage, VOH I SOURCE = 1.6 mA 2.4 V Output Low Voltage, VOL I SINK = 1.6 mA 0.4 V SLEEP TIMER Timeout Period3 0.5 128 Sec FLASH MEMORY Endurance4 20,000 Cycles Data Retention5 T J = 55°C 20 Years CONVERSION RATE Minimum Conversion Time 3.906 ms Maximum Conversion Time 7.75 Sec Maximum Throughput Rate 256 SPS Minimum Throughput Rate 0.129 SPS POWER SUPPLY Operating Voltage Range VCC 4.75 5.0 5.25 V Power Supply Current Normal mode at 25°C 15 19 mA Fast mode at 25°C 41 48 mA Sleep mode at 25°C 500 750 μA 1 The sensor is capable of +600 °/sec but the specifications herein are for +320°/sec only.

2 The RST pin has an internal pull-up

3 Guaranteed by design. 4 Endurance is qualified as per JEDEC Standard 22 Method A117 and measured at −40°C, +25°C, +85°C, and +125°C. 5 Retention lifetime equivalent at junction temperature (TJ) 55°C as per JEDEC Standard 22 Method A117. Retention lifetime decreases with junction temperature.

TA = −40°C to +85°C, VCC = 5.0 V , unless otherwise noted. 1 Guaranteed by design, typical specifications are not tested or guaranteed. 2 Based upon sample rate selection.

3 This number can be used to calculate tSTALL number in Figure 2

Figure 2. SPI Chip Select Timing Figure 3. SPI Timing

1 Extended exposure to temperatures outside of the specified temperature

Figure 4. RATE OUT Level Increase with Clockwise Rotation Increase degradation or loss of functionality.

Figure 5. Pin Configuration Table 4. Pin Function Descriptions 4 CS I SPI, Chip Select, Active Low. 5, 6 DIO0, DIO1 I/O Multifunction Digital Input/Output Pin. 7 RST I Reset, Active Low. This resets the sensor signal conditioning circuit and initiates a start-up sequence. 12 AUX DAC O Auxiliary DAC Analog Output Voltage. 13 AUX ADC I Auxiliary ADC Analog Input Voltage. 14 RATE O Analog Rate Signal Output (uncalibrated). Analog Bandwidth section for more details. 16, 17 V CC S 5.0 V Power Supply. 18, 19 COM S Common. Reference point for all circuitry in the ADIS16255. 20 V REF O Precision Reference Output. 1 S = supply; O = output; I = input.

0.500 BSC 2×

9.673 BSC 20×

0.773 BSC 16×

0.973 BSC 4×

Figure 6. Recommended Pad Layout

Table 5. Register Bit Map registers are updated with new data, the ND bit goes to a 1 state. D13 bit and the D12 bit are assigned “don’t care” status. Table 6. Data Output Register Information Table 7. Output Coding Example, GYRO_OUT2, 3 1 Assumes that the scaling is set to 320°/sec. 2 Two MSBs have been masked off and are not considered in the coding. 3 Nominal sensitivity and zero offset null performance are assumed.

Figure 16. Example Read Cycle

  • Calibration
  • Global commands
  • Operational Control
  • Sample rate
  • Power management
  • Digital filtering
  • Dynamic range
  • DAC output
  • Digital I/O
  • Operational Status and Diagnostics
  • Self test
  • Status conditions
  • Alarms CONTROL REGISTER ACCESS Table 8 displays the control register map for the ADIS16255, including address, volatile status, basic function, and accessibility (read/write). The following sections contain detailed descriptions and configurations for each of these registers. The ADIS16255 is a flash-based device with the nonvolatile functional registers implemented as flash registers. Take into account the endurance limitation of 20,000 writes when considering the system-level integration of these devices. The ENDURANCE register (see Table 30) maintains a flash memory write count, which provides a tool for keeping track of this limit. The nonvolatile column in Table 8 indicates the registers that are recovered on power-up. The user must use a manual flash update command (using the command register) to store the nonvolatile data registers once they are configured properly. When performing a manual flash update command, the user needs to ensure that the power supply remains within limits for a minimum of 50 ms after the start of the update. This ensures a successful write of the nonvolatile data.

Table 8. Control Register Mapping

1 The contents of the upper byte are non-volatile and the contents of the lower byte are volatile

options are described in the Global Commands section. scale factor through the system calibration process. Table 9. GYRO_OFF Register Definition 1 Scale is the weight of each LSB. Table 10. GYRO_OFF Bit Designations Table 11. GYRO_SCALE Register Definition 1 Scale is the weight of each LSB. 2 Equates to a scale factor of one.. Table 12. GYRO_SCALE Bit Designations ADIS16255, and other MEMS gyroscopes. and then exercise this option. Table 13. COMMAND Register Definition Table 14. COMMAND Bit Descriptions

7 Software reset command

3 Manual FLASH update command

2 Auxiliary DAC data latch

1 Factory Calibration Restore command

0 Auto null command

the contents of this register are nonvolatile. Table 15. SMPL_PRD Register Definition Table 16. SMPL_PRD Bit Descriptions the SPI SCLK can run at a rate up to 1 MHz. The sample rate setting also affects the power dissipation. (sample rate, serial transfer rate) and power dissipation. SLP_CNT register shuts the device down for the specified time. kept high to maintain sleep mode. Table 17. SLP_CNT Register Definition 1 Scale is the weight of each LSB. Table 18. SLP_CNT Bit Designations equation offers a frequency response relationship for this filter. Figure 17. Bartlett Window FIR Frequency Response

the resolution as the maximum rate measurements decrease. register is (1) dynamic range and then (2) filtering response. The contents of the SENS/AVG register are nonvolatile. Table 19. SENS/AVG Register Definition Table 20. SENS/AVG Bit Description The auxiliary DAC provides a 12-bit level adjustment function. offers a rail-to-rail buffered output that has a range of 0 V to 2.5 V . set after every reset and power cycle event. Table 21. AUX_DAC Register Definition Table 22. AUX_DAC Bit Descriptions Table 23. GPIO_CTRL Register Definition Table 24. GPIO_CTRL Bit Descriptions

9 General purpose I/O line 0, data direction control

8 General purpose I/O line 1, data direction control

1 General purpose I/O line 0 polarity

0 General purpose I/O line 1 polarity

along with their appropriate control registers. Table 25. Status and Diagnostic Functions

(DIO0 and DIO1) as a data-ready indicator signal. Table 26. MSC_CTRL Register Definition Table 27. MSC_CTRL Bit Descriptions 10 Internal self-test enable: 1 = enabled, 0 = disabled.

9 External negative rota tion self-test enable

8 External positive rota tion self-test enable

2 Data-ready enable: 1 = enabled, 0 = disabled

1 Data-ready polarity: 1 = active high, 0 = active low

0 Data-ready line select:1 = DIO1, 0 = DIO0

the result by reading Bit 5 of the STATUS register. reflects an exponential response with a time constant of 2 ms. appropriate register access and bit assignment for each flag. STATUS register require a read in order to return them to zero. Note that a STATUS register read clears all of the bits to 0. Table 28. STATUS Register Definition Table 29. STATUS Bit Descriptions

9 Alarm 2 status: 1 = active, 0 = inactive

8 Alarm 1 status: 1 = active, 0 = inactive

5 Self-test diagnostic error flag

4 Angular rate over range

3 SPI communications failure

2 Control register update failed

Table 30. ENDURANCE Register Definition

  • All output data registers are available for monitoring as the source data
  • The source data can be filtered or unfiltered
  • Comparisons can be static or dynamic (rate of change)
  • The threshold levels and times are configurable
  • Comparison can be greater than or less than The ALM_MAG1 register and ALM_MAG2 register establish the threshold level for detecting events. They take on the format of the source data and provide a bit for establishing the greater than/less than comparison direction. When making dynamic comparisons, the ALM_SMPL1 register and the ALM_SMPL2 register establish the number of averages taken for the source data as a reference for comparison. In this configuration, each subsequent source data sample is subtracted from the previous one, establishing an instantaneous delta.

Table 31. ALM_MAG1 Register Definition Alarm 1. The contents of this register are nonvolatile. Table 32. ALM_MAG1 Bit Designations

15 Comparison polarity: 1 = greater than, 0 = less than

14 Not used

Table 33. ALM_SMPL1 Register Definition Table 34. ALM_SMPL1 Bit Designations Table 35. ALM_MAG2 Register Definition Table 36. ALM_MAG2 Bit Designations Table 37. ALM_SMPL2 Register Definition Table 38. ALM_SMPL2 Bit Designations Table 39. ALM_CTRL Register Definition Table 40. ALM_CTRL Bit Designations

15 Rate of change (ROC) enable for alarm 2

000 Disable

001 Power supply output

010 Gyroscope output

011 Inactive

100 Inactive

101 Auxiliary ADC output

110 Temperature sensor output

111 Inactive

11 Rate of change (ROC) enable for alarm 1

4 Filtered data comparison

3 Not used

2 Alarm output enable

1 Alarm output polarity

0 Alarm output line select

1.000 BSC

20 PLACES

0.900 BSC

16 PLACES

0.373 BSC

2 PLACES

Figure 18. 20-Terminal Land Grid Array [LGA]

ADIS16255 Preliminary Technical Data ©2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the prop erty of their respective owners. PR06462-0-10/06(PrA) NOTES