ADG901/ADG902 (Rev. D)
Document overview
- Manufacturer or author: Analog Devices, Inc.
- PDF pages: 13
Technical content
Rev. D | Page 2 of 13 TABLE OF CONTENTS
REVISION HISTORY
11/2017—Rev. C to Rev. D Changes to Features Section, Figure 1, General Description 5/2016—Rev. B to Rev. C 10/2005—Rev. A to Rev. B 10/2004—Rev. 0 to Rev. A 8/2003—Revision 0: Initial Version
Rev. D | Page 3 of 13 SPECIFICATIONS VDD = 1.65 V to 2.75 V , GND = 0 V , input power = 0 dBm, all specifications TMIN to TMAX, unless otherwise specified.1 Table 1. B Version Parameter Symbol Test Conditions/Comments Min Typ2 Max Unit AC ELECTRICAL CHARACTERISTICS Operating Frequency3 DC 2.5 GHz −3 dB Frequency 4.5 GHz Input Power 0 V dc bias 7 dBm
0.5 V dc bias 16 dBm
Insertion Loss S21, S12 DC to 100 MHz; VDD = 2.5 V ± 10% 0.4 0.7 dB 500 MHz; VDD = 2.5 V ± 10% 0.5 0.8 dB 1000 MHz; VDD = 2.5 V ± 10% 0.8 1.25 dB Isolation—RF1 to RF2 S21, S12 100 MHz 60 61 dB
1000 MHz 34 40 dB
Isolation—RF1 to RF2 S21, S12 100 MHz 51 60 dB
1000 MHz 31 37 dB
Return Loss (On Channel) S11, S22 DC to 100 MHz 20 28 dB
500 MHz 23 29 dB
1000 MHz 25 28 dB
Return Loss (Off Channel) S11, S22 DC to 100 MHz 18 23 dB
500 MHz 17 21 dB
1000 MHz 15 19 dB
On Switching Time tON 50% CTRL to 90% RF 3.6 6 ns Off Switching Time tOFF 50% CTRL to 10% RF 5.8 9.5 ns Rise Time tRISE 10% to 90% RF 3.1 5.5 ns Fall Time tFALL 90% to 10% RF 6.0 8.5 ns 1 dB Compression P1dB 1000 MHz 17 dBm Third-Order Intermodulation Intercept IP3 900 MHz/901 MHz, 4 dBm 28.5 36 dBm Video Feedthrough4 2.5 mV p-p DC ELECTRICAL CHARACTERISTICS Input High Voltage VINH VDD = 2.25 V to 2.75 V 1.7 V VINH VDD = 1.65 V to 1.95 V 0.65 VDD V Input Low Voltage VINL VDD = 2.25 V to 2.75 V 0.7 V VINL VDD = 1.65 V to 1.95 V 0.35 VDD V Input Leakage Current II 0 ≤ VIN ≤ 2.75 V ±0.1 ±1 µA CAPACITANCE RF1/RF2, RF Port On Capacitance CRF on f = 1 MHz 1.2 pF CTRL Input Capacitance CCTRL f = 1 MHz 2.1 pF POWER REQUIREMENTS VDD 1.65 2.75 V Quiescent Power Supply Current IDD Digital inputs = 0 V or VDD 0.1 1 µA 1 Temperature range for B version: −40°C to +85°C. 2 Typical values are at VDD = 2.5 V and 25°C, unless otherwise specified. 3 Point at which insertion loss degrades by 1 dB. 4 The dc transience at the output of any port of the switch when the control voltage is switched from high to low or low to high in a 50 Ω test setup, measured with 1 ns rise time pulses and 500 MHz bandwidth.
Rev. D | Page 4 of 13 CONTINOUS CURRENT PER CHANNEL Table 2. Parameter 25°C 85°C 105°C 125°C Unit Test Conditions/Comments CONTINUOUS CURRENT PER CHANNEL 8-Lead LFCSP θJA = 48°C/W, dc bias = 0.5 V VDD = 2.75 V, VSS = 0 V 70 7 3.85 2.8 mA maximum VDD = 1.65 V, VSS = 0 V 56 7 3.85 2.1 mA maximum 8-lead MSOP θJA = 206°C/W, dc bias = 0.5 V VDD = 2.75 V, VSS = 0 V 51.1 7 3.85 2.8 mA maximum VDD = 1.65 V, VSS = 0 V 39.9 7 3.85 2.1 mA maximum
Rev. D | Page 5 of 13 ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise specified. Table 3. Parameter Rating VDD to GND −0.5 V to +4 V Inputs to GND −0.5 V to VDD + 0.3 V1 Continuous Current Data2 + 15% Input Power3 18 dBm Operating Temperature Range Industrial (B Version) −40°C to +85°C Storage Temperature Range −65°C to +150°C Junction Temperature 150°C θJA Thermal Impedance 2-Layer Board 84°C/W 4-Layer Board 48°C/W Lead Temperature, Soldering (10 sec) 300°C IR Reflow, Peak Temperature (<20 sec) 235°C ESD 1 kV 1 RF1/RF2 off port inputs to ground: −0.5 V to VDD – 0.5 V. 2 See Table 2. 3 Input power is tested with switch in both open and close position. Power is applied on RFx, while RFC is terminated to a 50 Ω resistor to GND. Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. ESD CAUTION
- THE LFCSP PACKAGE HAS AN EXPOSED
Figure 4. 8-Lead LFCSP Pin Configuration Figure 5. 8-Lead MSOP Pin Configuration Table 4. Pin Function Descriptions 1 V DD Power Supply Input. These devices can be operated from 1.65 V to 2.75 V; decouple V DD to GND. 2 CTRL CMOS or LVTTL Logic Level. CTRL input must not exceed V DD. Logic 0: RF1 isolated from RF2. 3, 5, 6, 7 GND Ground Reference Point for All Circuitry on the Device. EPAD Exposed Pad. The LFCSP package ha s an exposed pad. The exposed pad must be tied to the substrate, GND. Table 5. Truth Table
0 RF1 isolated from RF2
1 RF1 to RF2
Rev. D | Page 9 of 13 TERMINOLOGY VDD Most positive power supply potential. IDD Positive supply current. GND Ground (0 V) reference. CTRL Logic control input. VINL Maximum input voltage for Logic 0. VINH Minimum input voltage for Logic 1. I INL (IINH) Input current of the digital input. C IN Digital input capacitance. tON Delay between applying the digital control input and the output switching on. tOFF Delay between applying the digital control input and the output switching off. tRISE Rise time. Time for the RF signal to rise from 10% to 90% of the on level. tFALL Fall time. Time for the RF signal to fall from 90% to 10% of the on level. Off Isolation The attenuation between input and output ports of the switch when the switch control voltage is in the off condition. Insertion Loss The attenuation between input and output ports of the switch when the switch control voltage is in the on condition. P1dB 1 dB compression point. The RF input power level at which the switch insertion loss increases by 1 dB over its low level value. It is a measure of how much power the on switch can handle before the insertion loss increases by 1 dB. IP3 Third-order intermodulation intercept. This is a measure of the power in false tones that occur when closely spaced tones are passed through a switch, whereby the nonlinearity of the switch causes these false tones to be generated. Return Loss The amount of reflected power relative to the incident power at a port. Large return loss indicates good matching. By measuring return loss the voltage standing wave ratio VSWR can be calculated from conversion charts. The VSWR indicates the degree of matching present at a switch RF port. Video Feedthrough The spurious signals present at the RF ports of the switch when the control voltage is switched from high to low or low to high without an RF signal present.
Rev. D | Page 11 of 13 APPLICATIONS INFORMATION The ADG901/ADG902 are ideal solutions for low power, high frequency applications. The low insertion loss, high isolation between ports, low distortion, and low current consumption of these parts make them excellent solutions for many high frequency switching applications. Applications include switching between high frequency filters, ASK generators, and FSK generators. ABSORPTIVE vs. REFLECTIVE SWITCHES The ADG901 is an absorptive (matched) switch with 50 Ω terminated shunt legs and the ADG902 is a reflective switch with 0 Ω terminated shunts to ground. The ADG901 absorptive switch has a good VSWR on each port, regardless of the switch mode. Use an absorptive switch when there is a need for a good VSWR that is looking into the port but not passing the through signal to the common port. The ADG901 is therefore ideal for applications that require minimum reflections back to the RF source. It also ensures that the maximum power is transferred to the load. The ADG902 reflective switch is suitable for applications where high off port VSWR does not matter and the switch has some other desired performance feature. It can be used in many applications, including high speed filter selection. In most cases, an absorptive switch can be used instead of a reflective switch, but not vice versa.
dielectric constant of 4.3 and an overall thickness of 0.062 inches. Figure 24. ADG901/ADG902 Evaluation Board Top View
0.65 BSC
1.10 MAX
Figure 25. 8-Lead Mini Small Outline Package [MSOP]
0.203 REF
0.05 MAX
0.02 NOM
Figure 26. 8-Lead Lead Frame Chip Scale Package [LFCSP] registered trademarks are the prop erty of their respective owners.