ADG859 AD | Alldatasheet
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Technical content
1.3 Ω CMOS, 1.8 V to 5.5 V Single SPDT Switch/2:1 MUX in SOT-66 Package ADG859 Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent ri ghts of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 © 2005 Analog Devices, Inc. All rights reserved.
FEATURES
1.8 V to 5.5 V single supply Tiny 1.65 mm × 1.65 mm package Low on resistance: 1.3 Ω at 5 V supply High current-carrying capability 300 mA continuous current 500 mA peak current at 5 V Rail-to-rail operation Typical power consumption: <0.01 μW TTL/CMOS-compatible inputs
APPLICATIONS
Audio and video signal routing Modems PCMCIA cards Hard drives Relay replacement FUNCTIONAL BLOCK DIAGRAM 05258-001 SWITCHES SHOWN FOR A LOGIC 1 INPUT ADG859 D IN Figure 1. GENERAL DESCRIPTION The ADG859 is a monolithic, CMOS SPDT (single pole, double throw) switch that operates with a supply range of 1.8 V to 5.5 V . It is designed to offer low on resistance of 2.3 Ω maxi- mum over the entire temperature range of −40°C to +125°C. The ADG859 also has the capability of carrying large amounts of current, typically 300 mA at 5 V operation. These features make the ADG859 an ideal solution for applications that are space-constrained, such as handsets, PDAs, and MP3 players. Each switch conducts equally well in both directions when on. The device exhibits break-before-make switching action, thereby preventing momentary shorting when switching channels. The ADG859 is available in a tiny 6-lead SOT-66 package. PRODUCT HIGHLIGHTS 1. Low on resistance: 2.3 Ω maximum over the full temperature range of −40°C to +125°C. 2. High current-carrying capability. 3. Tiny 6-lead, 1.65 mm × 1.65 mm SOT-66 package.
Rev. 0 | Page 2 of 16 TABLE OF CONTENTS
REVISION HISTORY
6/05—Revision 0: Initial Version
Rev. 0 | Page 4 of 16 VDD = 2.7 V to 3.6 V , GND = 0 V , unless otherwise noted.1 Table 2. Parameter 25°C −40°C to +85°C −40°C to +125°C Unit Test Conditions/Comments ANALOG SWITCH Analog Signal Range 0 V to VDD V On Resistance, RON 3 Ω typ VDD = 2.7 V, VS = 0 V to VDD, IS = −100 mA; 4.3 4.5 4.7 Ω max Figure 16 On Resistance Match Between Channels, ∆RON 0.03 Ω typ VDD = 2.7 V, VS = 1.2 V, IS = −100 mA; ∆RON 0.11 0.15 0.15 Ω max Figure 16 LEAKAGE CURRENTS VDD = 3.6 V Source Off Leakage, IS (Off) ±0.02 nA typ VS = 3 V/1 V, VD = 1 V/3 V; Figure 17 Channel On Leakage, ID, IS (On) ±0.05 nA typ VS = VD = 1 V or 3 V; Figure 18 DIGITAL INPUTS Input High Voltage, VINH 2.0 V min Input Low Voltage, VINL 0.8 V max VDD = 3 V to 3.6 V 0.7 V max VDD = 2.7 V Input Current, IINL or IIN 0.005 μA typ VIN = VINL or VINH ±0.1 ±0.1 μA max Digital Input Capacitance, CIN 4 pF typ DYNAMIC CHARACTERISTICS2 tON 11 ns typ RL = 50 Ω, CL = 35 pF 15 16 17 ns max VS = 1.5 V; Figure 19 tOFF 6 ns typ RL = 50 Ω, CL = 35 pF 9.5 10 11 ns max VS = 1.5 V; Figure 19 Break-Before-Make Time Delay, tBBM 5 ns typ RL = 50 Ω, CL = 35 pF 1 ns min VS1 = VS2 = 1.5 V; Figure 20 Charge Injection ±7 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF; Figure 21 Off Isolation −78 dB typ RL = 50 Ω, CL = 5 pF, f = 100 kHz; Figure 22 Channel-to-Channel Crosstalk −78 dB typ S1 to S2; RL = 50 Ω, CL = 5 pF, f = 100 kHz; Figure 23 −3 dB Bandwidth 125 MHz typ RL = 50 Ω, CL = 5 pF; Figure 24 Insertion Loss −0.11 dB typ RL = 50 Ω, CL = 5 pF; Figure 24 Total Harmonic Distortion (THD + N) 0.1 % RL = 32 Ω, f = 20 Hz to 20 kHz, VS = 2 V p-p; Figure 14 CS (Off) 18 pF typ f = 1 MHz CD, CS (On) 46 pF typ f = 1 MHz POWER REQUIREMENTS VDD = 3.6 V IDD 0.001 1 μA typ μA max Digital inputs = 0 V or 3.6 V 1 Temperature range is −40°C to +125°C. 2 Guaranteed by design; not subject to production test.
TA = 25°C, unless otherwise noted.
5 V Operation 500 mA
3 V Operation 460 mA
5 V Operation 300 mA
3 V Operation 275 mA
limited to the maximum ratings given. Table 4. Truth Table
0 Off On
1 On Off
degradation or loss of functionality.
Figure 2. 6-Lead SOT-66 Pin Configuration Table 5. Pin Function Descriptions 2 VDD Most Positive Power Supply Potential. 3 GND Ground (0 V) Reference. 4 S1 Source Terminal. Can be an input or an output. 5 D Drain Terminal. Can be an input or an output. 6 S2 Source Terminal. Can be an input or an output.
Figure 15. PSRR
Rev. 0 | Page 12 of 16 TERMINOLOGY VDD Most positive power supply potential. IDD Positive supply current. GND Ground (0 V) reference. S Source terminal. Can be an input or an output. D Drain terminal. Can be an input or an output. IN Logic control input. VD (VS) Analog voltage on the D and S terminals. RON Ohmic resistance between the D and S terminals. RFLAT (ON) Flatness is defined as the difference between the maximum and minimum value of on resistance as measured. ΔRON On resistance mismatch between any two channels. IS (Off) Source leakage current with the switch off. ID (Off) Drain leakage current with the switch off. ID, IS (On) Channel leakage current with the switch on. VINL Maximum input voltage for Logic 0. VINH Minimum input voltage for Logic 1. IINL (IINH) Input current of the digital input. CS (Off) Off switch source capacitance. Measured with reference to ground. CD (Off) Off switch drain capacitance. Measured with reference to ground. CD, CS (On) On switch capacitance. Measured with reference to ground. CIN Digital input capacitance. tON Delay time between the 50% and 90% points of the digital input and switch on condition. tOFF Delay time between the 50% and 90% points of the digital input and switch off condition. tBBM On or off time measured between the 80% points of both switches when switching from one to another. Charge Injection A measure of the glitch impulse transferred from the digital input to the analog output during on/off switching. Off Isolation A measure of unwanted signal coupling through an off switch. Crosstalk A measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance. −3 dB Bandwidth The frequency at which the output is attenuated by 3 dB. On Response The frequency response of the on switch. Insertion Loss The loss due to the on resistance of the switch. THD + N The ratio of harmonic amplitudes plus noise of a signal to the fundamental.
0.34 MAX
0.27 NOM
0.10 NOM
0.05 MIN
0.20 MIN
0.25 MAX
0.17 MIN
Figure 25. 6-Lead Small Outline Transistor Package [SOT-66] 1 Branding on this package is limited to two characters due to space constraints.
Rev. 0 | Page 14 of 16 NOTES
Rev. 0 | Page 15 of 16 NOTES
Rev. 0 | Page 16 of 16 NOTES © 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the prop erty of their respective owners. D05258–0–6/05(0)