ADG811 AD | Alldatasheet

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<0.5 Ω CMOS 1.65 V to 3.6 V Quad SPST Switches ADG811/ADG812/ADG813 Rev. A Information furn ished by An alog D evices is believed to be accurate and reliable. However, n o resp onsibility is assume d b y A nalog De vices fo r its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or p atent rights of Analog De vices. Trademarks an d registered trademarks are the property of their respective owners. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved.

FEATURES

0.5 Ω typ on resistance 0.8 Ω max on resistance at 125°C 1.65 V to 3.6 V operation Automotive temperature range: –40°C to +125°C High current carrying capability: 300 mA continuous Rail-to-rail switching operation Fast switching times: <25 ns Typical power consumption < 0.1 µW

APPLICATIONS

Audio and video signal routing Communications systems FUNCTIONAL BLOCK DIAGRAMS IN1 IN2 IN3 IN4 ADG811 SWITCHES SHOWN FOR A LOGIC 1 INPUT IN1 IN2 IN3 IN4 ADG812 IN1 IN2 IN3 IN4 ADG813 04306-A-001 Figure 1. GENERAL DESCRIPTION The ADG811, ADG812, and ADG813 are low voltage CMOS devices containing four independently selectable switches. These switches offer ultralow on resistance of less than 0.8 Ω over the full temperature range. The digital inputs can handle 1.8 V logic with a 2.7 V to 3.6 V supply. These devices contain four independent single-pole/single- throw (SPST) switches. The ADG811 and ADG812 differ only in that the digital control logic is inverted. The ADG811 switches are turned on with a logic low on the appropriate control input, while a logic high is required to turn on the switches of the ADG812. The ADG813 contains two switches whose digital control logic is similar to the ADG811, while the logic is inverted on the other two switches. Each switch conducts equally well in both directions when on and has an input signal range that extends to the supplies. The ADG813 exhibits break-before-make switching action. The ADG811, ADG812, and ADG813 are fully specified for 3.3 V, 2.5 V, and 1.8 V supply operation. They are available in a 16-lead TSSOP package. PRODUCT HIGHLIGHTS 1. <0.8 Ω over full temperature range of –40°C to +125°C. 2. Single 1.65 V to 3.6 V operation. 3. Operational with 1.8 V CMOS logic. 4. High current handling capability (300 mA continuous current at 3.3 V). 5. Low THD+N (0.02% typ).

Rev. A | Page 2 of 16 TABLE OF CONTENTS

REVISION HISTORY

5/04—Data Sheet Changed from Rev. 0 to Rev. A 11/03—Revision 0: Initial Version

Table 4. TA = 25°C, unless otherwise noted

3.3 V Operation 500 mA

2.5 V Operation 460 mA

1.8 V Operation 420 mA

3.3 V Operation 300 mA

2.5 V Operation 275 mA

1.8 V Operation 250 mA

limited to the maximum ratings given. Table 5. ADG811/ADG812 Truth Table Table 6. ADG813 Truth Table

0 Off On

1 On Off

degradation or loss of functionality.

Table 7. Terminology VDD Most positive power supply potential. IDD Positive supply current. S Source terminal. May be an input or output. D Drain terminal. May be an input or output. VD, VS Analog voltage on Terminals D, S. RON Ohmic resistance between D and S. specified analog signal range. ∆RON On resistance match between any two channels, i.e., RON max – RON min. IS (OFF) Source leakage current with the switch off. ID (OFF) Drain leakage current with the switch off. ID, IS (ON) Channel leakage current with the switch on. VINL Maximum input voltage for Logic 0. VINH Minimum input voltage for Logic 1. IINL (IINH) Input current of the digital input. CS (OFF) Off switch source capacitance. Measured with reference to ground. CD (OFF) Off switch drain capacitance. Measured with reference to ground. CD, CS (ON) On switch capacitance. Measured with reference to ground. CIN Digital input capacitance. tON Delay time between the 50% and the 90% points of the digital input and switch on condition. tOFF Delay time between the 50% and the 90% points of the digital input and switch off condition. tBBM On or off time measured between the 80% points of both switches, when switching from one to another. Charge Injection A measure of the glitch impulse transferred from the digital input to the analog output during on-to-off switching. Off Isolation A measure of unwanted signal coupling through an off switch. Crosstalk A measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance. –3 dB Bandwidth The frequency at which the output is attenuated by 3 dB. On Response The frequency response of the on switch. Insertion Loss The loss due to the on resistance of the switch. THD + N The ratio of the harmonic amplitudes plus noise of a signal to the fundamental.

Figure 27. 16-Lead Thin Shrink Small Outline Package [TSSOP]

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Rev. A | Page 16 of 16 NOTES © 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the prop erty of their respective owners. C04306–0–5/04(A)