ADG811YRUZ AD | Alldatasheet
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<0.5 Ω CMOS, 1.65 V to 3.6 V, Quad SPST Switches ADG811/ADG812/ADG813 Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2003–2009 Analog Devices, Inc. All rights reserved.
FEATURES
0.5 Ω typical on resistance 0.8 Ω maximum on resistance at 125°C 1.65 V to 3.6 V operation Automotive temperature range: −40°C to +125°C High current carrying capability: 300 mA continuous Rail-to-rail switching operation Fast switching times: <25 ns Typical power consumption <0.1 μW
APPLICATIONS
Audio and video signal routing Communications systems GENERAL DESCRIPTION The ADG811/ADG812/ADG813 are low voltage CMOS devices containing four independently selectable switches. These switches offer ultralow on resistance of less than 0.8 Ω over the full temperature range. The digital inputs can handle 1.8 V logic with a 2.7 V to 3.6 V supply. These devices contain four independent single-pole/single- throw (SPST) switches. The ADG811 and ADG812 differ only in that the digital control logic is inverted. The ADG811 switches are turned on with a logic low on the appropriate control input, while a logic high is required to turn on the switches of the ADG812. The ADG813 contains two switches whose digital control logic is similar to the ADG811, while the logic is inverted on the other two switches. Each switch conducts equally well in both directions when on and has an input signal range that extends to the supplies. The ADG813 exhibits break-before-make switching action. The ADG811/ADG812/ADG813 are fully specified for 3.3 V , 2.5 V , and 1.8 V supply operation. The ADG811 is available in a 16-lead TSSOP package and a 16-lead LFCSP package, and the ADG812/ADG813 are available in a 16-lead TSSOP package. FUNCTIONAL BLOCK DIAGRAMS IN1 IN2 IN3 IN4 ADG811 SWITCHES SHOWN FOR A LOGIC 1 INPUT IN1 IN2 IN3 IN4 ADG812 IN1 IN2 IN3 IN4 ADG813 04306-A-001 Figure 1. PRODUCT HIGHLIGHTS 1. <0.8 Ω over full temperature range of −40°C to +125°C. 2. Single 1.65 V to 3.6 V operation. 3. Operational with 1.8 V CMOS logic. 4. High current handling capability (300 mA continuous current at 3.3 V). 5. Low THD + N (0.02% typical). 6. Small 3 mm × 3 mm LFCSP package and 16-lead TSSOP package.
Rev. B | Page 2 of 16 TABLE OF CONTENTS
REVISION HISTORY
11/09—Rev. A to Rev. B Changes to Pin Configurations and Function Description 5/04—Rev. 0 to Rev. A 11/03—Revision 0: Initial Version
Rev. B | Page 3 of 16 SPECIFICATIONS VDD = 2.7 V to 3.6 V , GND = 0 V , unless otherwise noted. Temperature range for the Y version is −40°C to +125°C. Table 1. Parameter +25°C −40°C to +85°C −40°C to +125°C Unit Test Conditions/Comments ANALOG SWITCH Analog Signal Range 0 V to VDD V On Resistance, RON 0.5 Ω typ VDD = 2.7 V, VS = 0 V to VDD, IS = 10 mA; see Figure 19 0.65 0.75 0.8 Ω max On Resistance Match Between Channels, ΔRON 0.04 Ω typ VDD = 2.7 V, VS = 0.5 V, IS = 10 mA 0.075 0.08 Ω max On Resistance Flatness, RFLAT (ON) 0.1 Ω typ VDD = 2.7 V, VS = 0 V to VDD, IS = 10 mA 0.15 0.16 Ω max LEAKAGE CURRENTS VDD = 3.6 V see Figure 20 ±1 ±8 ±80 nA max see Figure 20 ±1 ±8 ±80 nA max Channel On Leakage, ID, IS (On) ±0.2 nA typ VS = VD = 0.6 V or 3.3 V; see Figure 21 ±1 ±15 ±90 nA max DIGITAL INPUTS Input High Voltage, VINH 2 V min Input Low Voltage, VINL 0.8 V max Input Current, IINL or IINH 0.005 μA typ VIN = VINL or VINH ±0.1 μA max CIN, Digital Input Capacitance 6 pF typ DYNAMIC CHARACTERISTICS1 tON 21 ns typ RL = 50 Ω, CL = 35 pF 25 26 28 ns max VS = 1.5 V/0 V; see Figure 22 tOFF 4 ns typ RL = 50 Ω, CL = 35 pF 5 6 7 ns max VS = 1.5 V; see Figure 22 Break-Before-Make Time Delay, tBBM (ADG813 Only) 17 ns typ RL = 50 Ω, CL = 35 pF 5 ns min VS1 = VS2 = 1.5 V; see Figure 23 Charge Injection 30 pC typ VS = 1.5 V, RS = 0 Ω, CL = 1 nF; see Figure 24 Off Isolation −67 dB typ RL = 50 Ω, CL = 5 pF, f = 100 kHz; see Figure 25 Channel-to-Channel Crosstalk −90 dB typ RL = 50 Ω, CL = 5 pF, f = 100 kHz; see Figure 27 Total Harmonic Distortion (THD + N) 0.02 % RL = 32 Ω, f = 20 Hz to 20 kHz, VS = 2 V p-p Insertion Loss −0.05 dB typ RL = 50 Ω, CL = 5 pF, f = 100 kHz −3 dB Bandwidth 90 MHz typ RL = 50 Ω, CL = 5 pF; see Figure 26 CS (Off ) 30 pF typ CD (Off ) 35 pF typ CD, CS (On) 60 pF typ POWER REQUIREMENTS VDD = 3.6 V IDD 0.003 μA typ Digital inputs = 0 V or 3.6 V 1.0 4 μA max 1 Guaranteed by design, but not subject to production test.
Rev. B | Page 4 of 16 VDD = 2.5 V ± 0.2 V , GND = 0 V , unless otherwise noted. Temperature range for the Y version is −40°C to +125°C. Table 2. Parameter +25°C −40°C to +85°C −40°C to +125°C Unit Test Conditions/Comments ANALOG SWITCH Analog Signal Range 0 V to VDD V On Resistance, RON 0.65 Ω typ VDD = 2.3 V, VS = 0 V to VDD, IS = 10 mA; see Figure 19 0.72 0.8 0.88 Ω max On Resistance Match Between Channels, ΔRON 0.04 Ω typ VDD = 2.3 V, VS = 0.55 V, IS = 10 mA 0.08 0.085 Ω max On Resistance Flatness, RFLAT (ON) 0.16 Ω typ VDD = 2.3 V, VS = 0 V to VDD, IS = 10 mA 0.23 0.24 Ω max LEAKAGE CURRENTS VDD = 2.7 V see Figure 20 ±1 ±6 ±35 nA max see Figure 20 ±1 ±6 ±35 nA max Channel On Leakage, ID, IS (On) ±0.2 nA typ VS = VD = 0.6 V or 2.4 V; see Figure 21 ±1 ±11 ±70 nA max DIGITAL INPUTS Input High Voltage, VINH 1.7 V min Input Low Voltage, VINL 0.7 V max Input Current, IINL or IINH 0.005 μA typ VIN = VINL or VINH ±0.1 μA max CIN, Digital Input Capacitance 6 pF typ DYNAMIC CHARACTERISTICS1 tON 22 ns typ RL = 50 Ω, CL = 35 pF 27 29 30 ns max VS = 1.5 V/ 0 V; see Figure 22 tOFF 4 ns typ RL = 50 Ω, CL = 35 pF 6 7 8 ns max VS = 1.5 V; see Figure 22 Break-Before-Make Time Delay, tBBM (ADG813 Only) 18 ns typ RL = 50 Ω, CL = 35 pF 5 ns min VS1 = VS2 = 1.5 V; see Figure 23 Charge Injection 25 pC typ VS = 1.25 V, RS = 0 Ω, CL = 1 nF; see Figure 24 Off Isolation −67 dB typ RL = 50 Ω, CL = 5 pF, f = 100 kHz; see Figure 25 Channel-to-Channel Crosstalk −90 dB typ RL = 50 Ω, CL = 5 pF, f = 100 kHz; see Figure 27 Total Harmonic Distortion (THD + N) 0.022 % RL = 32 Ω, f = 20 Hz to 20 kHz, VS = 1.5 V p-p Insertion Loss −0.06 dB typ RL = 50 Ω, CL = 5 pF, f = 100 kHz −3 dB Bandwidth 90 MHz typ RL = 50 Ω, CL = 5 pF; see Figure 26 CS (Off ) 32 pF typ CD (Off ) 37 pF typ CD, CS (On) 60 pF typ POWER REQUIREMENTS VDD = 2.7 V IDD 0.003 μA typ Digital inputs = 0 V or 2.7 V 1.0 4 μA max 1 Guaranteed by design, but not subject to production test.
Rev. B | Page 5 of 16 VDD = 1.65 V to 1.95 V , GND = 0 V , unless otherwise noted. Temperature range for the Y version is −40°C to +125°C. Table 3. Parameter +25°C −40°C to +85°C −40°C to +125°C Unit Test Conditions/Comments ANALOG SWITCH Analog Signal Range 0 V to VDD V On Resistance, RON 1 Ω typ VDD = 1.8 V, VS = 0 V to VDD, IS = 10 mA; see Figure 19 1.4 2.2 2.2 Ω max 2.5 4 4 Ω max VDD = 1.65 V, VS = 0 V to VDD, IS = 10 mA On Resistance Match Between Channels, ΔRON 0.1 Ω typ VDD = 1.65 V, VS = 0.7 V, IS = 10 mA LEAKAGE CURRENTS VDD = 1.95 V see Figure 20 ±1 ±5 ±30 nA max see Figure 20 ±1 ±5 ±30 nA max Channel On Leakage ID, IS (On) ±0.2 nA typ VS = VD = 0.6 V or 1.65 V; see Figure 21 ±1 ±9 ±60 nA max DIGITAL INPUTS Input High Voltage, VINH 0.65VDD V min Input Low Voltage, VINL 0.35VDD V max Input Current, IINL or IINH 0.005 μA typ VIN = VINL or VINH ±0.1 μA max CIN, Digital Input Capacitance 6 pF typ DYNAMIC CHARACTERISTICS1 tON 27 ns typ RL = 50 Ω, CL = 35 pF 35 36 37 ns max VS = 1.5 V/ 0 V; see Figure 22 tOFF 6 ns typ RL = 50 Ω, CL = 35 pF 8 9 10 ns max VS = 1.5 V; see Figure 22 Break-Before-Make Time Delay, tBBM (ADG813 Only) 20 ns typ RL = 50 Ω, CL = 35 pF 5 ns min VS1 = VS2 = 1 V; see Figure 23 Charge Injection 15 pC typ VS = 1 V, RS = 0 Ω, CL = 1 nF; see Figure 24 Off Isolation −67 dB typ RL = 50 Ω, CL = 5 pF, f = 100 kHz; Figure 25 Channel-to-Channel Crosstalk −90 dB typ RL = 50 Ω, CL = 5 pF, f = 100 kHz; see Figure 27 Total Harmonic Distortion (THD + N) 0.14 % RL = 32 Ω, f = 20 Hz to 20 kHz, VS = 1.2 V p-p Insertion Loss −0.08 dB typ RL = 50 Ω, CL = 5 pF, f = 100 kHz –3 dB Bandwidth 90 MHz typ RL = 50 Ω, CL = 5 pF; see Figure 26 CS (Off ) 32 pF typ CD (Off ) 38 pF typ CD, CS (On) 60 pF typ POWER REQUIREMENTS VDD = 1.95 V IDD 0.003 μA typ Digital inputs = 0 V or 1.95 V 1.0 4 μA max 1 Guaranteed by design, but not subject to production test.
TA = 25°C, unless otherwise noted.
3.3 V Operation 500 mA
2.5 V Operation 460 mA
1.8 V Operation 420 mA
3.3 V Operation 300 mA
2.5 V Operation 275 mA
1.8 V Operation 250 mA
limited to the maximum ratings given. Table 5. ADG811/ADG812 Truth Table Table 6. ADG813 Truth Table
0 Off On
1 On Off
Figure 2. ADG811/ADG812/ADG813 Pin Configuration (16-Lead TSSOP) Table 7. ADG811/ADG812/ADG813 Pin Configuration 5 GND Ground (0 V) reference. 13 VDD Most Positive Power Supply Potential.
- CONNECT EXPOSED PAD TO GND.
11 VDD
Figure 3. ADG811 Pin Configuration (16-Lead LFCSP) Table 8. ADG811 Pin Configuration 3 GND Ground (0 V) Reference. 11 VDD Most Positive Power Supply Potential. EPAD Connect exposed pad to GND.
Rev. B | Page 13 of 16 TERMINOLOGY IDD Positive supply current. VD, VS Analog voltage on T erminal D, T erminal S. R ON Ohmic resistance between D and S. R FLAT (ON) Flatness is defined as the difference between the maximum and minimum value of on resistance as measured over the specified analog signal range. ΔRON On resistance match between any two channels, that is, RON maximum − RON minimum. IS (Off) Source leakage current with the switch off. ID (Off) Drain leakage current with the switch off. I D, IS (On) Channel leakage current with the switch on. VINL Maximum input voltage for Logic 0. V INH Minimum input voltage for Logic 1. I INL (IINH) Input current of the digital input. CS (Off) Off switch source capacitance. Measured with reference to ground. CD (Off) Off switch drain capacitance. Measured with reference to ground. CD, CS (On) On switch capacitance. Measured with reference to ground. CIN Digital input capacitance. t ON Delay time between the 50% and the 90% points of the digital input and switch on condition. tOFF Delay time between the 50% and the 90% points of the digital input and switch off condition. tBBM On or off time measured between the 80% points of both switches, when switching from one to another. Charge Injection A measure of the glitch impulse transferred from the digital input to the analog output during on-to-off switching. Off Isolation A measure of unwanted signal coupling through an off switch. Crosstalk A measure of unwanted signal that is coupled through from one channel to another because of parasitic capacitance. −3 dB Bandwidth The frequency at which the output is attenuated by 3 dB. On Response The frequency response of the on switch. Insertion Loss The loss due to the on resistance of the switch. THD + N The ratio of the harmonic amplitudes plus noise of a signal to the fundamental.
Figure 28. 16-Lead Thin Shrink Small Outline Package [TSSOP]
0.60 MAX PIN 1
1.50 REF
0.25 MIN
0.65 TYP
0.05 MAX
0.02 NOM
0.20 REF
EXCEPT FOR EXPOSED PAD DIMENSION. Figure 29. 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
Rev. B | Page 15 of 16 ORDERING GUIDE Model Temperature Range Package Description Package Option ADG811YRU –40°C to +125°C 16-Lead Thin Shrink Small Outline [TSSOP] RU-16 ADG811YRU-REEL –40°C to +125°C 16-Lead Thin Shrink Small Outline [TSSOP] RU-16 ADG811YRU-REEL7 –40°C to +125°C 16-Lead Thin Shrink Small Outline [TSSOP] RU-16 ADG811YRUZ1 –40°C to +125°C 16-Lead Thin Shrink Small Outline [TSSOP] RU-16 ADG811YCPZ-REEL1 –40°C to +125°C 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ] CP-16-2 ADG811YCPZ-REEL71 –40°C to +125°C 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ] CP-16-2 ADG812YRU –40°C to +125°C 16-Lead Thin Shrink Small Outline [TSSOP] RU-16 ADG812YRU-REEL –40°C to +125°C 16-Lead Thin Shrink Small Outline [TSSOP] RU-16 ADG812YRU-REEL7 –40°C to +125°C 16-Lead Thin Shrink Small Outline [TSSOP] RU-16 ADG812YRUZ1 –40°C to +125°C 16-Lead Thin Shrink Small Outline [TSSOP] RU-16 ADG812YRUZ-REEL71 –40°C to +125°C 16-Lead Thin Shrink Small Outline [TSSOP] RU-16 ADG813YRU –40°C to +125°C 16-Lead Thin Shrink Small Outline [TSSOP] RU-16 ADG813YRU-REEL –40°C to +125°C 16-Lead Thin Shrink Small Outline [TSSOP] RU-16 ADG813YRU-REEL7 –40°C to +125°C 16-Lead Thin Shrink Small Outline [TSSOP] RU-16 ADG813YRUZ1 –40°C to +125°C 16-Lead Thin Shrink Small Outline [TSSOP] RU-16 1 Z = RoHS Compliant Part.
Rev. B | Page 16 of 16 NOTES ©2003–2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the prop erty of their respective owners. D04306-0-11/09(B)