ADG702BRJ-REEL7

ADG702BRMZ AD | Alldatasheet

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Rev. C | Page 2 of 12 TABLE OF CONTENTS

REVISION HISTORY

7/06—Rev. B to Rev. C Added Pb-Free Reflow Soldering to Absolute Maximum Ratings .. 5 6/04—Rev. A to Rev. B 8/98—Rev. 0 to Rev. A

Rev. C | Page 3 of 12 SPECIFICATIONS VDD = 5 V ± 10%, GND = 0 V . Temperature range for B version is −40°C to +85°C, unless otherwise noted. Table 2. B Version Parameter +25°C –40°C to +85°C Unit Test Conditions/Comments ANALOG SWITCH Analog Signal Range 0 V to VDD V On Resistance (RON) 2 Ω typ VS = 0 V to VDD, IS = –10 mA; Figure 11 3 4 Ω max On Resistance Flatness (RFLAT(ON)) 0.5 Ω typ VS = 0 V to VDD, IS = –10 mA 1.0 Ω max LEAKAGE CURRENTS VDD = 5.5 V Source OFF Leakage, IS (OFF) ±0.01 nA typ VS = 4.5 V/1 V, VD = 1 V/4.5 V; Figure 12 Drain OFF Leakage, ID (OFF) ±0.01 nA typ VS = 4.5 V/1 V, VD = 1 V/4.5 V; Figure 12 Channel ON Leakage, ID, IS (ON) ±0.01 nA typ VS = VD = 1 V, or 4.5 V; Figure 13 DIGITAL INPUTS Input High Voltage, VINH 2.4 V min Input Low Voltage, VINL 0.8 V max Input Current IINL or IINH 0.005 μA typ VIN = VINL or VINH ±0.1 μA max DYNAMIC CHARACTERISTICS1 tON 12 ns typ RL = 300 Ω, CL = 35 pF 18 ns max VS = 3 V; Figure 14 tOFF 8 ns typ RL = 300 Ω, CL = 35 pF 12 ns max VS = 3 V; Figure 14 Charge Injection 5 pC typ VS = 2 V, RS = 0 Ω, CL = 1 nF; Figure 15 Off Isolation –55 dB typ RL = 50 Ω, CL = 5 pF, f = 10 MHz –75 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; Figure 16 Bandwidth –3 dB 200 MHz typ RL = 50 Ω, CL = 5 pF; Figure 17 CS (OFF) 17 pF typ CD (OFF) 17 pF typ CD, CS (ON) 38 pF typ POWER REQUIREMENTS VDD = 5.5 V Digital inputs = 0 V or 5 V IDD 0.001 μA typ 1.0 μA max 1 Guaranteed by design, not subject to production test.

Rev. C | Page 4 of 12 VDD = 3 V ± 10%, GND = 0 V . Temperature range for B version is −40°C to +85°C, unless otherwise noted. Table 3. B Version Parameter +25°C −40°C to +85°C Unit Test Conditions/Comments ANALOG SWITCH Analog Signal Range 0 V to VDD V On Resistance (RON) 3.5 Ω typ VS = 0 V to VDD, IS = −10 mA; Figure 11 5 6 Ω max On Resistance Flatness (RFLAT(ON)) 1.5 Ω typ VS = 0 V to VDD, IS = −10 mA LEAKAGE CURRENTS VDD = 3.3 V Source OFF Leakage IS (OFF) ±0.01 nA typ VS = 3 V/1 V, VD = 1 V/3 V; Figure 12 Drain OFF Leakage ID (OFF) ±0.01 nA typ VS = 3 V/1 V, VD = 1 V/3 V; Figure 12 Channel ON Leakage ID, IS (ON) ±0.01 nA typ V = VD = 1 V, or 3 V; Figure 13 DIGITAL INPUTS Input High Voltage, VINH 2.0 V min Input Low Voltage, VINL 0.4 V max Input Current IINL or IINH 0.005 μA typ VIN = VINL or VINH ±0.1 μA max DYNAMIC CHARACTERISTICS1 tON 14 ns typ RL = 300 Ω, CL = 35 pF 20 ns max VS = 2 V, Figure 14 tOFF 8 ns typ RL = 300 Ω, CL = 35 pF 13 ns max VS = 2 V, Figure 14 Charge Injection 4 pC typ VS = 1.5 V, RS = 0 Ω, CL = 1 nF; Figure 15 Off Isolation −55 dB typ RL = 50 Ω, CL = 5 pF, f = 10 MHz −75 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; Figure 16 Bandwidth −3 dB 200 MHz typ RL = 50 Ω, CL = 5 pF; Figure 17 CS (OFF) 17 pF typ CD (OFF) 17 pF typ CD, CS (ON) 38 pF typ POWER REQUIREMENTS VDD = 3.3 V Digital inputs = 0 V or 3 V IDD 0.001 μA typ 1.0 μA max 1 Guaranteed by design, not subject to production test.

TA = +25°C, unless otherwise noted. limited to the maximum ratings given. Table 5. Truth Table degradation or loss of functionality.

Figure 2. 8-Lead MSOP Figure 3. 6-Lead SOT-23 Figure 4. 5-Lead SOT-23 Table 6. Pin Descriptions 1 1 1 D Drain Terminal. Can be an input or output. 4 6 5 VDD Most Positive Power Supply Potential. 6 4 4 IN Logic Control Input. 7 3 3 GND Ground (0 V) Reference. 8 2 2 S Source Terminal. Can be an input or output.

Rev. C | Page 8 of 12 TERMINOLOGY Table 7. Term Description RON Ohmic resistance between D and S. RFLAT(ON) Flatness is defined as the difference between the maximum and minimum value of on resistance as measured over the specified analog signal range. IS (OFF) Source leakage current with the switch off. ID (OFF) Drain leakage current with the switch off. ID, IS (ON) Channel leakage current with the switch on. VD (VS) Analog voltage on terminals D and S. CS (OFF) Off switch source capacitance. CD (OFF) Off switch drain capacitance. CD, CS (ON) On switch capacitance. tON Delay between applying the digital control input and the output switching on. See Figure 14. tOFF Delay between applying the digital control input and the output switching off. Off Isolation A measure of unwanted signal coupling through an off switch. Charge Injection A measure of the glitch impulse transferred from the digital input to the analog output during switching. Bandwidth The frequency at which the output is attenuated by −3 dB. On Response The frequency response of the on switch. On Loss The voltage drop across the on switch seen in Figure 10 as the number of decibels that the signal is from 0 dB at very low frequencies.

bandwidth, low power consumption, and low leakage currents.

5.5 V single supply, making the parts ideal for battery-powered

important design parameters. Performance Characteristics and the Specifications sections. performance of CMOS switches (a box surrounds the switch). affecting feedthrough, crosstalk, and system bandwidth. Figure 18. Switch Represented by Equivalent Parasitic Components where CT = CLOAD + CD + CDS. ADG702 can be seen in Figure 10. Figure 19. Off Isolation Is Affected by External Load Resistance and

0.65 BSC

1.10 MAX

Figure 20. 8-Lead Mini Small Outline Package [MSOP]

2.90 BSC

0.95 BSC

0.15 MAX

0.90 SEATING

1.45 MAX

Figure 21. 6-Lead Small Outline Transistor Package [SOT-23]

0.15 MAX SEATING

Figure 22. 5-Lead Small Outline Transistor Package [SOT-23] 1 Z = Pb-free part, # denotes lead-free product, may be top or bottom marked. registered trademarks are the property of their respective owners.