ADG602BRMZ

ADG602BRTZ-REEL AD | Alldatasheet

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2 Ω, CMOS, ±5 V/+5 V SPST Switches ADG601/ADG602 Rev. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2001–2007 Analog Devices, Inc. All rights reserved.

FEATURES

Low on resistance, 2.5 Ω maximum <0.65 Ω on-resistance flatness Dual ±2.7 V to ±5.5 V or single +2.7 V to +5.5 V supplies Rail-to-rail input signal range Tiny, 6-lead SOT-23; 8-lead MSOP; and 820 μm × 2255 μm die Low power consumption TTL-/CMOS-compatible inputs

APPLICATIONS

1. SWITCHES SHOWN FOR A LOGIC 0 INPUT. 02619-001 Figure 1.

Table 1. Truth Table signal range extending to the supply rails.

1. Low on resistance (2 Ω typical)
2. Tiny, 6-lead SOT-23; 8-lead MSOP; and 820 μm × 2255 μm die
3. Rail-to-rail input signal range

Rev. C | Page 2 of 12 TABLE OF CONTENTS

REVISION HISTORY

3/07—Rev. B to Rev. C 3/06—Rev. A to Rev. B 6/03—Rev. 0 to Rev. A

Rev. C | Page 3 of 12 SPECIFICATIONS DUAL SUPPLY VDD = 5 V ± 10%, VSS = –5 V ± 10%, GND = 0 V , unless otherwise noted. Table 2. B Version1 Parameter +25°C −40°C to +85°C Unit Test Conditions/Comments ANALOG SWITCH Analog Signal Range VSS to VDD V VDD = +4.5 V, VSS = –4.5 V On Resistance (RON) 2 Ω typ VS = ±4.5 V, IDS = −10 mA; see Figure 15 2.5 5.5 Ω max On-Resistance Flatness (RFLAT (ON)) 0.35 0.4 Ω typ VS = ±3.3 V, IDS = −10 mA 0.6 0.65 Ω max LEAKAGE CURRENTS VDD = +5.5 V, VSS = −5.5 V ±0.25 ±1 nA max ±0.25 ±1 nA max Channel On Leakage, ID, IS (On) ±0.01 nA typ VS = VD = +4.5 V or −4.5 V; see Figure 17 ±0.25 ±1 nA max DIGITAL INPUTS Input High Voltage, VINH 2.4 V min Input Low Voltage, VINL 0.8 V max Input Current, IINL or IINH 0.005 μA typ VIN = VINL or VINH ±0.1 μA max Digital Input Capacitance, CIN 2 pF typ DYNAMIC CHARACTERISTICS2 tON 80 ns typ RL = 300 Ω, CL = 35 pF 120 155 ns max VS = 3.3 V; see Figure 18 tOFF 45 ns typ RL = 300 Ω, CL = 35 pF 75 90 ns max VS = 3.3 V; see Figure 18 Charge Injection 250 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 19 Off Isolation −60 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 20 Bandwidth −3 dB 180 MHz typ RL = 50 Ω, CL = 5 pF; see Figure 21 CS (Off ) 50 pF typ f = 1 MHz CD (Off ) 50 pF typ f = 1 MHz CD, CS (On) 145 pF typ f = 1 MHz POWER REQUIREMENTS VDD = +5.5 V, VSS = −5.5 V IDD 0.001 μA typ Digital inputs = 0 V or 5.5 V 1.0 μA max ISS 0.001 μA typ Digital inputs = 0 V or 5.5 V 1.0 μA max 1 Temperature range for B version is −40°C to +85°C. 2 Guaranteed by design, not subject to production test.

Rev. C | Page 4 of 12 SINGLE SUPPLY VDD = 5 V ± 10%, VSS = 0 V , GND = 0 V , unless otherwise noted. Table 3. B Version1 Parameter +25°C −40°C to +85°C Unit Test Conditions/Comments ANALOG SWITCH Analog Signal Range 0 V to VDD V VDD = 4.5 V On Resistance (RON) 3.5 Ω typ VS = 0 V to 4.5 V, IDS = −10 mA; see Figure 15 5 8 Ω max On-Resistance Flatness (RFLAT (ON)) 0.2 0.2 Ω typ VS = 1.5 V to 3.3 V, IDS = –10 mA 0.6 Ω max LEAKAGE CURRENTS VDD = 5.5 V Source Off Leakage, IS (Off ) ±0.01 nA typ VS = 4.5 V/1 V, VD = 1 V/4.5 V; see Figure 16 ±0.25 ±1 nA max Drain Off Leakage, ID (Off ) ±0.01 nA typ VS = 4.5 V/1 V, VD = 1 V/4.5 V; see Figure 16 ±0.25 ±1 nA max Channel On Leakage, ID, IS (On) ±0.01 nA typ VS = VD = 4.5 V or 1 V; see Figure 17 ±0.25 ±1 nA max DIGITAL INPUTS Input High Voltage, VINH 2.4 V min Input Low Voltage, VINL 0.8 V max Input Current, IINL or IINH 0.005 μA typ VIN = VINL or VINH ±0.1 μA max Digital Input Capacitance, CIN 2 pF typ DYNAMIC CHARACTERISTICS2 tON 110 ns typ RL = 300 Ω, CL = 35 pF 220 280 ns max VS = 3.3 V; see Figure 18 tOFF 50 ns typ RL = 300 Ω, CL = 35 pF 80 110 ns max VS = 3.3 V; see Figure 18 Charge Injection 20 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 19 Off Isolation −60 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 20 Bandwidth –3 dB 180 MHz typ RL = 50 Ω, CL = 5 pF; see Figure 21 CS (Off ) 50 pF typ f = 1 MHz CD (Off ) 50 pF typ f = 1 MHz CD, CS (On) 145 pF typ f = 1 MHz POWER REQUIREMENTS VDD = 5.5 V IDD 0.001 μA typ Digital inputs = 0 V or 5.5 V 1.0 μA max 1 Temperature range for B version is −40°C to +85°C. 2 Guaranteed by design, not subject to production test.

Rev. C | Page 5 of 12 ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Table 4. Parameter Rating VDD to VSS 13 V VDD to GND −0.3 V to +6.5 V VSS to GND +0.3 V to –6.5 V Analog Inputs1 VSS − 0.3 V to VDD + 0.3 V Digital Inputs1 −0.3 V to VDD + 0.3 V or 30 mA (whichever occurs first) Continuous Current, S or D 100 mA Peak Current, S or D (Pulsed at 1 ms, 10% Duty Cycle Max) 200 mA Operating Temperature Range Industrial (B Version) −40°C to +85°C Storage Temperature Range −65°C to +150°C Junction Temperature 150°C Thermal Resistance MSOP θJA 206°C/W θJC 44°C/W SOT-23 θJA 229.6°C/W θJC 91.99°C/W Lead Temperature, Soldering (10 sec) 300°C IR Reflow, Peak Temperature 220°C 1 Overvoltages at IN, S, or D are clamped by internal diodes. Current should be limited to the maximum ratings given. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at a time. ESD CAUTION

Figure 2. 6-Lead SOT-23 (RJ-6) Figure 3. 8-Lead MSOP (RM-8) Figure 4. Die (820 μm × 2255 μm) Table 5. Pin Function Descriptions 1 4 VDD Most Positive Power Supply Potential. 2 8 S Source Terminal. Can be an input or output. 3 5 VSS Most Negative Power Supply Potential. 4 7 GND Ground (0 V) Reference. 5 1 D Drain Terminal. Can be an input or output. Table 6. Die Pad Coordinates1 8 −265 −787 VDD Most Positive Power Supply Potential. 9 +265 −767 VSS Most Negative Power Supply Potential. 10 +265 −429 IN Logic Control Input. 11 +265 −289 GND Ground (0 V) Reference. 14 +265 +661 NC Source Terminal. Can be an input or output. 1 Measured from the center of the die. 2 Bond the D pads together to a single point to preserve the on resistance and current handling capability. The common point acts as the drain pin of the switch. 3 Bond the S pads together to a single point to preserve the on resistance and current handling capability. The common point acts as the source pin of the switch.

Rev. C | Page 9 of 12 TERMINOLOGY VDD Most positive power supply potential. VSS Most negative power supply potential. IDD Positive supply current. ISS Negative supply current. GND Ground (0 V) reference. S Source terminal. Can be an input or an output. D Drain terminal. Can be an input or an output. IN Logic control input. VD, VS Analog voltage on Terminal D and Terminal S. RON Ohmic resistance between Terminal D and Terminal S. RFLAT (ON) Flatness is defined as the difference between the maximum and minimum values of on resistance as measured over the specified analog signal range. IS (Off) Source leakage current with the switch off. ID (Off) Drain leakage current with the switch off. ID, IS (On) Channel leakage current with the switch on. VINL Maximum input voltage for Logic 0. VINH Minimum input voltage for Logic 1. IINL (IINH) Input current of the digital input. CS (Off) Off switch source capacitance. Measured with reference to ground. CD (Off) Off switch drain capacitance. Measured with reference to ground. CD, CS (On) On switch capacitance. Measured with reference to ground. CIN Digital input capacitance. tON Delay between applying the digital control input and the output switching on. tOFF Delay between applying the digital control input and the output switching off. Charge Injection A measure of the glitch impulse transferred from the digital input to the analog output during switching. Off Isolation A measure of unwanted signal coupling through an off switch. On Response Frequency response of the on switch. Insertion Loss Loss due to the on resistance of the switch.

0.65 BSC

1.10 MAX

Figure 22. 8-Lead Mini Small Outline Package [MSOP]

2.90 BSC

0.95 BSC

0.15 MAX

0.90 SEATING

1.45 MAX

Figure 23. 6-Lead Small Outline Transistor Package [SOT-23] 1 Branding on SOT-23 and MSOP is limited to three characters due to space constraints. 2 Z = RoHS Compliant Part, # denotes RoHS compliant product, may be top or bottom marked.

Rev. C | Page 12 of 12 NOTES ©2001–2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D02619-0-3/07(C)