ADG507ATE

ADG507AKRUZ AD | Alldatasheet

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REV. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. a ADG506A/ADG507A Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 1998 CMOS 8-/16-Channel Analog Multiplexers FUNCTIONAL BLOCK DIAGRAM

FEATURES

44 V Supply Maximum Rating

V SS to V DD Analog Signal Range Single/Dual Supply Specifications Wide Supply Ranges (10.8 V to 16.5 V) Extended Plastic Temperature Range (–408C to +85 8C) Low Power Dissipation (28 mW max) Low Leakage (20 pA typ) Available in 28- Lead DIP, SOIC, PLCC, TSSOP and LCCC Packages Superior Alternative to: DG506A, Hl-506 DG507A, Hl-507 GENERAL DESCRIPTION The ADG506A and ADG507A are CMOS monolithic analog multiplexers with 16 channels and dual 8 channels, respectively. The ADG506A switches one of 16 inputs to a common output, depending on the state of four binary addresses and an enable input. The ADG507A switches one of eight differential inputs to a common differential output, depending on the state of three binary addresses and an enable input. Both devices have TTL and 5 V CMOS logic compatible digital inputs. The ADG506A and ADG507A are designed on an enhanced LC 2MOS process, which gives an increased signal capability of VSS to VDD and enables operation over a wide range of supply voltages. The devices can operate comfortably anywhere in the 10.8 V to 16.5 V single or dual supply range. These multiplexers also feature high switching speeds and low R ON. PRODUCT HIGHLIGHTS 1. Single/Dual Supply Specifications with a Wide Tolerance The devices are specified in the 10.8 V to 16.5 V range for both single and dual supplies. 2. Extended Signal Range The enhanced LC 2MOS processing results in a high break- down and an increased analog signal range of V SS to VDD. 3. Break-Before-Make Switching Switches are guaranteed break-before-make so input signals are protected against momentary shorting. 4. Low Leakage Leakage currents in the range of 20 pA make these multiplexers suitable for high precision circuits. ORDERING GUIDE Temperature Package Model1 Range Option 2 ADG506AKN –40 °C to +85°C N-28 ADG506AKR –40 °C to +85°C R-28 ADG506AKP –40 °C to +85°C P-28A ADG506ABQ –40 °C to +85°C Q-28 ADG506ATQ –55 °C to +125°C Q-28 ADG506ATE –55 °C to +125°C E-28A ADG507AKN –40 °C to +85°C N-28 ADG507AKR –40 °C to +85°C R-28 ADG507AKP –40 °C to +85°C P-28A ADG507AKRU –40 °C to +85°C RU-28 ADG507ABQ –40 °C to +85°C Q-28 ADG507ATQ –55 °C to +125°C Q-28 ADG507ATE –55 °C to +125°C E-28A NOTES 1To order MIL-STD-883, Class B processed parts, add /883B to part number. See Analog Devices’ Military/Aerospace Reference Manual (1994) for military data sheet. 2E = Leadless Ceramic Chip Carrier (LCCC); N = Plastic DIP; P = Plastic Leaded Chip Carrier (PLCC); Q = Cerdip; R = 0.3" Small Outline IC (SOIC); RU = Thin Shrink Small Outline Package (TSSOP).

–2– REV. C ADG506A/ADG507A–SPECIFICATIONS Dual Supply (VDD = +10.8 V to +16.5 V, VSS = –10.8 V to –16.5 V unless otherwise noted) ADG506A ADG506A ADG506A ADG507A ADG507A ADG507A K Version B Version T Version –408C to –40 8C to –55 8C to Parameter +25 8C +85 8C +25 8C +85 8C +25 8C +125 8C Units Comments ANALOG SWITCH Analog Signal Range V SS VSS VSS VSS VSS VSS V min VDD VDD VDD VDD VDD VDD V max RON 280 280 280 W typ –10 V £ VS £ +10 V, IDS = 1 mA; Test Circuit 1 450 600 450 600 450 600 W max 300 400 300 400 W max V DD = 15 V (– 10%), VSS = –15 V (– 10%) 300 400 W max V DD = 15 V (– 5%), VSS = –15 V (– 5%) RON Drift 0.6 0.6 0.6 %/ °C typ –10 V £ VS £ +10 V, IDS = 1 mA RON Match 5 5 5 % typ –10 V £ VS £ +10 V, IDS = 1 mA IS (OFF), Off Input Leakage 0.02 0.02 0.02 nA typ V1 = – 10 V, V2 = 710 V; Test Circuit 2 1 50 1 50 1 50 nA max ID (OFF), Off Output Leakage 0.04 0.04 0.04 nA typ V1 = – 10 V, V2 = 710 V; Test Circuit 3 ADG506A 1 200 1 200 1 200 nA max ADG507A 1 100 1 100 1 100 nA max I D (ON), On Channel Leakage 0.04 0.04 0.04 nA typ V1 = – 10 V, V2 = 710 V; Test Circuit 4 ADG506A 1 200 1 200 1 200 nA max ADG507A 1 100 1 100 1 100 nA max I DIFF, Differential Off Output Leakage (ADG507A Only) 25 25 25 nA max V1 = – 10 V, V2 = 710 V; Test Circuit 5 DIGITAL CONTROL VINH, Input High Voltage 2.4 2.4 2.4 V min VINL, Input Low Voltage 0.8 0.8 0.8 V max IINL or IINH 111 mA max V IN = 0 to VDD CIN Digital Input Capacitance 8 8 8 pF max DYNAMIC CHARACTERISTICS tTRANSITION 1 200 200 200 ns typ V1 = – 10 V, V2 = +10 V; Test Circuit 6 300 400 300 400 300 400 ns max tOPEN 1 50 50 50 ns typ Test Circuit 7 25 10 25 10 25 10 ns min tON (EN)1 200 200 200 ns typ Test Circuit 8 300 400 300 400 300 400 ns max t OFF (EN)1 200 200 200 ns typ Test Circuit 8 300 400 300 400 300 400 ns max OFF Isolation 68 68 68 dB typ V EN = 0.8 V, RL = 1 kW , CL = 15 pF, 50 50 50 dB min V S = 7 V rms, f = 100 kHz CS (OFF) 5 5 5 pF typ V EN = 0.8 V CD (OFF) ADG506A 44 44 44 pF typ V EN = 0.8 V ADG507A 22 22 22 pF typ QINJ, Charge Injection 4 4 4 pC typ R S = 0 W , VS = 0 V; Test Circuit 9 POWER SUPPLY IDD 0.6 0.6 0.6 mA typ V IN = VINL or VlNH 1.5 1.5 1.5 mA max ISS 20 20 20 mA typ V IN = VIN or VINH 0.2 0.2 0.2 mA max Power Dissipation 10 10 10 mW typ 28 28 28 mW max NOTES 1Sample tested at +25 °C to ensure compliance. Specifications subject to change without notice.

–3–REV. C ADG506A/ADG507ASingle Supply(VDD = +10.8 V to +16.5 V, V SS = GND = 0 V unless otherwise noted) ADG506A ADG506A ADG506A ADG507A ADG507A ADG507A K Version B Version T Version –408C to –40 8C to –55 8C to Parameter +25 8C +85 8C +25 8C +85 8C +25 8C +125 8C Units Comments ANALOG SWITCH Analog Signal Range V SS VSS VSS VSS VSS VSS V min VDD VDD VDD VDD VDD VDD V max RON 500 500 500 W typ 0 V £ VS £ +10 V, IDS = 0.5 mA; Test Circuit 1 700 1000 700 1000 700 1000 W max RON Drift 0.6 0.6 0.6 %/ °C typ 0 V £ VS £ +10 V, IDS = 0.5 mA RON Match 5 5 5 % typ 0 V £ VS £ +10 V, IDS = 0.5 mA IS (OFF), Off Input Leakage 0.02 0.02 0.02 nA typ V1 = +10 V/0 V, V2 = 0 V/ +10 V; 1 50 1 50 1 50 nA max Test Circuit 2 ID (OFF), Off Output Leakage 0.04 0.04 0.04 nA typ V1 = +10 V/0 V, V2 = 0 V/ +10 V; ADG506A 1 200 1 200 1 200 nA max Test Circuit 3 ADG507A 1 100 1 100 1 100 nA max I D (ON), On Channel Leakage 0.04 0.04 0.04 nA typ V1 = +10 V/0 V, V2 = 0 V/ +10 V; ADG506A 1 200 1 200 1 200 nA max Test Circuit 4 ADG507A 1 100 1 100 1 100 nA max I DIFF, Differential Off Output V1 = +10 V/0 V, V2 = 0 V/ +10 V; Leakage (ADG507A Only) 25 25 25 nA max Test Circuit 5 DIGITAL CONTROL VINH, Input High Voltage 2.4 2.4 2.4 V min VINL, Input Low Voltage 0.8 0.8 0.8 V max IINL or IINH 111 mA max V IN = 0 to VDD CIN Digital Input Capacitance 8 8 8 pF max DYNAMIC CHARACTERISTICS tTRANSITION 1 300 300 300 ns typ V1 = +10 V/0 V, V2 = +10 V; Test Circuit 6 450 600 450 600 450 600 ns max tOPEN 1 50 50 50 ns typ Test Circuit 7 25 10 25 10 25 10 ns min tON (EN)1 250 250 250 ns typ Test Circuit 8 450 600 450 600 450 600 ns max t OFF (EN)1 250 250 250 ns typ Test Circuit 8 450 600 450 600 450 600 ns max OFF Isolation 68 68 68 dB typ V EN = 0.8 V, RL = 1 kW , CL = 15 pF, 50 50 50 dB min V S = 3.5 V rms, f = 100 kHz CS (OFF) 5 5 5 pF typ V EN = 0.8 V CD (OFF) ADG506A 44 44 44 pF typ V EN = 0.8 V ADG507A 22 22 22 pF typ QINJ, Charge Injection 4 4 4 pC typ R S = 0 W , VS = 0 V; Test Circuit 9 POWER SUPPLY IDD 0.6 0.6 0.6 mA typ V IN = VINL or VlNH 1.5 1.5 1.5 mA max Power Dissipation 10 10 10 mW typ 25 25 25 mW max NOTES 1Sample tested at +25 °C to ensure compliance. Specifications subject to change without notice. Truth Table (ADG506A) A3 A2 A1 A0 EN On Switch XXXX0 NONE 000011 000112 001013 001114 010015 010116 011017 011118 100019 100111 0 101011 1 101111 2 110011 3 110111 4 111011 5 111111 6 Truth Table (ADG507A) A2 A1 A0 EN On Switch Pair XXX0 NONE 00011 00112 01013 01114 10015 10116 11017 11118 X = Don’t Care

–4– REV. C CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADG506A/ADG507A feature proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. ABSOLUTE MAXIMUM RATINGS 1 (TA = 25°C unless otherwise noted) Analog Inputs2 Pulsed Current S or D Digital Inputs Power Dissipation (Any Package) Operating Temperature NOTES 1Stresses above those listed under Absolute Maximum Ratings may cause perma- nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2Overvoltage at A, EN, S or D will be clamped by diodes. Current should be limited to the Maximum Rating above. PIN CONFIGURATIONS DIP, SOIC TOP VIEW (Not to Scale) ADG506A NC = NO CONNECT VDD VSS D NC NC S16 S6S15 S14 S13 S12 S11 S10 S1 GND NC EN LCCC 28 2712342 6 12 13 14 15 16 17 18 TOP VIEW (Not to Scale) NC = NO CONNECT S7A S6A S5A S4A S3A S2A S1A GND NC S8B NC DB VDD DA S8AEN S7B S6B S5B S4B S3B S2B S1B VSS ADG507A NC PLCC 28 27 261234 12 13 14 15 16 17 18 TOP VIEW (Not to Scale) PIN 1 IDENTIFIER S7B S6B S5B S4B S3B S7A S6A S5A S4A S3A NC = NO CONNECT ADG507A S2B S1B S2A S1A NC VDD A2 A0 VSS GND NC EN DB DA NC S8A S8B PLCC 28 27 261234 12 13 14 15 16 17 18 TOP VIEW (Not to Scale) PIN 1 IDENTIFIER S15 S14 S13 S12 S11 NC = NO CONNECT ADG506A S10 NC NC VDD D A0 VSS GND NC EN S16 DIP, SOIC, TSSOP TOP VIEW (Not to Scale) ADG507A NC = NO CONNECT VDD S7A S8A VSS DA DB NC S8B S4A S5A S6AS7B S6B S5B S4B S3B S2B S1A S2A S3A S1B GND NC NC EN LCCC 28 2712342 6 12 13 14 15 16 17 18 TOP VIEW (Not to Scale) NC = NO CONNECT GND NC EN S15 S14 S13 S12 S11 S10 S16 NC NC VDD D VSS ADG506A WARNING! ESD SENSITIVE DEVICE

–6– REV. C –Test Circuits Note: All Digital Input Signal Rise and Fall Times Measured from 10% to 90% of 3 V. t R = tF = 20 ns. Test Circuit 6. Switching Time of Multiplexer, t TRANSITION Test Circuit 7. Break-Before-Make Delay, t OPEN Test Circuit 1. R ON Test Circuit 2. I S (OFF) Test Circuit 3. I D (OFF) Test Circuit 4. I D (ON) Test Circuit 5. I DIFF

Figure 7. ADG507A in a Single Supply Automotive Data Acquisition Application contain information such as temperature, pressure, speed etc.

–8– REV. C C1150c–0–6/98PRINTED IN U.S.A. TERMINOLOGY RON Ohmic resistance between terminals D and S RON Match Difference between the R ON of any two channels RON Drift Change in R ON versus temperature IS (OFF) Source terminal leakage current when the switch is off ID (OFF) Drain terminal leakage current when the switch is off ID (ON) Leakage current that flows from the closed switch into the body VS (VD) Analog voltage on terminal S or D CS (OFF) Channel input capacitance for “OFF” condition CD (OFF) Channel output capacitance for “OFF” condition CIN Digital input capacitance tON (EN) Delay time between the 50% and 90% points of the digital input and switch “ON” condition tOFF (EN) Delay time between the 50% and 10% points of the digital input and switch “OFF” condition tTRANSITION Delay time between the 50% and 90% points of the digital inputs and switch “ON” condition when switching from one address state to another t OPEN “OFF” time measured between 50% points of both switches when switching from one address state to another VINL Maximum input voltage for Logic “0” VINH Minimum input voltage for Logic “1” IINL (IINH) Input current of the digital input VDD Most positive voltage supply VSS Most negative voltage supply IDD Positive supply current ISS Negative supply current OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 28-Lead Plastic DIP (Suffix N) 1.45(36.83) 1.44 (36.58) 0.550 (13.97) 0.53 (13.47) 0.020 (0.508) 0.015 (0.381) 0.175 (4.45) 0.12 (3.05) 0.2 (5.08) MAX 0.105 (2.67) 0.095 (2.42) 0.065 (1.66) 0.045 (1.15) 0.606 (15.4) 0.594 (15.09) 0.012 (0.305) 0.008 (0.203) 0.16 (4.07) 0.14 (3.56) 158 LEAD NO. 1 IDENTIFIED BY DOT OR NOTCH LEADS ARE SOLDER OR TIN PLATED KOVAR OR ALLOY 42 28-Lead Cerdip (Suffix Q) 0.525 (13.33) 0.515 (13.08) GLASS SEALANT 15° 0.18(4.57) MAX 0.012 (0.305) 0.008 (0.203) 0.22 (5.59) MAX 1.490 (37.84) MAX 0.125 (3.175) MIN 0.02 (0.5) 0.016 (0.406) 0.11 (2.79) 0.099 (2.28) 0.06 (1.52) 0.05 (1.27) 0.62 (15.74) 0.59 (14.93) LEAD NO. 1 IDENTIFIED BY DOT OR NOTCH LEADS ARE SOLDER OR TIN PLATED KOVAR OR ALLOY 42 28-Lead SOIC (Suffix R) SEATING PLANE 0.0118 (0.30) 0.0040 (0.10) 0.0192 (0.49) 0.0138 (0.35) 0.1043 (2.65) 0.0926 (2.35) 0.0500 (1.27) BSC 0.0125 (0.32) 0.0091 (0.23) 0.0500 (1.27) 0.0157 (0.40) 0.0291 (0.74) 0.0098 (0.25)x 45° 0.7125 (18.10) 0.6969 (17.70) 0.4193 (10.65) 0.3937 (10.00) 0.2992 (7.60) 0.2914 (7.40) PIN 1 28 15 141 28-Lead TSSOP (Suffix RU) 28 15 141 0.386 (9.80) 0.378 (9.60) 0.256 (6.50) 0.246 (6.25) 0.177 (4.50) 0.169 (4.30) PIN 1 SEATING PLANE 0.006 (0.15) 0.002 (0.05) 0.0118 (0.30) 0.0075 (0.19) 0.0256 (0.65) BSC 0.0433 (1.10) MAX 0.0079 (0.20) 0.0035 (0.090) 0.028 (0.70) 0.020 (0.50) 28-Terminal Plastic Leaded Chip Carrier (Suffix P) PIN 1 IDENTIFIER TOP VIEW (PINS DOWN) 0.498 (12.57) 0.485 (12.32)SQ 0.456 (11.582) 0.450 (11.430)SQ 0.021 (0.533) 0.013 (0.331) 0.430 (10.5) 0.390 (9.9) 0.032 (0.812) 0.026 (0.661) 0.180 (4.51) 0.165 (4.20) 0.120 (3.04) 0.090 (2.29) 0.050 60.005 01.27 60.13 28-Terminal Leadless Ceramic Chip Carrier (Suffix E) 28 5 BOTTOM VIEW 0.028 (0.71) 0.022 (0.56) 45° TYP 0.015 (0.38) MIN 0.055 (1.40) 0.045 (1.14) 0.050 (1.27) BSC 0.075 (1.91) REF 0.011 (0.28) 0.007 (0.18) R TYP 0.095 (2.41) 0.075 (1.90) 0.150 (3.51) BSC 0.300 (7.62) BSC 0.200 (5.08) BSC 0.075 (1.91) REF 0.458 (11.63) 0.442 (11.23) SQ 0.458 (11.63) MAX SQ 0.100 (2.54) 0.064 (1.63) 0.088 (2.24) 0.054 (1.37)