ADG419BRM-REEL

ADG419_09 AD | Alldatasheet

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Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2009 Analog Devices, Inc. All rights reserved.

FEATURES

44 V supply maximum ratings

VSS to VDD analog signal range Low on resistance: <35 Ω Ultralow power dissipation: < 35 μW Fast transition time: 160 ns maximum Break-before-make switching action Plug-in replacement for DG419

APPLICATIONS

D SWITCH SHOWN FOR A LOGIC 1 INPUT IN 07850-001 Figure 1. GENERAL DESCRIPTION The ADG419 is a monolithic CMOS SPDT switch. This switch is designed on an enhanced LC2MOS process that provides low power dissipation yet gives high switching speed, low on resistance, and low leakage currents. The on resistance profile of the ADG419 is very flat over the full analog input range, ensuring excellent linearity and low distortion. The part also exhibits high switching speed and high signal bandwidth. CMOS construction ensures ultralow power dissipation, making the parts ideally suited for portable and battery-powered instruments. Each switch of the ADG419 conducts equally well in both directions when on and has an input signal range that extends to the supplies. In the off condition, signal levels up to the supplies are blocked. The ADG419 exhibits break-before-make switching action. PRODUCT HIGHLIGHTS 1. Extended Signal Range. The ADG419 is fabricated on an enhanced LC2MOS process, giving an increased signal range that extends to the supply rails. 2. Ultralow Power Dissipation. 3. Low RON. 4. Single-Supply Operation. For applications where the analog signal is unipolar, the ADG419 can be operated from a single rail power supply. The part is fully specified with a single 12 V power supply and remains functional with single supplies as low as 5 V .

Rev. B | Page 2 of 16 TABLE OF CONTENTS

REVISION HISTORY

8/09—Rev. B to Rev. C

Rev. B | Page 3 of 16 SPECIFICATIONS DUAL SUPPLY VDD = 15 V ± 10%, VSS = −15 V ± 10%, VL = 5 V ± 10%, GND = 0 V , unless otherwise noted. Table 1. B Version T Version Parameter1 +25°C −40°C to +85°C −40°C to +125°C +25°C −55°C to +125°C Unit Test Conditions/Comments ANALOG SWITCH Analog Signal Range VSS to VDD VSS to VDD RON 25 25 Ω typ VD = ±12.5 V, IS = −10 mA 35 45 45 35 45 Ω max VDD = +13.5 V, VSS = −13.5 V LEAKAGE CURRENTS VDD = +16.5 V, VSS = −16.5 V Source Off Leakage, IS (Off ) ±0.1 ±0.1 nA typ VD = ±15.5 V, VS = ∓15.5 V; see Figure 12 ±0.25 ±5 ±15 ±0.25 ±15 nA max Drain Off Leakage, ID (Off ) ±0.1 ±0.1 nA typ VD = ±15.5 V, VS = ∓15.5 V; see Figure 12 ±0.75 ±5 ±30 ±0.75 ±30 nA max Channel On Leakage, ID, IS (On) ±0.4 ±0.4 nA typ VS = VD = ±15.5 V; see Figure 13 ±0.75 ±5 ±30 ±0.75 ±30 nA max DIGITAL INPUTS Input High Voltage, VINH 2.4 2.4 2.4 V min Input Low Voltage, VINL 0.8 0.8 0.8 V max Input Current IINL or IINH ±0.005 ±0.005 ±0.005 μA typ VIN = VINL or VINH DYNAMIC CHARACTERISTICS2 tTRANSITION 160 200 200 145 200 ns max RL = 300 Ω, CL = 35 pF; VS1 = ±10 V, VS2 = ∓10 V; see Figure 14 Break-Before-Make Time Delay, tD 30 30 ns typ RL = 300 Ω, CL = 35 pF; VS1 = VS2 = ±10 V; see Figure 15 5 5 ns min Off Isolation 80 80 dB typ RL = 50 Ω, f = 1 MHz; see Figure 16 Channel-to-Channel Crosstalk 90 70 dB typ RL = 50 Ω, f = 1 MHz; see Figure 17 CS (Off ) 6 6 pF typ f = 1 MHz CD, CS (On) 55 55 pF typ f = 1 MHz POWER REQUIREMENTS VDD = +16.5 V, VSS = −16.5 V IDD 0.0001 0.0001 μA typ VIN = 0 V or 5 V 1 2.5 2.5 1 2.5 μA max ISS 0.0001 0.0001 μA typ 1 2.5 2.5 1 2.5 μA max IL 0.0001 0.0001 μA typ VL = 5.5 V 1 2.5 2.5 1 2.5 μA max 1 Temperature ranges are as follows: B Version: −40°C to +125°C; T Version: −55°C to +125°C. 2 Guaranteed by design, not subject to production test.

Rev. B | Page 4 of 16 SINGLE SUPPLY VDD = 12 V ± 10%, VSS = 0 V , VL = 5 V ± 10%, GND = 0 V , unless otherwise noted. Table 2. B Version T Version Parameter1 +25°C −40°C to +85°C −40°C to +125°C +25°C −55°C to +125°C Unit Test Conditions/Comments ANALOG SWITCH Analog Signal Range 0 to VDD 0 to VDD V RON 40 40 Ω typ VD = 3 V, 8.5 V, IS = −10 mA 60 70 70 Ω max VDD = 10.8 V LEAKAGE CURRENT VDD = 13.2 V Source OFF Leakage, IS (Off ) ±0.1 ±0.1 nA typ VD = 12.2 V/1 V, VS = 1 V/12.2 V; see Figure 12 ±0.25 ±5 ±15 ±0.25 ±15 nA max Drain OFF Leakage, ID (Off ) ±0.1 ±0.1 nA typ VD = 12.2 V/1 V, VS = 1 V/12.2 V; see Figure 12 ±0.75 ±5 ±30 ±0.75 ±30 nA max Channel ON Leakage, ID, IS (On) ±0.4 ±0.4 nA typ VS = VD = 12.2 V/1 V; see Figure 13 ±0.75 ±5 ±30 ±0.75 ±30 nA max DIGITAL INPUTS Input High Voltage, VINH 2.4 2.4 2.4 V min Input Low Voltage, VINL 0.8 0.8 0.8 V max Input Current IINL or IINH ±0.005 ±0.005 ±0.005 μA typ VIN = VINL or VINH DYNAMIC CHARACTERISTICS2 tTRANSITION 180 250 250 170 250 ns max RL = 300 Ω, CL = 35 pF; VS1 = 0 V/8 V, VS2 = 8 V/0 V; see Figure 14 Break-Before-Make Time Delay, tD 60 60 ns typ RL = 300 Ω, CL = 35 pF; VS1 = VS2 = 8 V; see Figure 15 Off Isolation 80 80 dB typ RL = 50 Ω, f = 1 MHz; see Figure 16 Channel-to-Channel Crosstalk 90 70 dB typ RL = 50 Ω, f = 1 MHz; see Figure 17 CS (Off ) 13 13 pF typ f = 1 MHz CD, CS (On) 65 65 pF typ f = 1 MHz POWER REQUIREMENTS VDD = 13.2 V IDD 0.0001 0.0001 μA typ VIN = 0 V or 5 V 1 2.5 2.5 1 2.5 μA max IL 0.0001 0.0001 μA typ VL = 5.5 V 1 2.5 2.5 1 2.5 μA max 1 Temperature ranges are as follows: B Version: −40°C to +125°C; T Version: −55°C to +125°C. 2 Guaranteed by design, not subject to production test.

Rev. B | Page 5 of 16 ABSOLUTE MAXIMUM RATINGS TA= 25°C unless otherwise noted. Table 3. Parameter Rating VDD to VSS 44 V VDD to GND −0.3 V to +25 V VSS to GND +0.3 V to −25 V VL to GND −0.3 V to VDD + 0.3 V Analog, Digital Inputs1 VSS − 2 V to VDD + 2 V or 30 mA, whichever occurs first Continuous Current, S or D 30 mA Peak Current, S or D (Pulsed at 1 ms, 10% Duty-Cycle Maximum) 100 mA Operating Temperature Range Industrial (B Version) −40°C to +125°C Extended (T Version) −55°C to +125°C Storage Temperature Range −65°C to +150°C Junction Temperature 150°C θJA, Thermal Impedance 110°C/W Lead Temperature, Soldering (10 sec) 300°C θJA, Thermal Impedance 100°C/W Lead Temperature, Soldering (10 sec) 260°C θJA, Thermal Impedance 155°C/W θJA, Thermal Impedance 205°C/W Lead Temperature, Soldering Vapor Phase (60 sec) 215°C Infrared (15 sec) 220°C 1Overvoltages at IN, S or D is clamped by internal diodes. Limit current to the maximum ratings given. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD CAUTION

Figure 2. Pin Configuration Table 4. Pin Function Description 1 D Drain terminal. May be an input or an output. 2 S1 Source terminal. May be an input or an output. 3 GND Ground (0 V) reference. 4 V DD Most positive power supply potential. 5 V L Logic power supply (5 V). 8 S2 Source terminal. May be an input or an output. Table 5. Truth Table

0 On Off

1 Off On

Rev. B | Page 11 of 16 TERMINOLOGY VDD Most positive power supply potential. VSS Most negative power supply potential in dual-supply applications. In single-supply applications, it may be connected to GND. VL Logic power supply (5 V). GND Ground (0 V) reference. S Source terminal. May be an input or an output. D Drain terminal. May be an input or an output. IN Logic control input. R ON Ohmic resistance between D and S. I S (Off) Source leakage current with the switch off. I D (Off) Drain leakage current with the switch off. I D, IS (On) Channel leakage current with the switch on. V D (VS) Analog voltage on terminals D, S. C S (Off) Off switch source capacitance. CD, CS (On) On switch capacitance. t TRANSITION Delay time between the 50% and 90% points of the digital inputs and the switch on condition when switching from one address state to another. tD Off time or on time measured between the 90% points of both switches when switching from one address state to the other. VINL Maximum input voltage for Logic 0. V INH Minimum input voltage for Logic 1. I INL (IINH) Input current of the digital input. Crosstalk A measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance. Off Isolation A measure of unwanted signal coupling through an off channel. I DD Positive supply current. I SS Negative supply current.

0.65 BSC

1.10 MAX

Figure 20. 8-Lead Mini Small Outline Package [MSOP] REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 21. 8-Lead Standard Small Outline Package [SOIC_N] 1 Z = RoHS Compliant Part, # denotes that RoHS compliant part is top or bottom marked.

Rev. B | Page 14 of 16 NOTES

Rev. B | Page 15 of 16 NOTES

Rev. B | Page 16 of 16 NOTES ©2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the prop erty of their respective owners. D07850-0-8/09(B)