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High Performance Analog Multiplexers Data Sheet ADG408/ADG409 Rev. D Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. O Tel: 781.329.4700 ©2001–2015 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com

FEATURES

44 V supply maximum ratings

VSS to VDD analog signal range Low on resistance (100 Ω maximum) Low power (I SUPPLY < 75 μA) Fast switching Break-before-make switching action Plug-in replacement for DG408/DG409

APPLICATIONS

D ADG409 S1A S4B DA DB S4A S1B 1-OF-4 DECODER 1-OF-8 DECODER A0 A1 ENA0 A1 A2 EN 00027-001 Figure 1. GENERAL DESCRIPTION The ADG408/ADG409 are monolithic CMOS analog multiplexers comprising eight single channels and four differential channels, respectively. The ADG408 switches one of eight inputs to a common output as determined by the 3-bit binary address lines A0, A1, and A2. The ADG409 switches one of four differential inputs to a common differential output, as determined by the 2-bit binary address lines A0 and A1. An EN input on both devices is used to enable or disable the device. When the device is disabled, all channels are switched off. The ADG408/ADG409 are designed on an enhanced LC 2MOS process that provides low power dissipation yet gives high switching speed and low on resistance. Each channel conducts equally well in both directions when on and has an input signal range that extends to the supplies. In the off condition, signal levels up to the supplies are blocked. All channels exhibit break-before- make switching action, preventing momentary shorting when switching channels. Inherent in the design is low charge injection for minimum transients when switching the digital inputs. The ADG408/ADG409 are improved replacements for the DG408/DG409 analog multiplexers. PRODUCT HIGHLIGHTS 1. Extended Signal Range. The ADG408/ADG409 are fabricated on an enhanced LC2MOS process, giving an in creased signal range that extends to the supply rails. 2. Low Power Dissipation. 3. Low RON. 4. S ingle-Supply Operation. For applications where the analog signal is unipolar, the ADG408/ADG409 can be op erated from a single rail power supply. The parts are fully specified with a single 12 V power supply and remain functional with single supplies as low as 5 V .

Rev. D | Page 2 of 15 TABLE OF CONTENTS

REVISION HISTORY

3/15—Rev. C to Rev. D 10/06—Rev. B to Rev. C 3/03—Rev. A to Rev. B 2/01—Revision 0: Initial Version

Rev. D | Page 3 of 15 SPECIFICATIONS DUAL SUPPLY VDD = 15 V , VSS = −15 V , GND = 0 V , unless otherwise noted. Table 1. B Version T Version Parameter +25°C −40°C to +85°C +25°C −55°C to +125°C Unit Test Conditions/Comments ANALOG SWITCH Analog Signal Range V SS to VDD V SS to VDD V RON 40 40 Ω typ V D = ±10 V, IS = −10 mA 100 125 100 125 Ω max ∆RON 15 15 Ω max V D = +10 V, −10 V LEAKAGE CURRENTS Source Off Leakage IS (Off ) ±0.5 ±50 ±0.5 ±50 nA max V D = ±10 V, VS =  10 V; see Figure 19 Drain Off Leakage ID (Off) VD = ±10 V, VS =  10 V; see Figure 20 ADG408 ±1 ±100 ±1 ±100 nA max ADG409 ±1 ±50 ±1 ±50 nA max Channel On Leakage ID, IS (On) VS = VD = ±10 V; see Figure 21 ADG408 ±1 ±100 ±1 ±100 nA max ADG409 ±1 ±50 ±1 ±50 nA max DIGITAL INPUTS Input High Voltage, VINH 2.4 2.4 V min Input Low Voltage, VINL 0.8 0.8 V max Input Current IINL or IINH ±10 ±10 μA max V IN = 0 or VDD CIN, Digital Input Capacitance 8 8 pF typ f = 1 MHz DYNAMIC CHARACTERISTICS1 tTRANSITION 120 120 ns typ R L = 300 Ω, CL = 35 pF; 250 250 ns max VS1 = ±10 V, VS8 =  10 V; see Figure 22 tOPEN 10 10 10 10 ns min R L = 300 Ω, CL = 35 pF; VS = 5 V; see Figure 23 tON (EN) 85 125 85 125 ns typ R L = 300 Ω CL = 35 pF; 150 225 150 225 ns max V S = 5 V; see Figure 24 tOFF (EN) 65 65 ns typ R L = 300 Ω, CL = 35 pF; 150 150 ns max VS = 5 V; see Figure 24 Charge Injection 20 20 pC typ V S = 0 V, RS = 0 Ω, CL = 10 nF; see Figure 25 OFF Isolation −75 −75 dB typ R L = 1 kΩ, f = 100 kHz; VEN = 0 V; see Figure 26 Channel-to-Channel Crosstalk 85 85 dB typ RL = 1 kΩ, f = 100 kHz; see Figure 27 CS (OFF) 11 11 pF typ f = 1 MHz CD (OFF) f = 1 MHz ADG408 40 40 pF typ ADG409 20 20 pF typ CD, CS (ON) f = 1 MHz ADG408 54 54 pF typ ADG409 34 34 pF typ

Rev. D | Page 4 of 15 B Version T Version Parameter +25°C −40°C to +85°C +25°C −55°C to +125°C Unit Test Conditions/Comments POWER REQUIREMENTS IDD 1 1 μA typ V IN = 0 V, VEN = 0 V 5 5 μA max ISS 1 1 μA typ 5 5 μA max IDD 100 100 μA typ V IN = 0 V, VEN = 2.4 V 200 500 200 500 μA max 1 Guaranteed by design, not subject to production test. SINGLE SUPPLY VDD = 12 V , VSS = 0 V , GND = 0 V , unless otherwise noted. Table 2. B Version T Version Parameter +25°C −40°C to +85°C +25°C −55°C to +125°C Unit Test Conditions/Comments ANALOG SWITCH Analog Signal Range 0 to V DD 0 to V DD V RON 90 90 Ω typ V D = 3 V, 10 V, IS = –1 mA LEAKAGE CURRENTS Source Off Leakage IS (Off ) ±0.5 ±50 ±0.5 ±50 nA max VD = 8 V/0 V, V S = 0 V/8 V; see Figure 19 Drain Off Leakage ID (Off) V D = 8 V/0 V, VS = 0 V/8 V; see Figure 20 ADG408 ±1 ±100 ±1 ±100 nA max ADG409 ±1 ±50 ±1 ±50 nA max Channel On Leakage ID, IS (On) V S = VD = 8 V/0 V; see Figure 21 ADG408 ±1 ±100 ±1 ±100 nA max ADG409 ±1 ±50 ±1 ±50 nA max DIGITAL INPUTS Input High Voltage, VINH 2.4 2.4 V min Input Low Voltage, VINL 0.8 0.8 V max Input Current IINL or IINH ±10 ±10 μA max V IN = 0 or VDD CIN, Digital Input Capacitance 8 8 pF typ f = 1 MHz DYNAMIC CHARACTERISTICS1 tTRANSITION 130 130 ns typ R L = 300 Ω, CL = 35 pF; V S1 = 8 V/0 V, VS8 = 0 V/8 V; see Figure 22 tOPEN 10 10 ns typ R L = 300 Ω, CL = 35 pF; V S = 5 V; see Figure 23 tON (EN) 140 140 ns typ R L = 300 Ω CL = 35 pF; V S = 5 V; see Figure 24 tOFF (EN) 60 60 ns typ R L = 300 Ω, CL = 35 pF; V S = 5 V; see Figure 24 Charge Injection 5 5 pC typ V S = 0 V, RS = 0 Ω, CL = 10 nF; see Figure 25 Off Isolation –75 –75 dB typ R L = 1 kΩ f = 100 kHz; V EN = 0 V; see Figure 26

Rev. D | Page 5 of 15 B Version T Version Parameter +25°C −40°C to +85°C +25°C −55°C to +125°C Unit Test Conditions/Comments Channel-to-Channel Crosstalk 85 85 dB typ R L = 1 kΩ, f = 100 kHz; see Figure 27 CS (Offf ) 11 11 pF typ f = 1 MHz CD (Off) f = 1 MHz ADG408 40 40 pF typ ADG409 20 20 pF typ CD, CS (On) f = 1 MHz ADG408 54 54 pF typ ADG409 34 34 pF typ POWER REQUIREMENTS IDD 1 1 μA typ V IN = 0 V, VEN = 0 V 5 5 μA max IDD 100 100 μA typ V IN = 0 V, VEN = 2.4 V 200 500 200 500 μA max 1 Guaranteed by design, not subject to production test.

Rev. D | Page 6 of 15 ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Table 3. Parameter Rating VDD to VSS 44 V VDD to GND −0.3 V to +32 V VSS to GND +0.3 V to −32 V Analog, Digital Inputs VSS − 2 V to VDD + 2 V or 20 mA, whichever occurs first Continuous Current, S or D 20 mA Peak Current, S or D (Pulsed at 1 ms, 10% Duty Cycle Maximum) 40 mA Operating Temperature Range Industrial (B Version) −40°C to +85°C Extended (T Version) −55°C to +125°C Storage Temperature Range −65°C to +150°C Junction Temperature 150°C θJA, Thermal Impedance 76°C/W Lead Temperature, Soldering (10 sec) 300°C θJA, Thermal Impedance 117°C/W Lead Temperature, Soldering (10 sec) 260°C θJA, Thermal Impedance 155°C/W θJC, Thermal Impedance 50°C/W θJA, Thermal Impedance 77°C/W Lead Temperature, Soldering Vapor Phase (60 sec) 215°C Infrared (15 sec) 220°C Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. ESD CAUTION

Figure 2. ADG408 Pin Configuration Figure 3. ADG409 Pin Configuration Table 4. ADG408 Pin Function Descriptions device is disabled and all switches are off.

3 VSS Most Negative Power Supply Potential in

it can be connected to ground. 13 VDD Most Positive Power Supply Potential. 14 GND Ground (0 V) Reference. Table 5. ADG409 Pin Function Descriptions device is disabled and all switches are off.

3 V SS Most Negative Power Supply Potential in

it can be connected to ground. 14 V DD Most Positive Power Supply Potential. 15 GND Ground (0 V) Reference. Table 6. ADG408 Truth Table Table 7. ADG409 Truth Table

20 TIME (ns)60

Figure 10. Switching Time vs. VIN (Bipolar Supply) Figure 11. Switching Time vs. Single Supply Figure 12. Positive Supply Current vs. Switching Frequency Figure 13. Switching Time vs. VIN (Single Supply) Figure 14. Switching Time vs. Bipolar Supply Figure 15. Negative Supply Current vs. Switching Frequency

Rev. D | Page 13 of 15 TERMINOLOGY RON Ohmic resistance between D and S. ΔRON Difference between the RON of any two channels. IS (Off) Source leakage current when the switch is off. I D (Off) Drain leakage current when the switch is off. I D, IS (On) Channel leakage current when the switch is on. V D (VS) Analog voltage on Terminal D and Terminal S. C S (Off) Channel input capacitance for off condition. C D (Off) Channel output capacitance for off condition. C D, CS (On) On switch capacitance. C IN Digital input capacitance. t ON (EN) Delay time between the 50% and 90% points of the digital input and switch on condition. tOFF (EN) Delay time between the 50% and 90% points of the digital input and switch off condition. tTRANSITION Delay time between the 50% and 90% points of the digital inputs and the switch on condition when switching from one address state to another. tOPEN Off time measured between the 80% point of both switches when switching from one address state to another. VINL Maximum input voltage for Logic 0. VINH Minimum input voltage for Logic 1. I INL (IINH) Input current of the digital input. Crosstalk A measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance. Off Isolation A measure of unwanted signal coupling through an off channel. Charge Injection A measure of the glitch impulse transferred from the digital input to the analog output during switching. I DD Positive supply current. I SS Negative supply current.

Figure 30. 16-Lead Thin Shrink Small Outline Package [TSSOP]

1 Z = RoHS Compliant Part

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