ADG3243

ADG3243 2.5 V/3.3 V, 2-Bit, Individual Control Level Translator Bus Switch Data Sheet (Rev. 0)

Document overview

• Manufacturer or author: Analog Devices, Inc.
• PDF pages: 12

Technical content

REV. 0 ADG3243 2.5 V/3.3 V, 2-Bit, Individual Control Level Translator Bus Switch Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective companies. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved.

FEATURES

225 ps Propagation Delay through the Switch 4.5 /H9024 Switch Connection between Ports Data Rate 1.5 Gbps 2.5 V/3.3 V Supply Operation Level Translation 3.3 V to 2.5 V 2.5 V to 1.8 V Small Signal Bandwidth 710 MHz 8-Lead SOT-23 Package

APPLICATIONS

3.3 V to 2.5 V Voltage Translation 2.5 V to 1.8 V Voltage Translation Bus Switching Bus Isolation Hot Swap Hot Plug Analog Switch Applications FUNCTIONAL BLOCK DIAGRAM A1 B1 BE1 A0 B0 BE0 GENERAL DESCRIPTION The ADG3243 is a 2.5 V or 3.3 V, 2-bit, 2-port digital switch with individual channel control. It is designed on a low voltage CMOS process, which provides low power dissipation yet gives high switching speed and very low on resistance. This allows the inputs to be connected to the outputs without additional propa- gation delay or generating additional ground bounce noise. The switches are enabled by means of the bus enable (BEx) input signal. This digital switch allows a bidirectional signal to be switched when ON. In the OFF condition, signal levels up to the supplies are blocked. This device is ideal for applications requiring level translation. When operated from a 3.3 V supply, level translation from 3.3 V inputs to 2.5 V outputs is allowed. Similarly, if the device is operated from a 2.5 V supply and 2.5 V inputs are applied, the device will translate the outputs to 1.8 V. This makes the device suited to applications requiring level translation between different supplies, such as converter to DSP/microcontroller interfacing. PRODUCT HIGHLIGHTS 1. 3.3 V or 2.5 V supply operation. 2. Extremely low propagation delay through switch. 3. 4.5 Ω switches connect inputs to outputs. 4. Level/voltage translation. 5. Tiny SOT-23 package.

REV. 0–2– ADG3243–SPECIFICATIONS1 B Version Parameter Symbol Conditions Min Typ 2 Max Unit DC ELECTRICAL CHARACTERISTICS Input High Voltage V INH VCC = 2.7 V to 3.6 V 2.0 V VINH VCC = 2.3 V to 2.7 V 1.7 V Input Low Voltage V INL VCC = 2.7 V to 3.6 V 0.8 V VINL VCC = 2.3 V to 2.7 V 0.7 V Input Leakage Current I I ± 0.01 ± 1 µA OFF State Leakage Current I OZ 0 ≤ A, B ≤ VCC ± 0.01 ± 1 µA ON State Leakage Current 0 ≤ A, B ≤ VCC ± 0.01 ± 1 µA Maximum Pass Voltage V P VA/VB = VCC = 3.3 V, IO = –5 µA 2.0 2.5 2.9 V VA/VB = VCC = 2.5 V, IO= –5 µA 1.5 1.8 2.1 V CAPACITANCE3 A Port Off Capacitance C A OFF f = 1 MHz 3.5 pF B Port Off Capacitance C B OFF f = 1 MHz 3.5 pF A, B Port On Capacitance C A, CB ON f = 1 MHz 7 pF Control Input Capacitance C IN f = 1 MHz 4 pF SWITCHING CHARACTERISTICS 3 Propagation Delay A to B or B to A, t PD 4 tPHL, tPLH CL = 50 pF, VCC = 3 V 225 ps Propagation Delay Matching 5 5p s Bus Enable Time BEx to A or B6 tPZH, tPZL VCC = 3.0 V to 3.6 V 1 3.2 4.6 ns Bus Disable Time BEx to A or B6 tPHZ, tPLZ VCC = 3.0 V to 3.6 V 1 3 4 ns Bus Enable Time BEx to A or B6 tPZH, tPZL VCC = 2.3 V to 2.7 V 1 3 4 ns Bus Disable Time BEx to A or B6 tPHZ, tPLZ VCC = 2.3 V to 2.7 V 1 2.5 3.4 ns Maximum Data Rate V CC = 3.3 V; VA/VB = 2 V 1.5 Gbps Channel Jitter V CC = 3.3 V; VA/VB = 2 V 45 ps p-p DIGITAL SWITCH On Resistance R ON VCC = 3 V, VA = 0 V, IBA = 8 mA 4.5 8 Ω VCC = 3 V, VA = 1.7 V, IBA = 8 mA 12 28 Ω VCC = 2.3 V, VA = 0 V, IBA = 8 mA 5 9 Ω VCC = 2.3 V, VA = 1 V, IBA = 8 mA 9 18 Ω On Resistance Matching /H9004RON VCC = 3 V, VA = 0 V, IA = 8 mA 0.1 0.5 Ω POWER REQUIREMENTS VCC 2.3 3.6 V Quiescent Power Supply Current I CC Digital Inputs = 0 V or V CC 0.01 1 µA Increase in ICC per Input7 /H9004ICC VCC = 3.6 V, BE0 = 3.0 V, BE1 = VCC or GND 0.15 8 µA NOTES 1Temperature range is as follows: B Version: –40 °C to +85°C. 2Typical values are at 25 °C, unless otherwise stated. 3Guaranteed by design, not subject to production test. 4The digital switch contributes no propagation delay other than the RC delay of the typical R ON of the switch and the load capacitance when driven by an ideal voltage source. Since the time constant is much smaller than the rise/fall times of typical driving signals, it adds very little propag ation delay to the system. Propagation delay of the digital switch when used in a system is determined by the driving circuit on the driving side of the switch and its inte raction with the load on the driven side. 5Propagation delay matching between channels is calculated from the on resistance matching and load capacitance of 50 pF. 6See Timing Measurement Information section. 7This current applies to the control pin BEx only. The A and B ports contribute no significant ac or dc currents as they transition. Specifications subject to change without notice. (VCC = 2.3 V to 3.6 V, GND = 0 V, all specifications T MIN to TMAX, unless otherwise noted.)

REV. 0 ADG3243 –3– ABSOLUTE MAXIMUM RATINGS * (TA = 25°C, unless otherwise noted.) Operating Temperature Range /H9258 *Stresses above those listed under Absolute Maximum Ratings may cause perma- nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time. PIN CONFIGURATION 8-Lead SOT-23 TOP VIEW (Not to Scale) ADG3243 GND BE0 BE1 VCC CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADG3243 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. ORDERING GUIDE Model Temperature Range Package Description Package Branding ADG3243BRJ-R2 –40 °C to +85°CS OT-23 (Small Outline Transistor Package) RJ-8 SFA ADG3243BRJ-REEL –40 °C to +85°CS OT-23 (Small Outline Transistor Package) RJ-8 SFA ADG3243BRJ-REEL7 –40 °C to +85°CS OT-23 (Small Outline Transistor Package) RJ-8 SFA PIN FUNCTION DESCRIPTIONS Pin No. Mnemonic Description

1 BE0 Bus Enable (Active Low)

2A 0 Port A0, Input or Output 3A 1 Port A1, Input or Output 4G ND Ground Reference 5B 1 Port B1, Input or Output 6B 0 Port B0, Input or Output

7 BE1 Bus Enable (Active Low)

8V CC Positive Power Supply Voltage Table I. Truth Table BEx Function LA x = Bx, 3.3 V to 2.5 V/2.5 V to 1.8 V Level Shifting H Disconnect

REV. 0–4– ADG3243 TERMINOLOGY VCC Positive Power Supply Voltage. GND Ground (0 V) Reference. VINH Minimum Input Voltage for Logic 1. VINL Maximum Input Voltage for Logic 0. II Input Leakage Current at the Control Inputs. IOZ OFF State Leakage Current. It is the maximum leakage current at the switch pin in the OFF state. IOL ON State Leakage Current. It is the maximum leakage current at the switch pin in the ON state. VP Maximum Pass Voltage. The maximum pass voltage relates to the clamped output voltage of an NMOS device when the switch input voltage is equal to the supply voltage. RON Ohmic Resistance Offered by a Switch in the ON State. It is measured at a given voltage by forcing a specified amount of current through the switch. /H9004RON ON Resistance Match between Any Two Channels, i.e., R ON max – RON min. CX OFF OFF Switch Capacitance. CX ON ON Switch Capacitance. CIN Control Input Capacitance. This consists of BEx. ICC Quiescent Power Supply Current. This current represents the leakage current between the V CC and ground pins. It is measured when all control inputs are at a logic high or low level and the switches are OFF. /H9004ICC Extra power supply current component for the EN control input when the input is not driven at the supplies. tPLH, tPHL Data Propagation Delay through the Switch in the ON State. Propagation delay is related to the RC time constant RON × CL, where CL is the load capacitance. tPZH, tPZL Bus Enable Times. These are the times taken to cross the V T voltage at the switch output when the switch turns on in response to the control signal, BEx. tPHZ, tPLZ Bus Disable Times. This is the time taken to place the switch in the high impedance OFF state in response to the control signal. It is measured as the time taken for the output voltage to change by V /H9004 from the original quiescent level, with reference to the logic level transition at the control input. (Refer to Figure 3 for enable and disable times.) Max Data Rate Maximum Rate at which Data Can Be Passed through the Switch. Channel Jitter Peak-to-Peak Value of the Sum of the Deterministic and Random Jitter of the Switch Channel.

REV. 0 Typical Performance Characteristics–ADG3243 –5– VA/VB (V) RON (/H9024) 00 0.5 TA = 25/H11543C 1.5 2.5 3.5 VCC = 3V VCC = 3.3V VCC = 3.6V 3.02.01.0 TPC 1. On Resistance vs. Input Voltage VA/VB (V) RON (/H9024) 00 0.5 /H1154585/H11543C /H1154525/H11543C 1.0 /H1154640/H11543C = 2.5VVCC 1.2 TPC 4. On Resistance vs. Input Voltage for Different Temperatures 500 05 1 0 15 20 25 30 35 40 45 ENABLE FREQUENCY (MHz) ICC (/H9262A) 100 150 200 250 300 350 400 450 TA = 25/H11543C VCC = 3.3V VCC = 2.5V TPC 7. I CC vs. Enable Frequency VA/VB (V) RON (/H9024) 00 0.5 1.5 2.5 VCC = 2.3V VCC = 2.5V VCC = 2.7V TA = 25/H11543C 3.02.01.0 TPC 2. On Resistance vs. Input Voltage VA/VB (V) VOUT (V) 00 0.5 0.5 1.5 2.5 1.5 2.5 3.5 VCC = 3.6V VCC = 3.3V VCC = 3V 3.0 2.0 1.0 1.0 2.0 3.0 TA = 25/H11543C IO = –5/H9262A TPC 5. Pass Voltage vs. V CC IO (A) VOUT (V) 0.5 1.0 1.5 2.0 2.5 3.0 VCC = 3.3V VCC = 2.5V TA = 25/H11543C VA = 0V BEx = 0 TPC 8. Output Low Characteristic VA/VB (V) RON (/H9024) 00 0.5 1.5 2.01.0 /H1154525/H11543C /H1154585/H11543C /H1154640/H11543C = 3.3VVCC TPC 3. On Resistance vs. Input Voltage for Different Temperatures VA/VB (V) VOUT (V) 00 0.5 0.5 1.5 2.5 1.5 2.5 VCC = 2.7V VCC = 2.5V VCC = 2.3V TA = 25/H11543C IO = –5/H9262A 2.0 1.0 1.0 2.0 3.0 TPC 6. Pass Voltage vs. V CC IO (A) VOUT (V) –0.10 0.5 1.0 1.5 2.0 2.5 3.0 TA = 25/H11543C VA = VCC BEx = 0 VCC = 2.5V VCC = 3.3V TPC 9. Output High Characteristic

REV. 0–6– ADG3243 VA/VB (V) QINJ (pC) –2.0 0 0.5 –1.0 –0.2 1.5 2.5 –0.4 –0.6 –0.8 –1.2 –1.4 –1.8 1.0 2.0 3.0 –1.6 VCC = 3.3V VCC = 2.5V TA = 25/H11543C ON OFF CL = InF TPC 10. Charge Injection vs. Source Voltage FREQUENCY (MHz) ATTENUA TION (dB) 0.1 1000 11 0 –90 TA = 25/H11543C VCC = 3.3V/2.5V VIN = 0dBm N/W ANALYZER : RL = RS = 50/H9024 –100 –80 –70 –60 –50 –40 –30 –20 –10 100 TPC 13. Off Isolation vs. Frequency DATA RATE (Gbps) EYE WIDTH (%) 0.5 100 VCC = 3.3V VIN = 1.5V p-p 20dB ATTENUATION % EYE WIDTH = ((CLOCK PERIOD – JITTER p-p)/CLOCK PERIOD) /H11547 100% TPC 16. Eye Width vs. Data Rate; PRBS 31 FREQUENCY (MHz) ATTENUA TION (dB) 0.03 0.1 1000 11 0 100 –10 –12 TA = 25/H11543C VCC = 3.3V/2.5V VIN = 0dBm N/W ANALYZER : RL = RS = 50/H9024 –14 TPC 11. Bandwidth vs. Frequency 4.0 3.5 3.0 –40 –20 0 TEMPERATURE (/H11543C) TIME (ns) 20 80 6040 2.5 2.0 1.5 1.0 0.5 VCC = 3.3V ENABLE DISABLE ENABLE DISABLE VCC = 2.5V TPC 14. Enable/Disable Time vs. Temperature VCC = 3.3V VIN = 1.5V p-p 20dB ATTENUA TION TA = 25/H11543C 50mV/DIV 200ps/DIV TPC 17. Eye Pattern; 1.5 Gbps, VCC = 3.3 V, PRBS 31 –20 –10 –40 –30 –60 –50 0.03 0.1 1.0 FREQUENCY (MHz) ATTENUATION (dB) 10 1000 100 –80 –90 –70 –100 TA = 25/H11543C VCC = 3.3V/2.5V VIN = 0dBm N/W ANALYZER R L = RS = 50/H9024 TPC 12. Crosstalk vs. Frequency DATA RATE (Gbps) JITTER (ps p-p) 0.5 100 VCC = 3.3V VIN = 1.5V p-p 20dB ATTENUATION TPC 15. Jitter vs. Data Rate; PRBS 31 20mV/DIV 200ps/DIV VCC = 2.5V VIN = 1.5V p-p 20dB ATTENUA TION TA = 25/H11543C TPC 18. Eye Pattern; 1.244 Gbps, VCC = 2.5 V, PRBS 31

Figure 10. ADG3243 in a Hot Plug Application of the backplane before any other signal or power pins. improved frequency performance than their analog counterparts. plot), but in many cases, this does not present an issue. sinking capability of the driver.

REV. 0–10– ADG3243 OUTLINE DIMENSIONS 8-Lead Small Outline Transistor Package [SOT-23] (RJ-8) Dimensions shown in millimeters 1 3 5 6

2.90 BSC

1.60 BSC

1.95 BSC

0.65 BSC

0.38 0.22

0.15 MAX

1.30 1.15

0.90 SEATING

1.45 MAX 0.22 0.08 0.60 0.45 0.30 8/H11543 4/H11543 0/H11543

2.80 BSC

COMPLIANT TO JEDEC STANDARDS MO-178BA

–11–

C04310–0–8/03(0) –12–