ADG222TQ

ADG221 AD | Alldatasheet

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ANALOG Le’MOs Co DEVICES Quad SPST Switches FEATURES FUNCTIONAL BLOCK DIAGRAM 44V Supply Maximum Rating + 15V Analog Signal Range Ty owe ee Low Leakage (0.5nA) Break-Before-Make Switching oO S1 Extended Plastic Temperature Range INTO “"g opt Low Power Dissipation (25.5mW) IN2 0 aes »P, TTL, CMOS Compatible input] @ 0 p2 Available in 16-Lead DIP/SOIC and | | LATCH O S3 20-Lead PLCC/LCCC Packages IN3 © ay Surface Mount Packages 0 D3 Superior DG221 Replacement ina O S4 wn P& “Fo ps WR oO ADG221 ADG222 GENERAL DESCRIPTION PRODUCT HIGHLIGHTS The ADG221 and ADG222 are monolithic CMOS devices com- 1. Easily Interfaced: prising four independently selectable switches. On-chip latches Digital inputs are latched with a WR signal for microprocessor facilitate microprocessor interfacing. They are designed on an interfacing. A SV regulated supply is internally generated enhanced LCMOS process which gives an increased signal permitting wider tolerances on the supplies without affecting handling capability of + 15V. These switches also feature high the TTL digital input switching levels. switching speeds and low Ron. 2. Single Supply Operation: The ADG221 and ADG222 consist of four SPST switches. They For applications where the analog signal is unipolar (OV to differ only in that the digital control logic is inverted. All devices 15V), the switches can be operated from a single + 15V exhibit break before make switching action. Inherent in the supply. design is low charge injection for minimum transients when 3. Low Leakage: switching the digital inputs. Leakage currents in the range of SO0pA make these switches suitable for high precision circuits. The added feature of Break-before-Make switching allows for multiple outputs to be tied together for multiplexer applications while keeping leakage errors to a minimum. __ | aDG221 ADG222 SWITCH WR | IN IN CONDITION 0 0 1 ON 0 1 0 OFF 1 x xX Retains Previous Switch Condition Tablel. Truth Table REV. B Information furnished by Analog Devices is believed to be accurate and which may result from its use. No license is granted by implication or Tel: 617/329-4700 Fax: 617/326-8703 Twx: 710/394-6577 otherwise under any patent or patent rights of Analog Devices. Telex: 924491 Cable: ANALOG NORWOODMASS

ADG221 /ADG222 —_ SPECIFICATIONS (Von = +15V, Vos = —15V, unless otherwise specified) K Version BVersion T Version —40°C to -40°Cto -55°Cto Parameter sec +85°C | 25°C 85°C | 25°C —-+125°C Units _| Test Conditions ANALOG SWITCH Analog Signal Range #15 15 +15) #15 +15 415 Volts Ron 60 60 60 Quyp -10V<V= +10V 90 145, 90 145, 90 145 Qmax | Ips=1.0mA ‘Test Circuit 1 Ron vs. Vp (Vs) 20 20 20 %otyp Ron Drift 0.5 0s 0.5 %°Ctyp Ron Match 5 5 5 %etyp | Vs=0V,Ips=1mA 1,(OFF) 05 05 0.5 nAtyp | Vp= *14V;Vs ¥14V; Test Circuit2 OFF Input Leakage 2 100 2 100 1 100 nA max Tp (OFF) 0.5 05 05 nAtyp — | Vp=+IMV;Vs=*14V;Test Circuit2 OFF Output Leakage 2 100 2 100 1 100 nA max Tp (ON) 05 05 0.5 nAtyp | Vp = * 14V5TestCircuit3 ON Channel Leakage 2 200 2 200 1 200 nA max DIGITAL CONTROL Vin Input High Voltage 24 24 24 Vmin Vint» Input Low Voltage 08 0.8 08 Vmax Tye. oF Tixet 1 1 1 Amax DYNAMIC CHARACTERISTICS toren 30 30 30 nstyp ton! 300 300 300 nsmax ‘Test Circuit 4 torr! 250 250 250 nsmax | TestCircuit4 ty! Write Pulse Width 100 100 100120 nsmin | See Figure2 ts! Digital Input Setup Time 100 100 100120 nsmin | See Figure2 ty! Digital Input Hold Time 20 20 20 20 ns min See Figure 2 OFF Isolation 80 80 80 dBtyp | Vs=10V(p-p)s f= 100kHz Ry =750; Test Circuit6 Channel-to-Channel Crosstalk —_| 80 80 80 4Btyp | Test Circuit? Cs(OFF) 5 5 5 pF typ Cp (OFF) 5 5 5 pF yp Cp, Cs(ON) 16 16 16 pF typ Ciy Digital InputCapacitance | S 5 5 pF yp Quny Charge Injection 20 20 20 pCtyp | Rs=00;C, = 1000pF; Vs=0V Test Circuit POWER SUPPLY lop 0.6 06 0.6 mAtyp | Digital Inputs=Vinior Vint Ipp 15 1S LS mAmax Iss Ol O1 O1 mAtyp Iss 0.2 0.2 0.2 mA max Power Dissipation 25.5 25.5 25.5 mW max NOTE "Sample tested at 25°C to ensure compliance, Tons torr are the same for both IN and WR digital input changes. Specifications subject to change without notice. ABSOLUTE MAXIMUM RATINGS* (Ta= +25°C unless otherwise stated) Vpp toVss oe ee ee ee eee ees 44V Power Dissipation (Any Package) Analog Inputs’ Operating Temperature DigitalInputs' Vpp +2Vor —_ ‘Overvoltage at IN, WR, S or D will be clamped by diodes. Current should be 20mA,Whichever Occurs First iitedtothe Maximum Rating above. *COMMENT: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one Absolute Maximum Rating may be applied at any one time. -2- REV. B

ADG221/ADG222—Typical Performance Characteristics The switches are guaranteed functional with reduced single or dual supplies down to 4.5V. 150 150 1 /\\ tw NW, / | ey \\ 60] | iN LN ~ © ss FFT

0 Veo= 218 30

-20 1 10-5 ~~ BONO “0-18-10 50 45D HIS 420 Vo (Vs) ~ Volts Vo (Ve) - Votts Ron as a Function of Vp (Vs): Dual Supply Voltage Ron as a Function of Vp (Vs): Single Supply Voltage 100 25 a 8 IZLE ZL g crn, tore | Ss A A AY A A | Ej = on 2 3s 4585 OSS TOHCTTS ZS 5 7 2 1" 13 6 rewpenavune -¢ SUPPLY VOLTAGE - Volts Leakage Current as a Function of Temperature (Note: Trigger Level vs. Power Supply Voltage: Dual or Single Leakage Currents Reduce as the Supply Voltages Supply Voltage Reduce) 500 500 — | [| : . P| | 100 a 100 Kot | | a A es ee a a 25 v7 Pry =H cry +15 +5 +7 79 ma rr) 75 ‘SUPPLY VOLTAGE - Volts SUPPLY VOLTAGE - Volts Switching Times vs. Supply Voltage (Dual Supply) Switching Times vs. Supply Voltage (Single Supply) -4- REV. B

D 1s (OFF) ly (OFF) [so | Or -© Ce a cay +1av (A) to (on) o~o b af =v Vs == . T Ron=V1llos Test Circuit 1 Test Circuit 2 Test Circuit 3 +15V 3V ADG221 Vw \\ 50% 50% 1 1 s D we IN ' Vin f 0% 50% 1>0 4 om 3302 ‘ADG222 \\ b y, 14pF ' ! @) [ono vss | Fao 1 Ys0r. vo if! if V Vo -asv V od ton be mtorr jae Test Circuit 4 +15V v, AD: 5V [ teletaraten 0 714 ire ! Rs! see « \\ / t ' 1 OV. wp! Sos mm t” ro | Vo 3Vo va) [ono vee |V cnimcxava V V ~15V Test Circuit 5. Charge Injection +15V 1 oT-o =D roo i % irae ore Tt Vin © ot Wi U R. \\ > ah V GT] px<fpowm s&) ono vss_| V rr ee V Vo og fp aaa? ots ==="F one ADG221 Viy=5V OFF ISOLATION = 1a GND__Vss ADG222 Vin = OV 20x LOGIVs/Vol : b Vo new ADG221Vjy=0V CHANNEL-TO-CHANNEL ADG222 Viy=5V CROSSTALK = 20xLOG|Vs/Vo| Test Circuit 6. Off Isolation Test Circuit 7. Channel-to-Channel Crosstalk REV. B -5-

TERMINOLOGY ton Delay time between the 50% and 90% points of os . the digital input and switch “ON” condition Ron Ohmic resistance between terminals OUT and S torr Delay time between the 50% and 90% points of Ron Match Difference between the Rox of any two channels y time 50% and 90% point ren § veeen the R tro channels the digital input and switch “OFF” condition s (OFF) Rource terminal leakage current when the swit! torrn “OFF” time measured between 50% points of t . both switches, which are connected as a multi- To (OFF) Drain terminal leakage current when the switch plexer when switching from one addseee tate to . another x Tp (ON) Leakage current that ls fom the closed switch yi, Maximum Input Voltage for a Logic Low a Vp (Ve) avolon velter inal D, § Vint Minimum Input Voltage for a Logic High g p Ws nalog voltage on terminal D, Ss lint (inst) Input current of the digital input 8 Cs(OFF) Switch input capacitance “OFF” condition v Most positive voltage sepply 3 Cp (OFF) Switch output capacitance “OFF” condition Ven Most negative voltage supply ° Gw Digital input capacitance Ipp Positive supply current Cp, Cs (ON) Input or output capacitance when the switch Ics Negative supply current is on » OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 16-Pin Plastic (N-16) 20-Terminal Plastic Leaded Chip Carrier - (P-20A) T sta anove gasiasn som 2008 ga (hes 20088, 8388 3 a + sos one fees 0375) 0755 0918) 0.206 (778) te.966 0076) 90 bal er { ine enh {pera t 4) Aanon ono Dm, 0025 +001 ovaan Om 1356) +t 7 R jogs 2025) rea oraoT oe ee bh { at i F Ct oer = ~— —— 7 888 oem B | aE gee econ, Ulu cory = q D — qe 4b Fonz t0 2051 d 1, 5 — geesiies) oortenom ovrlaen 008 10703 020 | Db 000 cose Sena Gases | sae wen oF hae So Leaps ane SOLDER OA TmPATED KOVAR OW ALOY 42 =r cua —- oes 16-Pin Cerdip(Q-16) Rel ae i ae (051) MAX tn 6.060 pay Fr aol pen 20-Terminal Leadless Ceramic Chip Carrier bial (E-20A) ig 0.32 (8.128) 0.082 + 0,018 : BH 20s = 8828, cag | ous tasral os oobi ead UU, an TY oo p Car 0.38 2 0075) Sa ll prrrn = = pel deo be Vb = eo : = = 16-Lead Narrow Body SOIC (R-16A) Nn 20 « 0 (27) sortom view (ost = 459 < fAffffif *...., 3 i f Sateeteoo g 6 xs a0o Z Ser Fd rs PII ooet | c.or96 050) essen, ome 25)“ F 0.0688 (1.75) doo) Fa ae Neca 800s OIF JF soo tar aoree assy SEATING Bsc oraE as} osoo ita taveo(aat -6- REV. B