ADDAC80Z-CBI-I

ADDAC80 AD | Alldatasheet

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| ANALOG Complete Low Cost 12-Bit DEVICES D/A Converters FEATURES FUNCTIONAL BLOCK DIAGRAMS Single Chip Construction On-Board Output Amplifier Low Power Dissipation: 300mW amen veo mew SE! Sa Monotonicity Guaranteed over Temperature oo | E [otite, 1a] cam aonsr Gl [3] can sons Guaranteed for Operation with + 12V Supplies Gh ae aa Fn Improved Replacement for Standard DAC80, DAC800 re eee faa} smmanvenon os} Be = Ff son nom HI-5680 veel] Se PEL ae ws EH Se ao cana wane High Stability, High Current Output we cH gcse | Fa mace wo a A da encom Buried Zener Reference Gh Ta] evounoreer wre af | [aspen Laser Trimmed to High Accuracy: “Gh were mo ee 4 wre TF) vas w= wfe} 15) + 1/2LSB max Nonlinearity tne ay £ > a wnat Fy». Low Cost Plastic Packaging snot w | a he wwe sar eafap-—J Fa] wes PRODUCT DESCRIPTION PRODUCT HIGHLIGHTS The AD DAC80 Series is a family of low cost 12-bit digital-to-ana- 1. The AD DAC80 series of D/A converters directly replaces all log converters with both a high stability voltage reference and other devices of this type with significant increases in output amplifier combined on a single monolithic chip. The AD performance. DAC80 Series is recommended for all low cost 12-bit D/A converter >. Single chip construction and low power consumption provides applications where reliability and cost are of paramount the optimum choice for applications where low cost and high importance. reliability are major considerations. Advanced circuit design and precision processing techniques 3. The high speed output amplifier has been designed to settle - result in significant performance advantages over conventional within 1/2LSB for a 10V full scale transition in 2.0us, when DAC80 devices. Innovative circuit design reduces the total properly compensated. power consumption to 300mW which not only improves reliability _ : but also improves long term stability. 4. The precision buried Zener reference can supply up to 2.5mA The AD DAC80 incorporates a fully differential, non-saturating : . precision current switching cell structure which provides greatly 5- The low TC binary ladder guarantees that all units arc increased immunity to supply voltage variation. This same struc- monotonic over the specified temperature range. ture also reduces nonlinearities due to thermal transients as the 6. System performance upgrading is possible without redesign. various bits are switched; nearly all critical components operate at constant power dissipation. High stability, SiCr thin film PRODUCT OFFERING resistors are trimmed with a fine resolution laser, resulting in Analog Devices has developed a number of technologies to lower differential nonlinearity errors. A low noise, high stability, support products within the data acquisition market. In serving subsurface Zener diode is used to produce a reference voltage the market new products are implemented with the technology with excellent long term stability, high external current capability best suited to the application. The DAC80 series of products and temperature drift characteristics which challenge the best was first implemented in hybrid form and now it is available in discrete Zener references. a single monolithic chip. We will provide both the hybrid and ‘The AD DAC80 Series is available in three performance grades monolithic versions of the family so that in existing designs and two package types. The AD DAC80 is specified for use changes to documentation or product qualification will not have over the 0 to +70°C temperature range and is available in to be done. Specifications and ordering information for both both plastic and ceramic DIP packages. The AD DAC85 and versions are delineated in this data sheet. AD DAC87 are available in hermetically sealed ceramic packages and are specified for the — 25°C to +85°C and —S5°C to + 125°C temperature ranges. REV. A Information furnished by Analog Devices is believed to be accurate and which may result from its use. No license is granted by implication or Tel: 617/329-4700 Fax: 617/326-8703 Twx: 710/394-6577 otherwise under any patent or patent rights of Analog Devices. Telex: 924491 Cable: ANALOG NORWOODMASS

AD DAC80/AD DAC85/AD DAC87 —SPECIFICATIONS ‘ose: anes oboe supplies unless otherwise noted.) Model AD DACs AD Dacs? Min Typ Mex | Min Typ Mex | Unite TECHNOLOGY DIGITAL INPUT Binary=CB 2 2 2 Bits BcD-ccD - - - Digits Logic Levels (FTL. Compaile) Vin(Logie"") +20 +ss | 420 ass | +20 ass |v Vu. (Logic “0") o +08 o +08 o +08 v In = 559) 0 250 Pe HA IVa = 089) 100 100 100 ba TRANSFER CHARACTERISTICS ACCURACY Linearity ror @ + 25% cel =a =10 aa | use cep Ls Ta@ Taint Tour 14 20 =u 22 212 au | ose Diflerental Linety Eror @ + 25°C cat 24 234 au | Ls cep ise TAG Tinto Toe 2 #1 Pa Isa Gain Error? 201 203 201 202 20.1 202 % FSR! Offset Ero? 2005 201s 2005 x01 2005 soa | «FSR? Temperature Range for Guaraceed “Monetonicisy ° +70 35 vs | ass sas |e DRIFT Tint 9 Tow) Tova Bipolar Deift,max includes ain, ‘off, and liner dri) 220 20 230 | ppmor sere Tova Err Tanto Unipolie 2008 =01s 20.2 202 =o 203 | socFsR Bipolar 006 20.10 =o0t son 20.18 2024 | sofFSR Gain Including Lnternal Reference Par 230 20 220 | ppmotFsr-c Excloding Imeral Reference Pv 27 =10 210 | ppmofFSR-C Unipoine Ofte 21 33 Pe) 3 ppmofFSR"C Bipolar Offer 2s 210 210 210 | ppmofFSR7C TONVERSION SPEED Voluge Model (V? Setting Time o = 0.01% of FSR for FSR change 2kM/S00pF load) with lOKAFeedback 3 ‘ a ‘ 3 ‘ o with sknFeedback 2 3 2 3 2 3 o Fer LSB Change 1 1 1 os Slew Rate 0 10 10 Vins ANALOGOUTPUT Voliage Models Ranges-CBl £25, 25,210, £25,25,210, 225, 25,210, v +5410 $5,410 +5210 -ccp v Ourput Correct = 2s 2s mA Ovepa impedances) 0.05 005 as a Short Circuit Current “ “0 © mA Internal Reference Voltage Va) +6 463 +637 | 46.29 463 +637 | 4623 +63 ver |v ‘Output Impedance us 1s Is a ‘Mex Exernal Curren +25 425 42s | oma Tempenof Drift 210 220 +10 220 210 | ppmotvare FOWER SUPPLY SENSITIVITY = 15V = 10%, SV suppty when applicable soa 20002 | sof FSRMV =i 25% 0.002 0002 | mot FSRMV, OWERSUPPLY REQUIREMENTS Rated Voltages 21s ais ais v Range Analog Supplies 2a 2165 sue 216s sna 165 v Logie Supplies v ‘Supply Drain 12, +150 s w s » s ” mA “2, -asv “ 2» io » 4 » mA ‘TEMPERATURERANGE Specification 0 sm | os vs | ss +s | Operating ~15 sis | ss +s | 55 sas | Storge =35 sas | 6 +10 | 65 a0 | Nore TRrminimam of £1230 regurd fore = 10V ful walk opr a "Least Significant Bit. ‘£11.4V is required for all other voltage ranges. ‘papa to eo with exer trim potenometer Gcanassabiet to change without nti. PSR means “Fal Scale Range" andi 20V forthe 10V rang ad 10V forthe 25V Range. beapcenone ness tne ned oval production unitate et {non ti ene ae mr + 2° ‘Alta. Rel rom tho ter ae wed ocala otgang ality vel All ‘Maxson wih no deqrdatio of pectin, mat be x conan od. i col es spate suroteds akong aly fess howe in ~2- REV. A F

Model AD DACHD ap Dacasc AD pacts Min Typ Max | Min Typ Mx | Min Tye Max | Unite TECHNOLOGY a | . DIGITALINPUT Binary=CBE R 2 2 Bit BcD-cCD 3 3 3 Digs Logic Levels TTL Compaibe ViutLc "1 +20 ass | +20 sss | +20 ass |v Vic Logie") 0 vos |o tos | o tos |v Ty.Vn. = 0.8V) =10 = 100 100 HA "TRANSFER CHARACTERISTICS ACCURACY Lineaiy Ermer + 25°C cat 2 zi =” siz | usp! cep 208 214 a7) su | isp TAG Trt Trae 2M za = 21a a) sia | tsp Difereaial Lineasty Eror @ +280 car 2a 2M =a 22 sp cep =i 212 =n 22 1B Tai Tat0 Ta 31 = Pn tsp Gain Error? 20.1 203 20.1 201 ‘% FSR? Offset Error’ 20.05 20.15 20.05 20.05 FSR? Temperature Range for Guarniecd Monotoacity 0 +m Jo 0 | = +s fic DRIFT (Twas (0 Tas) ‘Toa Bipolar Drift, max incude gin, ff, andineaiy dis) 22 Ppmof FSR"C ‘Total Exrot (Train to Trmus)* ‘Unipolar 2008 015 SsofFSR Bier 2006 2010 SofFSR Gain Including lteral Reference ais 20 10 210 | ppmocFSR-C Excluding Iter Referese = 27 210 210 | ppmofFSR°C Unipolar Ot zl 3 2 st prmetFSR-C Bipolar Off 3 210 +10 210 | ppmofFSRC CONVERSION SPEED ‘Voltage Model (V)* Setling Time to 0.01% of FSR for FSR change 2K05009F ond) with 10KiTFedback s s s “ with SktFeedback 3 3 3 - For LSB Change Ls us 1s “ Slew Rate o os 2» 2 Vins Current Model (1) Setting Timeto = 0.01% of FSR for FSR Chang 10101001 Load 300 300 20 1 foe Veh Load i 1 1 INALOGOUTPUT Voliage Models Ranges ~CBI £25,25,210, £25; 25,210, 225,25, 210, v +5010 $5,410 5410 -ccp par) +10 +0 v ‘Output Current +s 3 as mA Ouipt impedance) 0.08 00s ous a Shor Ciresit Duration Indefinite toComnmen Indefinite Common IndefitetoCommen current Models Ranges- Unipolar -20 -20 20 mA poe 210 210 210 A Oupuc impedance Bipolar 32 ua 32 in “Unipolar 6s 66 66 a Complince “15,410 =25, +10 “25, +10 v Interna Reference Volge (V3) +617 463 vou | 9617 363 ven | soir ses vous |v ‘Output impedance Is Is Is a Max Exereal Curent +2 sas sas | ma Tempcoof Def =10 20 =10 29 210 220 | ppmotvare POWERSUPPLY SENSITIVITY =1SV = 10h, SV supply when applicable Sof FSRNVs POWER SUPPLY REQUIREMENTS ated Votages ass 215.5 215.5 v Range Analog Sepia 2 a | sus ass | sus sss |v Love Suplie +45 ve | sas sss | 44s siss |v ‘Supply Drain’ zisy 0 x» is 20 s » mA fisv 20 8 FS 30 Fa Fy mA ov a E Fi 2» s » mA TENPERATURERANGE Speciation 0 +m | o +m | =a ws | Operating -2s +85 = +85 -s5 +128 c Storage -35 +130 65 +150 ~65 +180 c Nores "Least Signin Bi Scy=0, see Figure "adja to aero with enero rim potions. ‘shsimam wt no daradaon of speciieson, must be constant ad APSR mean "Fall Sale Range” ad i 20 forthe = 10V range and 1V forthe = SV eange, "Icuding Sad lad “Gain and offi errors ase tomo at 425°C #250 spl required onl for CCD verions. Speciation sbjc to change witout noes. REV. A -3-

AD DAC80/AD DAC85/AD DAC87—SPECIFICATIONS ‘ies mies: otras supplies unless otherwise noted.) Model AD DACASLD AD DACESMIL. AD DAGH Mia Ty Max | Min Typ Max | Min Typ Max | Unite TECHNOLOGY Hybrid re a DIGITAL INPUT Binary CBI 2 2 2 Bits acb-ccb - - - Digits Logic Levels TTL Compatible) Vintage 1") 420 ass | 420 oss | 420 vss | ov Vit (Logic"0") 0 vor | 0 vos | o sos | ov (Vie = $5) +250 +250 +280 oA In (Wn = 0.V) 100 100 ‘0 nA TRANGFERCHARACTERISTICS ACCURACY Lineariy Error + 25°C cat 22 Py U4 sa | ise cep - - : usp Tal Tot Toe 212 =u su | usp Diferemial Linearity Error G+ 25°C cl ry 2 22 1sB cep sp TAG Toto Tae 2 2 = Ise Gain Error? 20.1 20.1 201 202 ‘ESR! Offset Error? £0.05 £0.05 20.05 201 ‘WFSR? “Temperanre Range fr Guaranteed Monotonic -3 vs | oss vas | oss sas foc DRIFT Trist0 Tra) Tora Bipolar Drift,mex incodes sain, ‘dfetandineaiy ifs) - - Py 0 | ppmocrsnrc Total Error Tanto Tn)" Unipaiae - - 013 2030 | %otFsR Bipolar : : 2012 2024 | of FSR ain Including Internal Reference =10 220 210 225 | ppmocrseec Exclding Internal Reference as 210 | pomofFSR°C Unipolar Offer 21 2 = 23 pomofFSR°C Bipolar Offset 2 210 35 =10 | epmoc FSRrC TONVERSIONSPEED Voltage Model (Vy Settling Timeto = 0.01% of FSR for FSR change 2k0|S00pF oad) vith Oki Feedback s s “ wrth ski Feedback 3 3 a For LSB Change Ls Ls te Slew Rate » 2» Vis Curent Model) Seng Time = 0.01%60f FSR foc FSR Change 1010100 Load 300 20 foe Ik Load 1 1 ne ANALOGOUTPUT Vatuge Models Ranges CBI 225,25,210, 225,25, 210, £25,25,210, v $5,410 5,410 45,510 -ccp v vipat Current ss 2s ss aA ‘Ourpat impedance (de) ows os 0.05 a Short Cet raion Indefinite to Common Indefinite to Common Indefinteto omen ‘current Models Ranget- Unipolar -20 -20 -20 oA apt 210 210 210 mA Cutput impedance Bipolar 32 32 2s 32 at Py ~Unipolar 66 66 50 66 a2 0 Compiiance “25, +10 “25, +10 “1.5, +10 v Internal Reference Volage(Va) 4617 463 oa | 67 +63 seas | 4617 463 soa |v Output impedance Is is is a ‘Max External Caren! a25 325 sas | ma Tempeoof Drift +10 » 0 » 2s fo pomot Var POWER SUPPLY SENSITIVITY =15V = 10%, SV supply wher applicable 0.002 £0003 | %ofFSRVs POWER SUPPLY REQUIREMENTS Raced Volages 215,5 25s £15, v Range : ‘Alog Supplies sus sss | sus ziss | #15 ses |v Logic Supplies +45 viss | +45 siss | +45 vis |v ‘Supply Drain” “15V 15 x0 5 2» 0 2» mA aed Fa x0 3 20 2» 35 mA av 15 Fa i » 0 20 mA TEMPERATURERANGE Speciation -2 sas | ss sas | -s sus | Operating “ss vas | =ss tus | oss tas | Storage =35 41s | ss si | -6 +10 | Noes "Tent Spica Bit 5cy0, se Figure la. ‘pate ce with exe petite, ‘Neca with mo degradation speciicon, ma be & coat oud °FSR means “Full Scale Range” and is 20V for the 10V range and 10V for the + SV range. “Including SmA load. “Gain unde ervrsedjed tor at 423°C 1 7SV supply required only for CCD versions. Spcifenons subject to change without notice. -4- REV. A

sas wr (7} Fe] Yaw oT woos or 1 [7] F4] vas 07 “Gt | ! Fy camaaner “EL | : Fa] omar ora Gr [22] +¥s ona Gy [22] +ve wre [et {73} common ore sar {21] common ws EH sate He} Sy em ner we et Fa] came newon wre ety cee | JS | 0 Face ove fey] [28 FF sean nerwom wr? cH ccuanent U5 ev RANGE ar? FH lide a scaLine NETWORK Serene om ome oF [eroLAn OFFSET are oe oo rowan oFese =H = weve iH Fa)srner or [i] {75] Vour an fe] {35} oar on a] Fy. aes a] Fw (spam 12 [ra] novever use ar 12 [32] [ra] xe sve AD DACEO *NC- C8 VERSIONS Ne - 6a VERSIONS 5V Goo Versions ++5V 600 VERSIONS Voltage Model Functional Diagram and Pin Configuration Current Model Functional Diagram and Pin Configuration ORDERING GUIDE Input Output Temperature Linearity Package Model Code Mode Technology | Range Error Option* AD DAC80N-CBI-V Binary Voltage Monolithic | Oto +70°C +1/2LSB N-24 AD DAC80D-CBI-V Binary Voltage Monolithic | Oto +70°C +12LSB D-24 AD DAC85D-CBI-V Binary Voltage Monolithic — 25°C to + 85°C +1/2LSB D-24 AD DAC87D-CBI-V Binary Voltage Monolithic —55°Cto +125°C | +1/2LSB D-24 AD DAC80-CBI-V Binary Voltage Hybrid Oto + 70°C +1/2LSB DH-24A, = AD DAC80-CBI-I Binary Current | Hybrid Oto + 70°C +V/2LSB DH-24A ' AD DAC80-CCD-V Binary Coded Decimal Voltage Hybrid Oto + 70°C + 1/4LSB DH-24A, AD DAC80-CCD-I Binary Coded Decimal Current Hybrid Oto +70°C + V/4LSB DH-24A AD DAC80Z-CBI-V Binary Voltage Hybrid Oto +70°C +1/2LSB DH-24A AD DAC80Z-CBI-I Binary Current Hybrid Oto + 70°C +1/2LSB DH-24A AD DAC80Z-CCD-V Binary Coded Decimal Voltage Hybrid Oto + 70°C + V4LSB DH-24A AD DAC80Z-CCD-I Binary Coded Decimal Current | Hybrid Oto +70°C + V4LSB DH-24A AD DAC85C-CBI-V Binary Voltage Hybrid Oto +70°C + V/2LSB DH-24A AD DAC85C-CBI-I Binary Current Hybrid Oto +70°C +1/2LSB DH-24A AD DAC85-CBI-V Binary Voltage Hybrid —25°Cto + 85°C +12LSB DH-24A AD DAC85-CBI-I Binary Current | Hybrid —25°C to + 85°C +V2LSB DH-24A, AD DAC8SLD-CBI-V Binary Voltage Hybrid —25°Cto + 85°C +V2LSB DH-24A, AD DAC8SLD-CBI-I Binary Current | Hybrid —25°Cto + 85°C +V/2LSB DH-24A AD DAC85MIL-CBI-V Binary Voltage Hybrid -55°Cto + 125°C | +1/2LSB DH-24A AD DAC8S5MIL-CBI-I Binary Current | Hybrid —55°Cto + 125°C | +1/2LSB DH-24A AD DAC8SC-CCD-V Binary Coded Decimal Voltage Hybrid Oto +70°C + V/4LSB DH-24A AD DAC8SC-CCD-I Binary Coded Decimal Current | Hybrid Oto +70°C + V4LSB DH-24A AD DAC85-CCD-V Binary Coded Decimal Voltage Hybrid — 25°C to + 85°C + V/4LSB DH-24A AD DAC85-CCD-I Binary Coded Decimal Current Hybrid — 25°Cto + 85°C + V/4LSB DH-24A AD DAC87-CBI-V Binary Voltage Hybrid —55°Cto +125°C | +1/2LSB DH-24A AD DAC87-CBI-I Binary Current {| Hybrid —55°Cto + 125°C | +1/2LSB DH-24A *For outline information see Package Information section. **Z-Suffix devices guarantee performance of 0 to + SV and +SV spans with minimum supply voltages of + 11.4V. REV. A -5-

AD DAC80/AD DAC85/AD DAC87 DIGITAL INPUT CODES ILSB change is measured at the major carry(0111...11to The AD DAC80 Series accepts complementary digital input 1000... 00), the point at which the worst case settling time code in binary (CBI) format. The CBI model may be connected occurs. The settling time characteristic depends on the compen- by the user for anyone of three complementary codes: CSB, sation capacitor selected, the optimum value is 25pF as shown COB or CTC. in Figure la. Table |. Digital Input Codes Current Output Models. Two settling times are specified to + 0.01% Digital Analog Ou of FSR. Each is given for current models connected with two - igital Input nalog Output different resistive loads: 10 to 100 ohms and 1000 to 1875 ohms. Msp isp | Seuareiary | Otmetsiney | Tee'eCompl, 2ternal resistors are provided for connecting nominal load 000000000000] +FallSale + Full Seale TLS resistances of approximately 1000 to 1800 ohms for output voltage sta] ee | 2h” | —Ful Scale ranges of +1V and 0 to —2V. 1 100000000000 | Mid-Scale —1LSB +Full Scale E TLELIQL1 01114 Zero ~ Full Scale Zero . “Invert the MSB of the COB code with an external inverter to obtain CTC code. 10v TEKTRONIX 1-12 | para ven 2 Tats Accuracy error of a D/A converter is the difference between the @) Se t™ J analog output that is expected when a given digital code is applied 1 and the output that is actually measured with that code applied v Se to the converter. Accuracy error can be caused by gain error, tov zero error, linearity error, or any combination of the three. Of Vv these three specifications, the linearity error specification is the ‘psz16s specified over its entire temperature range. This means that the Figure 1a. Voltage Model Settling Time Circuit analog output will not vary by more than its maximum specifi- cation, from an ideal straight line drawn between the end points (inputs all “1s and all “0”s) over the specified temperature range. Differential linearity error of a D/A converter is the deviation from an ideal 1LSB voltage change from one adjacent output state to the next. A differential linearity crror specification of + 1/2LSB means that the output voltage step sizes can range from 1/2LSB to 1 1/2LSB when the input changes from one adjacent input state to the next. DRIFT . — Gain Drift is a measure of the change in the full scale range Figure 1b. Voltage Model Settling Time Cr = 26pF output over temperature expressed in parts per million of full POWER SUPPLY SENSITIVITY scale range per °C (ppm of FSR/°C). Gain drift is established Power supply sensitivity is a measure of the effect of a power by: 1) testing the end point differences for each AD DAC80 supply change on the D/A converter output. It is defined as a model at the lowest operating temperature, +25°C and the per cent of FSR per per cent of change in cither the positive or highest operating temperature; 2) calculating the gain error with —_yegative supplies about the nominal power supply voltages. respect to the +25°C value and; 3) dividing by the temperature change. REFERENCE SUPPLY Offset Drift is a measure of the actual change in output with all All models are supplied with an internal 6.3 volt reference voltage “1s on the input over the specified temperature range. The supply. This voltage (pin 24) is accurate to + 1% and must be maximum change in offset is referenced to the offset at +25°C connected to the Reference Input (pin 16) for specified operation. and is divided by the temperature range. This drift is expressed This reference may also be used externally with external current in parts per million of full scale range per °C (ppm of FSR*C). drain limited to 2.5mA. An external buffer amplifier is recom- mended if this reference is to be used to drive other system SETTLING TIME components. Otherwise, variations in the load driven by the Settling time for cach model is the total time (including slew reference will result in gain variations. All gain adjustments time) required for the output to settle within an error band should be made under constant load conditions. around its final value after a change in input. Voltage Output Models. Three settling times are specified to +0.01% of full scale range (FSR); two for maximum full scale range changes of 20V, 10V and one for a 1LSB change. The -6- REV. A A

: temperature coefficient. The input reference current to the errors. amplifier, OA, also contributes a small error. Ream relative to the DAC resistors. Total error is defined as the deviation from a true straight line « ae . calls for zero output to a point which is defined as full scale. A the bipolar offset drift will be zero even if the reference drifts. reference element results in superior wide temperature range drift, as well as full scale drift, but again is held to 10ppm/°C. performance. The gain setting resistors and bipolar offset resistor max.

3 A =

Figure 2. Bipolar Configuration input — Figure 3. Unipolar and Bipolar Drifts

. the TCR of Ry (or Rr) to the total drift. Figure 7. Output Amplifier Voltage Range ranges are not required, the external resistors are not needed.

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24-Pin Ceramic DIP (DH-24A) iy wo, su240 | IDENTIFIER 1.210 £0.01 oees (2.16) Eee al rr rT 085 ‘ozs S008) ‘ REV.A -11-