ADD8702 AD | Alldatasheet
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Technical content
REV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective companies. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved. ADD8702 12-Channel Gamma Buffers with VCOM Buffer PANEL TIMING CONTROLLER TIMING AND CONTROL SCAN DRIVER CONTROL GAMMA REFERENCE VOLTAGES GAMMA VCOM R 384 SOURCE DRIVER NO. 1 768SCAN DRIVERS TFT COLOR PANEL 1024 /H11547 768 384 SOURCE DRIVER NO. 2 384 SOURCE DRIVER NO. 8 ADD8702 G B Figure 1. Typical SVGA TFT LCD Application
FEATURES
Programmable 12-Channel Gamma Reference Generator Mask Programmable Adjustable V COM Buffer Upper/Lower Outputs Swing to V DD/GND Continuous Output Current: 10 mA V COM Peak Output Current: 250 mA Outputs with Fast Settling Time for Load Change Output Pins Are Compatible with ADD8701 Single-Supply Operation: 7 V to 16 V Supply Current: 15 mA Max
APPLICATIONS
The ADD8702 is a low cost, mask programmable, 12-channel gamma reference generator, plus an adjustable VCOM driver. This part is designed to provide gamma correction for high resolution TFT LCD panels. The 12 gamma reference levels and VCOM are mask programmable to 0.3% resolution using the on-chip 500 chain resistor string. This reduces component and board costs. The ADD8702 provides a complete programmed set of gamma voltage references for the LCD source drivers. These references settle quickly to load change. The V COM output is stable with high capacitive loads and can source or sink 250 mA peak cur- rent. The V COM output level can be adjusted using an external trim-potentiometer or discrete resistors. The output pins are compatible with the ADD8701. This allows for single board design and fast turns for prototyping using the initial ADD8701 board design. The ADD8702 is specified over the temperature range of –40 °C to +85°C and comes in the 32-lead lead frame chip scale pack- age (LFCSP) for compact board space.
REV. 0–2– ADD8702–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
Parameter Symbol Conditions Min Typ Max Unit OUTPUT ACCURACY VSYSTEM ERROR V SY ERROR 10 50 mV MASK PROGRAMMABLE RESISTOR STRING Total Resistor String R TOTAL 500 Elements VLOW to VHIGH 22.5 k Ω Resistor Matching R MATCH Any Two Segments 1 % OUTPUT CHARACTERISTICS Output Voltage High V OUT IL = 100 µA 15.995 V (VGMA11, VGMA12) I L = 5 mA 15.85 15.95 V Output Voltage Mid V OUT IL = 5 mA 14.6 V (VGMA3 to VGMA10) Output Voltage Low V OUT IL = 100 µA5 m V (VGMA1, VGMA2) I L = 5 mA 50 150 mV –40°C ≤ TA ≤ +85°C 250 mV Continuous Output Current I OUT 10 mA Peak Output Current I PK 150 mA Settling Time—Voltage t S 1 V Step 0.1%, RL = 10 kΩ, CL = 200 pF 1 µs VCOM CHARACTERISTICS Continuous Output Current I OUT 35 mA Peak Output Current I PK 250 mA Settling Time—Voltage t S 1 V Step 0.1%, RL = 10 kΩ, CL = 200 pF 0.8 µs SUPPLY CHARACTERISTICS Supply Voltage V DD 71 6 V Power Supply Rejection Ratio PSRR V S = 6 V to 17 V, –40°C ≤ TA ≤ +85°C6 8 7 5 d B SUPPLY CURRENT I SYS No Load 11 15 mA –40°C ≤ TA ≤ +85°C1 6 m A Specifications subject to change without notice. (VDD = 16 V, TA = 25/H11543C, unless otherwise specified.)
REV. 0 ADD8702 –3– CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADD8702 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. ABSOLUTE MAXIMUM RATINGS * *Stresses above those listed under Absolute Maximum Ratings may cause perma- nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ORDERING GUIDE Temperature Package Package Model Range Description Option ADD8702ACP-R2 –40 °C to +85°C 32-Lead LFCSP CP-32 ADD8702ACP-REEL –40 °C to +85°C 32-Lead LFCSP CP-32 ADD8702ACP-REEL7 –40 °C to +85°C 32-Lead LFCSP CP-32 Package Type /H9258JA 1 /H9023JB
2 Unit
32-Lead LFCSP (CP) 35 13 °C/W NOTES 1θJA is specified for worst-case conditions, i.e., θJA is specified for device soldered in circuit board for surface-mount packages. 2ψJB is applied for calculating the junction temperature by reference to the board temperature. PIN CONFIGURATION PIN 1 INDICATOR TOP VIEW
24 GND
23 VDD
22 VGMA6
21 VGMA5
32 VCOM OUT
20 VGMA4
19 VGMA3
18 VGMA2
17 VGMA1
31 GND
30 VGMA12
29 VGMA11
28 VGMA10
27 VGMA9
26 VGMA8
25 VGMA7
Pin No. Mnemonic Description 1, 15, 23 V DD Power (+) 2V COM ADJ V COM Adjust Input 3V HIGH Highest Gamma Input Voltage 4–13 V IN11–VIN2G amma Buffer Inputs
14 V LOW Lowest Gamma Input Voltage
16, 24, 31 GND Power (–) 17–22, 25–30 VGMA1–VGMA12 Gamma Buffer Outputs
32 V COM OUT V COM Buffer Output
REV. 0–4– ADD8702–Typical Performance Characteristics SUPPLY VOLTAGE (V) SUPPLY CURRENT (mA) 04 1 6 81 2 TA = 25/H11543C TPC 1. Supply Current vs. Supply Voltage FREQUENCY (Hz) 30M100k GAIN (dB) 1M 10M –20 –30 –40 –10 VDD = 16V GAMMA 10 TO 12 2k/H9024, 10k/H9024 150/H9024 TPC 4. Frequency Response vs. Resistive Loading FREQUENCY (Hz) 30M100k GAIN (dB) 1M 10M –10 –30 VDD = 16V GAMMA 10 TO 12 50pF –20 100pF340pF 540pF 1040pF TPC 7. Frequency Response vs. Capacitive Loading TEMPERA TURE (/H11543C) SUPPL Y CURRENT (mA) –40 85 25 VDD = 16V TPC 2. Supply Current vs. Temperature FREQUENCY (Hz) 30M100k GAIN (dB) 1M 10M –20 –30 –50 –10 VDD = 16V VCOM 2k/H9024, 10k/H9024 150/H9024 –40 TPC 5. Frequency Response vs. Resistive Loading FREQUENCY (Hz) 30M100k GAIN (dB) 1M 10M –10 –30 VDD = 16V VCOM 50pF –20 100pF 340pF 540pF 1040pF TPC 8. Frequency Response vs. Capacitive Loading FREQUENCY (Hz) 100k 30M GAIN (dB) 1M 10M –20 –30 –40 –10 2k/H9024, 10k/H9024 150/H9024 VDD = 16V GAMMA 1 TO 9 TPC 3. Frequency Response vs. Resistive Loading FREQUENCY (Hz) 30M100k GAIN (dB) 1M 10M –10 –30 VDD = 16V GAMMA 1 TO 9 50pF –20 100pF340pF 540pF 1040pF TPC 6. Frequency Response vs. Capacitive Loading CAPACITIVE LOAD (pF) PHASE SHIFT (Degrees) 180 0 200 1,200400 600 800 1,000 160 140 120 100 VDD = 16V GAMMA 1 TO 12 RL = 2k/H9024 GAMMA 12 GAMMA 1 TPC 9. Input and Output Phase Shift vs. Capacitive Load
REV. 0 ADD8702 –5– TEMPERA TURE (/H11543C) SLEW RA TE (V//H9262s) –40 85 25 VDD = 16V RNULL = 33/H9024 CL = 100pF VCOM SLEW RA TE RISING VCOM SLEW RA TE FALLING TPC 11. Slew Rate vs. Temperature TIME (ns) –200 1,800200 600 1,000 1,400 AMPLITUDE (V) VDD = 16V GAMMA = 11 1/H9262F 10/H9262F120pF 320pF 520pF TPC 14. Transient Load Response vs. Capacitive Load LOAD CURRENT (mA) OUTPUT VOLTAGE ERROR (mV) 0.001 0.01 100 0.1 1 10 1,400 1,200 1,000 800 600 400 200 VDD = 16V GAMMA 10 TO 12 SINK SOURCE TPC 17. Output Voltage Error vs. Load Current 7V < VDD < 16V RNULL = 33/H9024 CL = 0.1/H9262F TIME (20/H9262s/DIV) VOLTAGE (20mV/DIV) TPC 12. Small Signal Transient Response TIME (ns) –200 1,800200 600 1,000 1,400 AMPLITUDE (V) VDD = 16V VCOM 1/H9262F1 0 /H9262F320pF 120pF 520pF TPC 15. Transient Load Response vs. Capacitive Load LOAD CURRENT (mA) OUTPUT VOLTAGE ERROR (mV) 0.001 0.01 100 0.1 1 10 VDD = 16V VCOM SINK SOURCE TPC 18. Output Voltage Error vs. Load Current TIME (2/H9262s/DIV) VOLTAGE (2V/DIV) VDD = 16V RL = 10k/H9024 CL = 100pF TPC 10. Large Signal Transient Response TIME (ns) –200 1,800200 600 1,000 1,400 AMPLITUDE (V) VDD = 16V GAMMA = 2 1/H9262F 10/H9262F 120pF 320pF 520pF TPC 13. Transient Load Response vs. Capacitive Load LOAD CURRENT (mA) OUTPUT VOLTAGE ERROR (mV) 0.001 0.01 100 0.1 1 10 100 VDD = 16V GAMMA 1 TO 9 SINK SOURCE TPC 16. Output Voltage Error vs. Load Current
REV. 0–6– ADD8702 FREQUENCY (Hz) POWER SUPPL Y REJECTION RA TIO (dB) 100 1k 10M 10k 100k 1M –120 –20 –40 –60 –80 –100 PSRR ALL CHANNELS VDD = 8V TA = 25/H11543C TPC 20. Power Supply Rejection Ratio vs. FrequencyVOLTAG E NOISE DENSITY (nV/ Hz) VDD = 16V BUFFERS 10 TO 12 MARKER SET @ 10kHz MARKER READING = 36.6nV/ Hz FREQUENCY (Hz) 05 1 0 15 20 25 –10 TPC 23. Voltage Noise Density vs. Frequency TIME (40/H9262s/DIV) VOLTAGE (3V/DIV) TPC 21. No Phase Reversal OUTPUT VOLTAGE ERROR (mV) FREQUENCY (No. of Amplifiers) 6,000 3,000 –22 –14 –6 2 10 1 82 63 4 5,000 4,000 2,000 1,000 VDD = 16V TA = 25/H11543C ALL CHANNELS TPC 19. Output Voltage Error Distribution VOLTAG E NOISE DENSITY (nV/ Hz) VDD = 16V VCOM AND BUFFERS 1 TO 9 MARKER SET @ 10kHz MARKER READING = 25.7nV/ Hz FREQUENCY (Hz) 05 1 0 15 20 25 –10 TPC 22. Voltage Noise Density vs. Frequency
REV. 0 C03820–0–6/03(0) –8– ADD8702 32-Lead Lead Frame Chip Scale Package [LFCSP] (CP-32) Dimensions shown in millimeters COMPLIANT TO JEDEC STANDARDS MO-220-VHHD-2 0.30 0.23 0.18
0.20 REF
0.80 MAX
0.65 NOM
0.05 MAX
0.02 NOM
1.00 0.90 0.80 SEATING PLANE COPLANARITY 0.08 132 1617 BOTTOM VIEW 0.50 0.40 0.30 3.50 REF 0.50 BSC PIN 1 INDICATOR TOP VIEW 5.00 BSC SQ 4.75 BSC SQ SQ 3.25 3.10 2.95 PIN 1 INDICATOR