ADD5203

ADD5203 8-String, White LED Driver with SMBus and PWM Input for LCD Backlight Applications Data Sheet (Rev. 0)

Document overview

• Manufacturer or author: Analog Devices
• PDF pages: 24

Technical content

8-String, White LED Driver with SMBus and PWM Input for LCD Backlight Applications ADD5203 Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2010 Analog Devices, Inc. All rights reserved.

FEATURES

White LED driver based on inductive boost converter Integrated 50 V MOSFET with 2.9 A peak current limit Input voltage range: 6 V to 21 V Maximum output adjustable up to 45 V 350 kHz to 1 MHz adjustable operating frequency Overvoltage protection (OVP) up to typical 47.5 V Built-in soft start for boost converter Drives up to eight LED current strings LED current adjustable up to 30 mA for each channel Headroom control to maximize efficiency Adjustable dimming frequency: 200 Hz to 10 kHz LED open and short fault protection Selectable dimming control interface methods PWM input SMBus serial input Selectable dimming modes Fixed delay PWM dimming control with 8-bit resolution No delay PWM dimming control with 8-bit resolution Direct PWM dimming control DC current dimming control with 8-bit resolution General Thermal shutdown Undervoltage lockout 28-lead, 4 mm × 4 mm × 0.75 mm LFCSP_WQ

APPLICATIONS

Notebook PCs, UMPCs, and monitor displays FUNCTIONAL BLOCK DIAGRAM STEP-UP SWITCHING REGULATOR EIGHT CURRENT SOURCES PWM DUTY EXTRACTOR 8-BIT BRIGHTNESS CONTROL LOGIC FIXED DELAY/NO DELAY DIRECT PWM/ DC CURRENT DIMMING CONTROL WITH PWM AND/OR SMBus INTERFACE UNDERVOLTAGE LOCKOUT INTERNAL SOFT START THERMAL PROTECTION OVERVOLTAGE PROTECTION AUTODISABLE FOR LED OPEN/SHORT 08717-001 Figure 1. GENERAL DESCRIPTION The ADD5203 is a white LED driver for backlight applications based on high efficiency, current-mode, step-up converter tech- nology. It is designed with a 0.15 Ω, 2.9 A internal switch and a pin-adjustable operating frequency between 350 kHz and 1 MHz. The ADD5203 contains eight regulated current sources for uniform brightness intensity. Each current source can be driven up to 30 mA, and the LED driving current is pin adjustable by an external resistor. The ADD5203 drives up to eight parallel strings of multiple series connected LEDs with a ±1.5% current matching between strings. The ADD5203 provides various dimming modes. Each dimming mode is selectable with an external dimming mode selection pin. The LED dimming control interface can be achieved through PWM input and/or SMBus. The device provides adjustable output dimming frequency range from 200 Hz to 10 kHz by an external resistor and capacitor. The ADD5203 operates over an input voltage range of 6 V to 21 V , but the device can function with a voltage as low as 5.6 V . The ADD5203 also has multiple safety protection features to prevent damage during fault conditions. If any LED is open or short, the device automatically disables the faulty current source. The internal soft start prevents inrush current during startup. Thermal shutdown protection prevents thermal damage. The ADD5203 is available in a low profile, thermally enhanced, 4 mm × 4 mm × 0.75 mm, 28-lead, RoHS-compliant lead frame chip scale package (LFCSP_WQ) and is specified over the industrial temperature range of −25°C to +85°C.

Rev. 0 | Page 2 of 24 TABLE OF CONTENTS

REVISION HISTORY

5/10—Revision 0: Initial Version

Figure 2. Circuit Diagram

Rev. 0 | Page 4 of 24 SPECIFICATIONS STEP-UP SWITCHING REGULATOR SPECIFICATIONS VIN = 12 V , SHDN = high, TA = −25°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C. Table 1. Parameter Symbol Test Conditions Min Typ Max Unit SUPPLY Input Voltage Range VIN 6 21 V BOOST OUTPUT Output Voltage VOUT 45 V SWITCH On Resistance RDS(ON) VIN = 12 V, ISW = 100 mA 150 210 mΩ Leakage Current ILKG 44 70 μA Peak Current Limit ICL Duty cycle (D) = DMAX 2.9 A OSCILLATOR Switching Frequency fSW R F = 150 kΩ 800 1000 1200 kHz f SW R F = 470 kΩ 350 kHz Maximum Duty Cycle DMAX R F = 470 kΩ 85 92 % SOFT START Soft Start Time tSS 1.5 ms OVERVOLTAGE PROTECTION Overvoltage Rising Threshold on OVP Pin VOVPR 1.154 1.20 1.267 V Overvoltage Falling Threshold on OVP Pin VOVPF 1.050 1.12 1.188 V LED CURRENT REGULATION SPECIFICATIONS VIN = 12 V , SHDN = high, TA = −25°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C. Table 2. Parameter Symbol Test Conditions Min Typ Max Unit CURRENT SOURCE ISET Pin Voltage VSET 6 V ≤ VIN ≤ 21 V 1.16 1.2 1.24 V Adjustable LED Current1 I LED 0 30 mA Constant Current Sink of 20 mA2 I LED20 R SET = 141.56 kΩ 19.4 20 20.6 mA Minimum Headroom Voltage2 V HR20 R SET = 141.56 kΩ 0.65 0.85 V Current Matching Between Strings2 RSET = 141.56 kΩ −1.5 +1.5 % LED Current Accuracy2 RSET = 141.56 kΩ −3 +3 % Current Source Leakage Current 1 μA FPWM GENERATOR Dimming Frequency Range 6 V ≤ VIN ≤ 21 V 200 10,000 Hz Dimming Frequency fPWM RFPWM = 50 kΩ, CFPWM = 150 pF 820 1000 1180 Hz LED FAULT DETECTION Open Fault Delay1 T D_OPENFAULT 6.5 μs 1 These electrical specifications are guaranteed by design. 2 Tested at TA = +25°C.

Rev. 0 | Page 5 of 24 SMBUS SPECIFICATIONS VIN = 12 V , SHDN = high, TA = −25°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C. Table 3. Parameter1 Symbol Test Conditions Min Typ Max Unit SMBus INTERFACE Data, Clock Input Low Level VIL 0.8 V Data, Clock Input High Level VIH 2.1 5.5 V Data, Clock Output Low Level VOL 0.4 V SMBus TIMING SPECIFICATIONS Clock Frequency fSMB 10 100 kHz Bus-Free Time Between Stop and Start Condition tBUF 4.7 μs Hold Time After Start Condition2 tHD:STA 4.0 μs Repeated Start Condition Setup Time tSU:STA 4.7 μs Stop Condition Setup Time tSU:STO 4.0 μs Data Hold Time tHD:DAT 300 ns Data Setup Time tSU:DAT 250 ns Clock Low Period tLOW 4.7 μs Clock High Period tHIGH 4.0 50 μs Clock/Data Fall Time tF 300 ns Clock/Data Rise Time tR 1 us 1 These electrical specifications are guaranteed by design. 2 After this period, the first clock is generated.

Rev. 0 | Page 6 of 24 GENERAL SPECIFICATIONS VIN = 12 V , SHDN = high, TA = −25°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C. Table 4. Parameter Symbol Test Conditions Min Typ Max Unit SUPPLY Input Voltage Range VIN 6 21 V Quiescent Current IQ 6 V ≤ VIN ≤ 21 V, SHDN = high 4.2 6.5 mA Shutdown Supply Current ISD 6 V ≤ VIN ≤ 21 V, SHDN = low 40 160 μA VDD REGULATOR VDD Regulated Output VVDD_REG 6 V ≤ V IN ≤ 21 V 3.18 3.3 3.42 V PWM INPUT PWM Voltage High VPWM_HIGH 2.2 5.5 V PWM Voltage Low VPWM_LOW 0.8 V PWM Input Range 200 10,000 Hz THERMAL SHUTDOWN Thermal Shutdown Threshold1 T SD 160 °C Thermal Shutdown Hysteresis1 T SDHYS 30 °C UVLO VIN Falling Threshold VUVLOF V IN falling 4.2 4.6 V VIN Rising Threshold VUVLOR V IN rising 5.0 5.6 V SHDN CONTROL Input Voltage High VIH 2.0 V Input Voltage Low VIL 1.0 V SHDN Pin Input Current ISHDN SHDN = 3.3 V 6 μA 1 These electrical specifications are guaranteed by design.

TA = 25°C, unless otherwise noted. soldered in a circuit board for surface-mount packages. Table 6. Thermal Resistance

17 I SET

18 R_FPWM

19 C_FPWM

20 PGND

21 PGND

1. CONNECT THE EXPOSED PADDLE TO GND.

15 FB8

Figure 3. Pin Configuration Table 7. Pin Function Descriptions 2 SEL1 Dimming Mode Selection 1. 3 SEL2 Dimming Mode Selection 2. 4 VDDIO Internal Linear Regulator Output. This regulator provides power to the ADD5203. 5 SDA Serial Data Input/Output. 7 FB1 Regulated Current Sink. Connect the bottom cathode of the LED string to this pin. 8 FB2 Regulated Current Sink. Connect the bottom cathode of the LED string to this pin. 9 FB3 Regulated Current Sink. Connect the bottom cathode of the LED string to this pin. 10 FB4 Regulated Current Sink. Connect the bottom cathode of the LED string to this pin. 12 FB5 Regulated Current Sink. Connect the bottom cathode of the LED string to this pin. If unused, connect to GND. 13 FB6 Regulated Current Sink. Connect the bottom cathode of the LED string to this pin. If unused, connect to GND. 14 FB7 Regulated Current Sink. Connect the bottom cathode of the LED string to this pin. If unused, connect to GND. 15 FB8 Regulated Current Sink. Connect the bottom cathode of the LED string to this pin. If unused, connect to GND. 17 I SET Full-Scale LED Current Set. A resistor from this pin to ground sets the LED current up to 30 mA. 18 R_FPWM Dimming frequency adjustment pin with an external resistor. 19 C_FPWM Dimming frequency adjustment pin with an external capacitor. 22 OVP Overvoltage Protection. 23 SW Drain Connection of the Internal Power FET. 24 SW Drain Connection of the Internal Power FET. 25 SHDN Shutdown Control for PWM Input Operation Mode. Active low. 26 VIN Supply Input. Must be locally bypassed with a capacitor to ground. 27 FSLCT Frequency Select. A resistor from this pin to ground sets the boost switching frequency from 350 kHz to 1 MHz. this pin for stable operation and an optional capacitor can be connected from this pin to ground. EP Exposed Paddle. Connect the exposed paddle to ground.

8 PARALLEL × 8 SERIES

10 PARALLEL × 8 SERIES

Figure 4. Boost Converter Efficiency vs. Input Voltage Figure 5. LED Current vs. RSET Figure 6. LED Current vs. PWM Input Duty Cycle Figure 7. LED Current vs. SMBus Brightness Setting Figure 8. LED Current vs. Input Voltage (ILED = 20 mA) Figure 9. Start-Up Waveforms (Brightness = 100%)

a wide range of input voltages, output voltages, and load conditions. drive up to 13 LEDs (3.4 V/30 mA type of LEDs) for each channel. VDDIO (Pin 4) and GND, as close as possible to Pin VDDIO. recommended for small external components. frequency and an adjustment resistor (RF). Figure 14. Switching Frequency vs. RF and the CFPWM should be in the range of 20 pF to 390 pF. Table 8. RFPWM and CFPWM Recommendation

200 Hz 110 390

500 Hz 75 200

up to 30 mA by an external resistor. goes above 7.2 V , the current source is disabled for short protection. change that is caused by a ±0.195% jitter of the PWM input. between the SMBus serial input and/or the external PWM input. controlled externally through these dimming control interfaces. Table 9. Brightness Control Mode Selection

2 FPWM

where tFPWM = 1/fPWM, and fPWM is the LED dimming frequency. Figure 15. Fixed-Delay PWM Dimming Timing off at the same time without any phase delay. Figure 16. No Delay PWM Dimming Timing changed by the PWM input duty ratio. Figure 17. Direct PWM Dimming Timing Figure 18. DC Current Dimming Timing inrush current at startup. The soft start time is typically 1.5 ms.

controlled with an SMBus serial interface. other cycles are driven by the host master. Figure 19. Overvoltage Protection Circuit the string that includes short LEDs is disabled. An undervoltage lockout circuit is included with built-in hysteresis. shuts down when VIN falls below 4.6 V (typical).

brightness, fault status, identifications, and operating mode. selected by the device control register (Address 0x01). of the device, and a single bit controls the backlight on/off state. named BL_CTL, is used as on/off control for the output LEDs. selected by the combination of Bit 1 and Bit 2 (see Table 10). PWM is the percent duty cycle. The PWM signal starts from 100% when operating in DPST mode. PWM input should drive brightness. Table 10. Operating Modes Selected by Device Control

1 X PWM mode

written. This default value of the register is 0x00. Table 11. Brightness Control Register (Address 0x00) Bit Map Table 12. Brightness Control Register (Address 0x00) Bit Description Table 13. Device Control Register (Address 0x01) Bit Map

Table 14. Device Control Register (Address 0x01) Bit Description 1_CH_SD, is set to 1 if one or more current sources are disabled. are read only. The default value for Register 0x02 is 0x00. by 1. This register is read only. Table 15. Fault/Status Register (Address 0x02) Bit Map Table 16. Fault/Status Register (Address 0x01) Bit Description 2_CH_SD_, 1_CH_SD The number of faulted strings is reported in these bits. 00 = no faults, 01 = one string fault, 11 = two or more strings faulted. 1 = backlight on, 0 = backlight off (default). 1 = overcurrent condition, 0 = current ok (default). 1 = thermal fault, 0 = thermal ok (default). Fault Fault occurred. Logic OR of all the fault conditions. Table 17. Identification Register (Address 0x03) Bit Map Table 18. Identification Register (Address 0x03) Bit Description LED Panel Display panel using LED backlight, Bit 7 = 1. MFG[3:0] Manufacturer ID (Analog Devices ID is 6). REV[2:0] Silicon revision (Revision 0 to Revision 7 are allowed for silicon spins).

Rev. 0 | Page 17 of 24 EXTERNAL COMPONENT SELECTION GUIDE Inductor Selection The inductor is an integral part of the step-up converter. It stores energy during the switch-on time and transfers that energy to the output through the output diode during the switch-off time. An inductor in the range of 4.7 μH to 22 μH is recommended. In general, lower inductance values result in higher saturation current and lower series resistance for a given physical size. However, lower inductance results in higher peak current, which can lead to reduced efficiency and greater input and/or output ripple and noise. Peak-to-peak inductor ripple current at close to 30% of the maximum dc input current typically yields an optimal compromise. The input (V IN) and output (VOUT) voltages determine the switch duty cycle (D), which in turn can be used to determine the inductor ripple current. OUT INOUT V V VD −= Use the duty cycle and switching frequency (fSW) to determine the on time. SW ON f Dt = The inductor ripple current (ΔIL) in a steady state is L tVI IN L ON×= Δ Solve for the inductance value (L). L IN I tVL Δ ×= ON Make sure that the peak inductor current (that is, the maximum input current plus half of the inductor ripple current) is less than the rated saturation current of the inductor. In addition, ensure that the maximum rated rms current of the inductor is greater than the maximum dc input current to the regulator. For duty cycles greater than 50% that occur with input voltages greater than half the output voltage, slope compensation is required to maintain stability of the current-mode regulator. The inherent open-loop stability causes subharmonic instability when the duty ratio is greater than 50%. To avoid subharmonic instability, the slope of the inductor current should be less than half of the compensation slope. Inductor manufacturers include Coilcraft, Inc., Sumida Corporation, and Toko. Input and Output Capacitors Selection The ADD5203 requires input and output bypass capacitors to supply transient currents while maintaining a constant input and output voltage. Use a low effective series resistance (ESR) 10 μF or greater capacitor for the input capacitor to prevent noise at the ADD5203 input. Place the input between the VIN and GND, as close as possible to the ADD5203. Ceramic capacitors are preferred because of their low ESR characteristics. Alternatively, use a high value, medium ESR capacitor in parallel with a 0.1 μF low ESR capacitor as close as possible to the ADD5203. The output capacitor maintains the output voltage and supplies current to the load while the ADD5203 switch is on. The value and characteristics of the output capacitor greatly affect the output voltage ripple and stability of the regulator. Use a low ESR output capacitor; ceramic dielectric capacitors are preferred. For very low ESR capacitors, such as ceramic capacitors, the ripple current due to the capacitance is calculated as follows. Because the capacitor discharges during the on time (t ON), the charge removed from the capacitor (QC) is the load current multiplied by the on time. Therefore, the output voltage ripple (ΔVOUT) is OUT ONL OUT C OUT C t I C QV ×= = Δ where: COUT is the output capacitance. IL is the average inductor current. Using the duty cycle and switching frequency (fSW), users can determine the on time with the following equation: SW ON f Dt = The input (VIN) and output (VOUT) voltages determine the switch duty cycle (D) with the following equation: OUT INOUT V V VD −= Choose the output capacitor based on the following equation: ( ) OUTOUTSW INOUTL OUT V V f V V IC Δ × × −×≥ Capacitor manufacturers include Murata Manufacturing Co., Ltd., AVX, Sanyo, and Taiyo Yuden Co., Ltd. Diode Selection The output diode conducts the inductor current to the output capacitor and loads while the switch is off. For high efficiency, minimize the forward voltage drop of the diode. Schottky diodes are recommended. However, for high voltage, high temperature applications, where the Schottky diode reverse leakage current becomes significant and can degrade efficiency, use an ultrafast junction diode. The output diode for a boost regulator must be chosen depending on the output voltage and the output current. The diode must be rated for a reverse voltage equal to or greater than the output voltage used. The average current rating must be greater than the maximum load current expected, and the peak current rating must be greater than the peak inductor current. Using Schottky diodes with lower forward voltage drop decreases power dissipation and increases efficiency. The diode must be rated to handle the average output load current. Many diode

noise on the output and switch waveforms, and instability. where VIN_MAX is the maximum input voltage. MIN is 0.5 when VOUT is 30 V and VIN_MAX is 15 V. Diodes Incorporated, Central Semiconductor Corp., and Sanyo. should be in the range of 100 pF to 330 nF. the use of vias is required to connect traces and different planes. switching current loops curl in the same direction. Figure 24. Compensation Components to cancel the zero introduced by output capacitance ESR.

Rev. 0 | Page 19 of 24 Layout Procedure To achieve high efficiency, good regulation, and stability, a good PCB layout is required. It is recommended that the reference board layout be followed as closely as possible because it is already optimized for high efficiency and low noise. Use the following general guidelines when designing PCBs:

• Keep CIN close to the VIN and GND leads of the ADD5203.
• Keep the high current path from CIN (through L1) to the SW and GND leads as short as possible.
• Keep the high current path from CIN (through L1), D1, and COUT as short as possible.
• Keep high current traces as short and wide as possible.
• Keep nodes connected to SW away from sensitive traces, such as COMP , to prevent coupling of the traces. If such traces need to be run near each other, place a ground trace between the two as a shield.
• Place the compensation components as close as possible to the COMP pin.
• Place the LED current setting resistors as close as possible to each pin to prevent noise pickup.
• Avoid routing noise sensitive traces near high current traces and components, especially the LED current setting node (I SET).
• Use a thermal pad size that is the same dimension as the exposed pad on the bottom of the package. Heat Sinking When using a surface-mount power IC or external power switches, the PCB can often be used as the heat sink. This is accomplished by using the copper area of the PCB to transfer heat from the device. Users should maximize this area to optimize thermal performance.

Figure 25. Typical Application Circuit for SMBus Interface

Figure 26. Typical Application Circuit for PWM Interface

Figure 27. Typical Application Circuit for PWM Interface

0.05 MAX

0.02 NOM

0.20 REF

COMPLIANT TOJEDEC STANDARDS MO-220-WGGE. Figure 28. 28-Lead Lead Frame Chip Scale Package [LFCSP_WQ]

Rev. 0 | Page 24 of 24 NOTES ©2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the prop erty of their respective owners. D08717-0-5/10(0)