ADCDS-1405 MURATA | Alldatasheet

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2732, 33 7, 35, 37 DATA VALIDDIGITAL GROUND ANALOG GROUND START CONVERT BIT 1 (MSB) BIT 14 (LSB) OUT-OF-RANGE +2.4V REFERENCE OUTPUT +12VA –5VA +5VA +5VD 39 38 36 34 TIMING AND CONTROL SAMPLING A/D NON-INVERTING INPUT 75/G57 523/G57 0.01µF 5K /G57

1 FINE GAIN ADJUST

AØ

FEATURES

  • •••• 5MPPS throughput rate (14-bits)
  • •••• Functionally complete
  • •••• Excellent Signal-to-Noise ratio
  • •••• Small, 40-pin, TDIP package
  • •••• Low power, 700mW typical
  • •••• Programmable Analog Bandwidth GENERAL DESCRIPTION The ADCDS-1405 is an application-specific video signal processor designed for electronic-imaging applications that employ CCD's (charge coupled devices) as their photodetector. The ADCDS-1405 incorporates a "user configurable" input amplifier, a CDS (correlated double sampler) and a sampling A/D converter in a single package, providing the user with a complete, high performance, low- cost, low-power, integrated solution. The key to the ADCDS-1405's performance is a unique, high- speed, high-accuracy CDS circuit, which eliminates the effects of residual charge, charge injection and "kT/C" noise on the CCD's output floating capacitor, producing a "valid video" output signal. The ADCDS-1405 digitizes this resultant "valid video" signal using a high-speed, low-noise sampling A/D converter. The ADCDS-1405 requires only the rising edge of start convert pulse to initiate its conversion process. Additional features of the ADCDS-1405 include gain adjust, offset adjust, precision +2.4V reference, and a programmable analog bandwidth function.

Figure 1. ADCDS-1405 Functional Block Diagram

1 FINE GAIN ADJUST 40 NO CONNECT

2 OFFSET ADJUST 39 +12V

3 DIRECT INPUT 38 –5VA

4 INVERTING INPUT 37 ANALOG GROUND

5 NON-INVERTING INPUT 36 +5VA

7 ANALOG GROUND 34 +5VD

8 NO CONNECT 33 DIGITAL GROUND

9 NO CONNECT 32 DIGITAL GROUND

10 BIT 14 (LSB) 31 A1

11 BIT 13 30 A

12 BIT 12 29 NO CONNECT

13 BIT 11 28 NO CONNECT

14 BIT 10 27 DATA VALID

15 BIT 9 26 REFERENCE HOLD

16 BIT 8 25 START CONVERT

17 BIT 7 24 OUT-OF-RANGE

18 BIT 6 23 BIT 1 (MSB)

19 BIT 5 22 BIT 2

20 BIT 4 21 BIT 3

ANALOG INPUT MIN. TYP. MAX. UNITS Input Voltage Range (externally configurable) 0.350 2.8 — V olts p-p Input Resistance — 5000 — Ohm Input Capacitance —1 0 —p F DIGITAL INPUTS Logic Levels Logic 1 +3.5 — — V olts Logic 0 — — +.80 V olts Logic Loading Logic 1 — — +10 uA Logic 0 — — –10 uA DIGITAL OUTPUTS Logic Levels Logic 1 (IOH = .5ma) +2.4 — — V olts Logic 1 (IOH = 50µa) +4.5 — — V olts Logic 0 (IOL = 1.6ma) — — +0.4 V olts Logic 0 (IOL = 50ua) — — +0.1 V olts Internal Reference Voltage (Fine gain adjust pin (1) grounded) +25°C 2.35 2.4 2.45 Volts 0 to 70°C 2.35 2.4 2.45 Volts –55 to +125°C 2.35 2.4 2.45 Volts External Current — 1.0 — mA STATIC PERFORMANCE Differential Nonlinearity (Histogram, 98kHz) +25°C –0.90 ±0.5 +.90 LSB 0 to 70°C –0.90 ±0.5 +.90 LSB Integral Nonlinearity +25°C — ±2.5 — LSB 0 to 70°C — ±2.5 — LSB Guaranteed No Missing Codes 0 to 70°C 14 — — LSB –55 to +125°C 14 — — LSB DC Noise +25°C — 0.85 — LSB 0 to 70°C — 1.0 — LSB –55 to +125°C — 1.25 — LSB Offset Error Gain Error PARAMETERS MIN. TYP . MAX. UNITS +12V Supply (Pin 32) 0 — +14 Volts –5V Supply (Pin 31) –0.3 — +6.5 V olts +5V Supply (Pin 28, 29) 0 — –6.5 Volts Digital Input (Pin 23, 24) –0.3 — Vdd+0.3V V olts Analog Input (Pin 3,4,5) –5 — +5 Volts Lead Temperature (10 seconds) — — 300 °C ABSOLUTE MAXIMUM RATINGS FUNCTIONAL SPECIFICATIONS The following specifications apply over the operating temperature range, under the following conditions: Vcc=+12V, +Vdd=+5V, Vee=–5V, fin=98KHz, sample rate=5MSPS. DYNAMIC PERFORMANCE MIN. TYP. MAX. UNITS Reference Hold Aquisition Time 70 — — ns Droop @ +25°C — 25 — mV/us @ –55 to +125°C — 100 — mV/us Peak Harmonic (SFDR) (CDD-IN, input on pin (3) Input @ 98kHz) Peak Harmonic (SFDR) (Input on pin (5) Input @ 98kHz) Total Harmonic Distortion (CDD-IN, input on pin (3) Input @ 98kHz) (Input on pin (5) Input @ 98kHz) Signal-to-Noise Ratio Without Distortion (CDD-IN, input on pin (3) Input @ 98kHz) @ +25 °C 73 75 — dB @ 0 to +70°C 73 75 — dB @ –55 to +125°C 70 73 — dB (Input on pin (5) Input @ 98kHz) @ +25 °C 73 75 — dB @ 0 to +70°C 73 75 — dB @ –55 to +125°C 70 73 — dB Signal-to-Noise Ratio With Distortion (CDD-IN, input on pin (3) Input @ 98kHz) @ +25 °C — 71 — dB @ 0 to +70°C — 71 — dB @ –55 to +125°C — 70 — dB (Input on pin (5) Input @ 98kHz) @ +25 °C — 71 — dB @ 0 to +70°C — 71 — dB @ –55 to +125°C — 70 — dB SIGNAL TIMING Conversion Rate –55 to +125°C 5 — — MSPS Conversion Time — 200 — nsec Start Convert Pulse Width 20 150 — nsec POWER REQUIREMENTS Power Supply Range +12V Supply +11.4 +12.0 +12.6 V olts +5V Supply +4.75 +5.0 +5.25 V olts –5V Supply –4.75 –5.0 –5.25 Volts

Table 3. Programmable Analog Bandwidth

  • Reference Hold (pin 26)
  • Start Convert (pin 25) The "Reference Hold" signal controls the operation of an internal sample-hold circuit. A logic "1" places the sample- hold into the hold mode, capturing the value of the CCD's

Figure 9. ADCDS-1405 Connection Diagram transients to the desired accuracy (user defined).

MECHANICAL DIMENSIONS INCHES (mm)

ORDERING INFORMATION

MODEL TEMPERATURE RANGE P ACKAGE ADCDS-1405 0 to 70°C TDIP ADCDS-1405EX –55 to 125°C TDIP DATEL, Inc. 11 Cabot Boulevard, Mansfield, MA 02048-1151 Tel: (508) 339-3000 (800) 233-2765 Fax: (508) 339-6356 Internet: www.datel.com Email: sales@datel.com DATEL makes no representation that the use of its products in the circuits described herein, or the use of other technical information contained herein, will not infringe upon existing or future patent rights. The descriptions contained herein do not imply the granting of licenses to make, use, or sell equipment constructed in accordance therewith. Specifications are subject to change without notice. The DATEL logo is a registered DATEL, Inc. trademark. DATEL (UK) LTD. Tadley, England Tel: (01256)-880444 DATEL S.A.R.L. Montigny Le Bretonneux, France Tel: 01-34-60-01-01 DATEL GmbH Munchen, Germany Tel: 89-544334-0 DATEL KK Tokyo, Japan Tel: 3-3779-1031, Osaka Tel: 6-6354-2025 DS-0503A 3/03 /C174/C174 ISO 9001ISO 9001 /C82/C69/C71/C73/C83/C84/C69/C82/C69/C68 ADCDS-1405 /G30 /G2E /G31 /G30 /G30 /G20 /G54 /G59 /G50 /G2E /G28 /G32 /G2E /G35 /G34 /G30 /G29 /G20 /G32 /G2E /G32 /G34 /G20 /G54 /G59 /G50 /G2E /G28 /G35 /G36 /G2E /G39 /G30 /G29 /G20 /G20 /G30 /G2E /G39 /G30 /G30 /G20 /GB1 /G30 /G2E /G30 /G31 /G30 /G28 /G32 /G32 /G2E /G38 /G36 /G29 /G31 /G2E /G39 /G30 /G30 /G20 /GB1 /G30 /G2E /G30 /G30 /G38 /G28 /G34 /G38 /G2E /G32 /G36 /G30 /G29 /G30 /G2E /G32 /G33 /G20 /G54 /G59 /G50 /G2E /G28 /G35 /G2E /G38 /G34 /G29 /G20 /G31 /G2E /G32 /G37 /G20 /G54 /G59 /G50 /G2E /G28 /G33 /G32 /G2E /G32 /G35 /G29 /GAE /GAE /G41 /G44 /G43 /G44 /G53 /G2D /G31 /G34 /G30 /G35 /G31 /G34 /G2D /G42 /G49 /G54 /G2C /G20 /G35 /G4D /G48 /G7A /G49 /G4D /G41 /G47 /G49 /G4E /G47 /G20 /G53 /G49 /G47 /G4E /G41 /G4C /G20 /G50 /G52 /G4F /G43 /G45 /G53 /G53 /G4F /G52 /G4D /G61 /G64 /G65 /G20 /G69 /G6E /G20 /G55 /G53 /G41