ADCDS-1403 MURATA-PS | Alldatasheet
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FEATURES
/g132/g314-bit resolution /g132/g33MPPS throughput rate (14-bits) /g132/g3Functionally complete /g132/g3Very low noise /g132/g3Excellent Signal-to-Noise ratio /g132/g3Edge triggered /g132/g3Small, 40-pin, TDIP package /g132/g3Low power, 500mW typical /g132/g3Low cost /g132/g3Programmable Analog Bandwidth The ADCDS-1403 is an application-specifi c video signal processor designed for electronic- imaging applications that employ CCD's (charge coupled devices) as their photodetector. The ADCDS-1403 incorporates a "user confi gurable" input amplifi er, a CDS (correlated double sampler) and a sampling A/D converter in a single package, providing the user with a complete, high perfor- mance, low-cost, low-power, integrated solution. The key to the ADCDS-1403's performance is a unique, high-speed, high-accuracy CDS circuit, which eliminates the effects of residual charge, charge injection and "kT/C" noise on the CCD's output fl oating capacitor, producing a "valid video" output signal. The ADCDS-1403 digitizes this resultant "valid video" signal using a high-speed, low-noise sampling A/D converter. The ADCDS-1403 requires only the rising edge of start convert pulse to initiate its conversion process. Additional features of the ADCDS-1403 include gain adjust, offset adjust, precision +2.4V reference, and a programmable analog bandwidth function. PRODUCT OVERVIEW INVERTING INPUT DIRECT INPUT OFFSET ADJUST REFERENCE HOLD 2732, 33 7, 35, 37 DATA VALIDDIGITAL GROUND ANALOG GROUND START CONVERT BIT 1 (MSB) BIT 14 (LSB) OUT-OF-RANGE +2.4V REFERENCE OUTPUT +12VA –5VA +5VA +5VD 39 38 36 34 TIMING AND CONTROL SAMPLING A/D NON-INVERTING INPUT 75/G57 523/G57 0.01μF 5K /G57
1 FINE GAIN ADJUST
AØ INPUT/OUTPUT CONNECTIONS Pin Function Pin Function
1 FINE GAIN ADJUST 40 NO CONNECT
2 OFFSET ADJUST 39 +12V
3 DIRECT INPUT 38 –5VA
4 INVERTING INPUT 37 ANALOG GROUND
5 NON-INVERTING INPUT 36 +5VA
6 +2.4V REF . OUTPUT 35 ANALOG GROUND
7 ANALOG GROUND 34 +5VD
8 NO CONNECT 33 DIGITAL GROUND
9 NO CONNECT 32 DIGITAL GROUND
10 BIT 14 (LSB) 31 A1
11 BIT 13 30 AØ
12 BIT 12 29 NO CONNECT
13 BIT 11 28 NO CONNECT
14 BIT 10 27 DATA VALID
15 BIT 9 26 REFERENCE HOLD
16 BIT 8 25 START CONVERT
17 BIT 7 24 OUT -OF-RANGE
18 BIT 6 23 BIT 1 (MSB)
19 BIT 5 22 BIT 2
20 BIT 4 21 BIT 3
Figure 1. ADCDS-1403 Functional Block Diagram
Functional Specifi cations The following specifi cations apply over the operating temperature range, under the follow- ing conditions: Vcc=+12V, +Vdd=+5V, Vee=–5V, fi n=98KHz, sample rate=3MHz. PARAMETERS MIN. TYP . MAX. UNITS +12V Supply (Pin 32) 0 — +14 Volts –5V Supply (Pin 38) –6.5 — +0.3 Volts +5V Supply (Pin 34, 36) –0.3 — +6.5 Volts Digital Input (Pin 25, 26, 30, 31) –0.3 — Vdd+0.3V Volts Analog Input (Pin 3,4,5) –6 — +6 Volts Lead Temperature (10 seconds) — — 300 °C ANALOG INPUT MIN. TYP . MAX. UNITS Input Voltage Range (externally confi gurable) 0.350 2.8 — Volts p-p Input Resistance — 5000 — Ohm Input Capacitance — 10 — pF DIGITAL INPUTS Logic Level Logic 1 +3.5 — — Volts Logic 0 — — +.80 Volts Logic Loading Logic 1 — — +10 uA Logic 0 — — –10 uA DIGITAL OUTPUTS Logic Levels Logic 1 (IOH = .5ma) +2.4 — — Volts Logic 1 (IOH = 50μa) +4.5 — — Volts Logic 0 (IOL = 1.6ma) — — +0.4 Volts Logic 0 (IOL = 50ua) — — +0.1 Volts Internal Reference Voltage (Fine gain adjust pin (1) grounded) +25°C 2.35 2.4 2.45 Volts 0 to 70°C 2.35 2.4 2.45 Volts –55 to +125°C 2.35 2.4 2.45 Volts External Current — 1.0 — mA STATIC PERFORMANCE Differential Nonlinearity (Histogram, 98kHz) +25°C –0.90 ±0.5 +.90 LSB 0 to 70°C –0.90 ±0.5 +.90 LSB Integral Nonlinearity +25°C — ±2.5 — LSB 0 to 70°C — ±2.5 — LSB Guaranteed No Missing Codes 0 to 70°C 14 — — LSB –55 to +125°C 14 — — LSB DC Noise 0 to 70°C — 1.0 2.0 LSB –55 to +125°C — 1.25 2.5 LSB Offset Error Gain Error DYNAMIC PERFORMANCE MIN. TYP . MAX. UNITS Reference Hold Aquisition Time 100 — — ns Droop @ +25°C — 25 — mV/us @ –55 to +125°C — 100 — mV/us Peak Harmonic (SFDR) (CDD-IN, input on pin (3) Input @ 98kHz) Peak Harmonic (SFDR) (Input on pin (5) Input @ 98kHz) Total Harmonic Distortion (CDD-IN, input on pin (3) Input @ 98kHz) (Input on pin (5) Input @ 98kHz) Signal-to-Noise Ratio Without Distortion (CDD-IN, input on pin (3) Input @ 98kHz) @ +25 °C 73 75 — dB @ 0 to +70°C 73 75 — dB @ –55 to +125°C 70 73 — dB (Input on pin (5) Input @ 98kHz) @ +25 °C 73 75 — dB @ 0 to +70°C 73 75 — dB @ –55 to +125°C 70 73 — dB Signal-to-Noise Ratio With Distortion (CDD-IN, input on pin (3) Input @ 98kHz) @ +25 °C — 71 — dB @ 0 to +70°C — 71 — dB @ –55 to +125°C — 70 — dB (Input on pin (5) Input @ 98kHz) @ +25 °C — 71 — dB @ 0 to +70°C — 71 — dB @ –55 to +125°C — 70 — dB SIGNAL TIMING Conversion Rate –55 to +125°C 3 — — MHz Conversion Time — 200 — nsec Start Convert Pulse Width 20 150 — nsec POWER REQUIREMENTS Power Supply Range +12V Supply +11.4 +12.0 +12.6 Volts +5V Supply +4.75 +5.0 +5.25 Volts –5V Supply –4.75 –5.0 –5.25 Volts ADCDS-1403 14-Bit, 3 Megapixels/Second Imaging Signal Processor MDA_ADCDS-1403.B01 Page 2 of 9 Technical enquiries email: sales@murata-ps.com, tel: +1 508 339 3000www.murata-ps.com
Table 1. Out-of-Range Conditions Table 2. Output Coding level and V OUT should not exceed ±2.8V DC. Table 2. The table shows the relationship between the output data coding width at the possible expense of noise performance. Table 3. have been optimized to provide only enough analog bandwidth to acquire a full scale input step, to 14-bit accuracy, in a single conversion. Figure 8. Overrange/ Underrange Circuit input voltage, with both of these signals having a common pipeline delay.
Table 3. Programmable Analog Bandwidth rately digitize the analog output signal from the CCD array.
- Reference Hold (pin 26)
- Start Convert (pin 25) The "Reference Hold" signal controls the operation of an internal sample-hold circuit. A logic "1" places the sample-hold into the hold mode, capturing the value of the CCD's reference signal. The Reference Hold Signal allows the user to control the exact moment when the sample-hold is placed into the "hold" mode. For optimal performance the sample-hold
Figure 9. ADCDS-1403 Connection Diagram settled from all switching transients to the desired accuracy (user defi ned). initiated with the rising edge of a single start convert (Pin 25) signal.
ORDERING INFORMATION
MODEL TEMPERATURE RANGE PACKAGE ADCDS-1403 0 to 70°C TDIP ADCDS-1403EX –55 to 125°C TDIP 0.100 TYP. (2.540) 2.24 TYP. (56.90) 0.900 ±0.010 (22.86) 1.900 ±0.008 (48.260) 0.23 TYP. (5.84) 1.27 TYP. (32.25) ® ® ADCDS-1403 14-BIT, 3MHz IMAGING SIGNAL PROCESSOR Made in USA ADCDS-1403 14-Bit, 3 Megapixels/Second Imaging Signal Processor MDA_ADCDS-1403.B01 Page 9 of 9 Murata Power Solutions, Inc. makes no representation that the use of its products in the circuits described herein, or the use of other technical information contained herein, will not infringe upon existing or future patent rights. The descriptions contained herein do not imply the granting of licenses to make, use, or sell equipment constructed in accordance therewith. Specifi cations are subject to change without notice. © 2009 Murata Power Solutions, Inc. USA: Mansfi eld (MA), Tel: (508) 339-3000, email: sales@murata-ps.com Canada: Toronto, Tel: (866) 740-1232, email: toronto@murata-ps.com UK: Milton Keynes, Tel: +44 (0)1908 615232, email: mk@murata-ps.com France: Montigny Le Bretonneux, Tel: +33 (0)1 34 60 01 01, email: france@murata-ps.com Germany: München, Tel: +49 (0)89-544334-0, email: munich@murata-ps.com Japan: Tokyo, Tel: 3-3779-1031, email: sales_tokyo@murata-ps.com Osaka, Tel: 6-6354-2025, email: sales_osaka@murata-ps.com China: Shanghai, Tel: +86 215 027 3678, email: shanghai@murata-ps.com Guangzhou, Tel: +86 208 221 8066, email: guangzhou@murata-ps.com Singapore: Parkway Centre, Tel: +65 6348 9096, email: singapore@murata-ps.com Murata Power Solutions, Inc. 11 Cabot Boulevard, Mansfi eld, MA 02048-1151 U.S.A. Tel: (508) 339-3000 (800) 233-2765 Fax: (508) 339-6356 www.murata-ps.com email: sales@murata-ps.com ISO 9001 and 14001 REGISTERED Technical enquiries email: sales@murata-ps.com, tel: +1 508 339 3000www.murata-ps.com 03/23/09