ADC84 BURR-BROWN | Alldatasheet

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BURR-BROWN CORP LIE D Bizsiacs OOL40b & | T-S]-10- 12 BURR-BROWN® - ADC84 eS ADC85H ere erriii! ie ADC87H FEATURES © THREE TEMPERATURE RANGES: © INDUSTRY STANDARD 12-7 A/D convERTERS «= OUCIO F700 ‘© COMPLETE WITH CLOCK AND INPUT BUFFER $56 to +125°C © HIGH SPEED CONVERSION: 10u8 (max) ¢ HO MISSING CODES OVER FULL TEMPERATURE ‘© REDUCED CHIP COUNT—HIGH RELIABILITY RANGE © LOWER POWER DISSIPATION: 450mW (typ) © PARALLEL AND SERIAL OUTPUTS © £0.012% MAX LINEARITY © £12V or +15V POWER SUPPLY OPERATION © HERMETIC 32-PIN CERAMIC SIDE-BRAZED O1P DESCRIPTION initial accuracies of better than £0.012% (+1/2LSB). The ADC85H Series of analog-to-digital converters The fast 10s conversion speed for 12-bit resolution utilize state-of-the-art IC and laser-trimmed thin- makes these ADCs excellent for a wide range of film components, and are packaged in a 32-pin applications where system throughput sampling rates hermetic side-brazed package. of 100kHz are required. In addition, they may be Complete with internal reference and input buffer short cycled and the clock rate control may be used amplifier, they offer versatility and performance to obtain faster conversion speeds at lower reso- formerly offered only in larger modular or rack- lutions. mount packages. Data is available in parallel and serial form with Thin-film internal scaling resistors are provided for corresponding clock and status signals. All digital the selection of analog input signal ranges of +2.5V, _ input and output signals are CMOS/TTL-compat- ESV, £10V, 0 to +5V or 0 to +10V. Gain and offset _ible. Power supply voltages are +12VDC or +15VDC errors may be externally trimmed to zero, offering and +SVDC. International Airport Industrial Park - P.0. Box 11400 - Tucson, Arizona 85734 - Tel, (602) 746-1111 - Twx; 910-952-1111 - Cable: BBRCORP - Telex: 66-6491 POS7A Burr-Brown IC Data Book 91-44 Vol. 33 i i

BURR-BROWN CORP | ALE D 1731365 OO14b07 8 i ELECTRICAL T-51-10-12 : Specified at +25°C and rad supplies unloss otherwise noted. a cs CR a ee ANALOG Voltage Ranges: Bipolar 425, £8,210 Unipolar 010 45,0%0 +10 Impedance (Direct inpul): oto +5v,226V | 245) 25) 255 o dwrov.esv | a3 | 6 | sa +100 98 wo | 102 c Buffer Amplifier: Impedance 100 Ww Bias Current 0 Ee Setting Time to tc 0.01% for 20V step 2 Ww DIGITAL™ > (Convert Command Positive pulso 60ns (min, tralling edge initiates conversion 5 Logie Loading 1 : : Treas 9 ACCURACY a Gain Error 20.1 £0.25 . ° % Ottset Exar: Unpotar ious | Soa : + | worrsam | @ Bipolar 401 | £025 : + | hotrsr Uneaity Error® 20012 . + | sotrsee | 2 Inherent Quantization Error 20.5 uss fo} Ditlerental Linearity ror 308 tse = [No Missing Codes Temperature Range +0 40s +128 *c E POWER SUPPLY SENSITIVITY < Gain and Offeat: £15V 20.008 Sof FSRIAVG EB av 20001 Sot FSAAVS ORIFT uy ain +90 Pend a5 | pmo | Offset: Unipotar 43 Es) 48 | ppmofrsarc | = Bipolar 218 47 Ho | ppmotesrrc | fe Unearity Fy 42 42 | ppmotFsArc | pe Monatoncity Guaranteed . 5 CC A GC {All Codes Complementary) . Parallel Output Codes: Unipolar csB Bipolar 008, cre ‘Output Drive 2 | a O: 1 Serie Oata Codes (NRZ) 88, coB 5 ‘Output Drive 2 4 TTL Loads status Logie “t* during conversion Output Orive 2 Tr Loads Internal Clock: Output Drive 2 ‘TTL Loads: Frequency” 1.35 MHz Reterence Output yee] +89] t00 . v & Max. External Curent With No Degradation 200 aA FS Tempco of rit +20 35 some 5 Rated Supply Voltages: +5, £12 or £15 v = ‘Supply Ranges: Veo +475 45.25 v Neo ia 0s v ‘Supply Drain: Hee 20 mA a mies Fa mA loo 10 mA < Total Power Dissipation aso_|_ 72s mw Specification +70 705 ar *c Operating (wih Derated Specs) +85 +125 “c Storage +190 . . B *Speciticaton lathe same as ADCRAKG-12 Burr-Brown IC Data Book 9.1-45 Vol. 33

ee ae SV _aeGOvOwOioe—070QeeEo7''UO BURR-BROUN CORP LLE D Bazarass OO14b04a T | NOTES: (1) Model ADC84KG-10is the same as model ADC84KG-12 except for the following: (a) Resolution: 10 bits (max), (b) Linearity’ ‘Error: +0.048% of FSR (max), (c) Conversion Time: 6ys (max), (d) Internal Clock Frequency: 1.9MHz (typ). (2) if the buffer is used, delay Convert Command until amplifier "1" =2.4V (min). (4) Adjustable to zero. (5) FSR means Full Scale Range. (6) The error shown is the same as £1/2LSB max linearity error in % of T-51-10-12 CONNECTION DIAGRAM—ADC85H SERIES pssrrieum ene O D ssnarou aun Q 8 “Vee assreroein ato CY FS 1 uteri ate G E> +42 suterou ans ©} I) +¥%c0 THis Bit7 q— le e HE? 2 cain adjust ous G}—_ lj] 3 Hee rai Common 5; oe 2) Bits 3 ——— 8 = EH ‘| Fe 20 Ranga ans C5) & He 12 10 Rong sts ge 123) sipotar ottset one APH canes ens use) @ PTT Jo comer conn ons 030) © [fo ante Short Cycle (14) (19) Clock Out Oita common G3 Bo rerwercsou e830 ve @ Phot Rate conte MECHANICAL 92 ™ reference only. Pin numbers J ow ee | [ian [wax |" win [MAX] 1 16 L [| 880 {900 | 2235 [2.86 | oy [186 [asi [472 | f TaieTO-o83 tenoeet ~ re Ee pagans Festa mane! Remericiy: conomere PP as as tag tat Nt ‘A2 (tine leak) and Condition C Ce [se] se Troe se Be are ORDERING INFORMATION ORDERING INFORMATION BURN-IN SCREENING OPTION . eee re oe [os | one | . \\OCB4KG-12_ °C to +70°C (1e0ny pcmnove| 3 lasers sere nore OVO ato Burr-Brown IC Data Book 9.1-46 Vol. 33 i

inherent Quantization Error of +1/2LSB. The remaining range. Figure 2 is the timing diagram. FIGURE 2. Timing Diagram.

a eee eeEEOOOeoeeeeeeeeeeee BURR-BROWN CORP LLE D Bazaiaes goL4b10 4 | DIGITAL CODES T-51-10-12 definitions for each possible analog input signal range Parallel Data for 8-, 10-, and 12-bit resolutions. Three binary codes are available on the ADC8SH series Serial Data Parallel output: oo ‘Two straight binary (complementary) codes are available ‘© complementary (logic “0” is true) straight binary (CSB) on the serial output line; they are CSB and COB. The for unipolar input signal ranges; ; serial data is available only during conversion and © complementary two's complement (CTC) for bipolar appears with the most significant bit (MSB) occurring input signal ranges; a first. The serial data is synchronous with the internal © complementary offset binary (COB) for bipolar input clock as shown in the timing diagram of Figure 2. The signal ranges. LSB and transition values shown in Table I also apply to Table I describes the LSB, transition values and code _the serial data output except for the CTC code. TABLE I. Input Voltages, Transition Values, LSB Values, and Code Definitions. |____ Binary ouput | nut Vottoge Range and ise values | Araiog nputvettage Ranges | detinedas [sv [sav zy [ow tov [orev | [coseDesonston |__| cos orcTa | cos orcra=| cosmercve= | oss” | csa® | ‘One Least Significant Bit (LSB) FSR/2" ‘2ovie" tov/2" Sve tow/2" Sv/2" n=10 19.53mV 977mv 426m a7 4.68mV n=12 seem 244m 122m 244m 120m Transition Values MsB LSB 000...000"" Full Scate | +10v-gvalse | +8v-a/aisp | +2sv-s/2LsB | +10v-3/2LsB | +5V—3/2LSB onan Mid Scale ° ° ° + +25 1110 ~FullScale_| -sov+wvaise | -sv+vaise | -26v+vasa | o+vase | o+vase NOTES: (1) COB = Complementary Offset Binary. (2) CTC = Complementary Two's Complement—obtained by using the complement of the most-significant bit (MSB). MSB is available on pin 13. (3) Complementary Straight Binary. (4) Voltages given are the nominal value for transition to the code specified ENVIRONMENTAL SCREENING The inherent reliability of a semiconductor device is lifetimes. Burr-Brown Q models are environmentally controlled by the design, materials, and fabrication of screened versions of our standard industrial products, the device—it cannot be improved by testing. However, _ designed to provide enhanced reliability. The screening the use of environmental screening can eliminate the _illustrated in Table II is performed to selected methods majority of those units which would fail early in their of MIL-STD-883. Reference to these methods provides a convenient way of communicating the screening levels TABLE Il. Screening for ADC8SHQ-I2 and and basic procedures employed; it does not imply con- ADC87HQ-12, formance to any other military standards or to any methods of MIL-STD-883 other than those specified. | scum | TOT sents tet Burr-Brown’s detailed procedures may vary slightly, Method, Condition model-to-model, from those in MIL-STD-883, High Temperature Stor 1008, 24our, +150" "tescorons™” | S| | DISCUSSION OF perwronm [mee [eotie= | SPECIFICATIONS [constatAccewaton | aaa [ soa | The ADC8SH series is specified to provide critical Waren eS performance criteria for a wide variety of applications. Beckical Tent aun brown linearity, drift, gain and offset errors, and conversion test procedure speed effects on accuracy, These ADCs are factory- ermaticiy. Fie Leak Tove, Arora2 | 8X10" aim exle trimmed and tested for all critical key specifications. Gross Leak 1014, ‘dubble test only, recondition memes GAIN AND OFFSET ERROR [resect | arco, [| Initial Gain and Offset errors are factory-trimmed to test procedure £0.1% of FSR (40.05% for unipolar offset) at 25°C. ae ie e These ertors may be trimmed to zero by connecting test procedure external trim potentiometers as shown in Figures 6 and 7. [éstemat visual acsisoe + Available upon request. Burr-Brown IC Data Book 9.1-48 Vol. 33

23 T+ +18v00 S

230 {_| | -~ Za. A] oracrentoral.

  1. TAT |] maximum input signal range as possible in order to Q

FIGURE 3. Power Supply Rejection vs Power Supply 8

BURR-BROWN CORP MLE D Bizaras OOL4bL2 1 I . FIGURE 5. Input Scaling Circuit. set Ady TABLE III. Input Scaling Connections. ororiov | _csB 26_| Open 24 Adjust.

  • . . with TCR of +100ppm/°C or less as shown in Figure 8.

(Gain Adjust) should be bypassed with 0.01uF to reduce not recommended. if no external adjustment is required. tion voltage values of the input are given in Table 1. in Figure 7. Sweep the input through the end point jjust. Table I details the transition voltage levels required.

2) Dee models only. (4) 10- or 12-bit models. FIGURE 9. Conversion Time vs Clock Speed Control. outputs will drive two standard TTL loads; however, if Ud