ADC804

ADC804 BURR-BROWN | Alldatasheet

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 8

Technical content

———s ADC804 Serial Output FEATURES The maximum conversion time of I7usec makes the ADC804 ideal for a wide range of 12-bit applications © 17sec CONVERSION TIME requiring system throughput sampling rates up to © SERIAL OUTPUT—ideal for applications requiring 59kH7. In addition, an external clock may be used isolation or long-distance data transmission to synchronize the converter to the system clock or © <S00mW POWER DISSIPATION to obtain faster operation. As an added benefit for ADC80 users employing the serial output capability, © 24-PIN QUAL-WIDE HERMETIC PACKAGE the ADC804 is designed to replace or provide an © FULLY SPECIFIED FOR OPERATION ON +12V OR alternate source to ADC80 with a minimum of cir- +15V SUPPLIES cuit board changes and it provides a 40% reduction © +0.012% INTEGRAL LINEARITY in conversion time. © 12-BIT RESOLUTION Data is available in serial form with corresponding ‘© TWO TEMPERATURE RANGES AVAILABLE: clock and status signals. Elimination of the parallel ADCBOABH for ~25°C to +85°C Operation output capability enables the ADC804 to be the ADCBOASH for 55°C to +125°C Operation smallest fully self-contained 12-bit ADC available ose i" today. All digital input and output signals are © NO MISSING CODES —25°C TO +85°C TTL/LSTTL-compatible, with internal pull-up resis tors included on all digital inputs to eliminate the need for external pull-up resistors on digital inputs DESCRIPTION not requiring connection. The ADC804 operates The ADC804 is a 12-bit successive approximation _equallly well with either +15V or +12V analog power analog-to-digital converter, custom-designed for supplies, and also requires use of a +5V logic freedom from latch-up and for optimum AC per- supply. It is packaged in a hermetic 24-pin side- formance. It is complete with a comparator, a brazed ceramic dual-in-line package. monolithic 12-bit DAC which includes a 6.3V refer- ence laser-trimmed for minimum temperature coeffi- cient, and a CMOS logic chip containing the succes-._S1&x unit sive approximation register (SAR), clock, and all emg other associated logic funtions. sonrarae [com] oon Internal scaling resistors are provided for the selec- ogo snes tion of analog input signal ranges of +2.5V, +5V, soem | sce | ena our IOV, 0 to +5V, or 0 to +10V. Gain and offset tov act > ercamaton | —~o . . eciren errors may be externally trimmed to zero, enabling initial end-point accuracies of better than +0.012% (+1/2LSB). The ADC804 has two grades, one com- pletely specified for ~25°C to +85°C operation Cami | (ADC804BH), and the other for —55°C to +125°C nese ° operation (ADC804SH). ‘erence ou International Airport industrial Park - P.O. Box 11400 - Tucson, Arizona 85734 - Tel, 602} 746-1111 - Twx: ‘910-952-1111 - Cable: BBRCORP - Telex: 66-6491 PDS-5768) Burr-Brown IC Data Book 9.1-78 Vol. 33

Thm 425°C, #Vee = 12V oF 15V, Voo = +5V unless otherwise specified a a a co a ‘ANALOG Voltage Ranges: Unipotar 010 +5,010410 v Bipolar 425, +5. +10 v Impedance: 010 +5V. +2.5V 23 Ko Oto +10v, +5V 46 Ko o S10v 82 «0 id DIGITAL Ww Logie Characteristics (over specification temperature range) Ee Vor (logic "1") 20 55 v va Vi (logic “O") -03 +08 v wi tow (Van = $27) =150 yA > th (Vm =40.4V) 800 wa Convert Command Pulse Width 100 1200 nsec $ “ACCURACY _—— oO Gain Error +01 | 403 % of FSR™ a Offset Error: Unipolar 2005 | +02 % of FSA 2 Bipolar zor | 403 4% of FSA Linearity Error 20.012 Sof FSR z Differential Linearity Error I ise S Inherent Quantization Error ve use POWER SUPPLY SENSITIVITY - Pras e ters HSV or H114VS-4VeeS+126V 20.003 | +0.009 tot FSRAVe < “16,5V = ~Voe S ~13 8V oF ~12.6V = ~VeoS—114V 20.003 | 40.008 of FSA/WVee Ee +45VS Voo = +5.5V 0.002 _| +0.005 Sot FSR/Vo0 2 DRIFT Ww Total Accuracy, Bipolar io | 423 : : emi" Ss Gain +15 | 490 : : pom" 5 Ofset: Unipolar Fs) : pm of FSA/*C Bipolar a7 | 415 : + | bpm of FSRVC oc Linearity Error Drift + +3 . . ppm of FSR/*C EE Differentiai Linearity over Temperature Range +4 | - se n No Missing Code Temperature Range -25 es | 55 +125 *c z Monotonicity Over Temperature Range Guaranteed Guaranteed = Lcowersowrwe OE Pe | DIGITAL (Clock Out, Status, Serial Out) Output Codes, Serial (NRZ)" s8,coe] 9.41 Logic Levels: Logic 0 (lnm = 3.2mA) +04 v {Logic + (amen = BVA) +24 v Internal Clock Frequency 23 ke INTERNAL REFERENCE VOLTAGE Vottege 462 | +63 | +64 v ‘Source Current Available for External Loads™ 200 ua Temperature Cootticient +10 | +90 ppm*c POWER SUPPLY REQUIREMENTS a Voltage, #Vec ana £165 v Yoo +45 455 v <_< Current, Hee 85 ma “tee Ey mA loo 6 ma Power Dissipation (Vee = 15V) 595 mw TEMPERATURE RANGE (Ambient) Specification +85 +125 *c Storage +150 : “c *Same as specification for ADCBO4BH NOTES: (1) Gain and oftset errors are adjustable to zero, See “Optional External Gain and Otset Adjustments” section. (2) FSR means full-scale range [and Is 20V for +10V Range, 10V for +'5V and 0 to +10V ranges, etc. (3) Includes drift due to linearity, gain, and offeet drits. (4) Conversion time is Specified using internal clock. For operation with an external clock se@ “Clock Options” section. (5) CSB means Complementary Straight Binary, and COB means Complementary Oitset Binary, NRZ means non-return-to-zero coding. See Table | for additional information. (6) External loading must be constant during conversion, and must not exceed 200A for guaranteed specifications, Burr-Brown IC Data Book 9.1-79 Vol. 33

§ 8 Pint -N/C Pin 24 - N/C 12-817 O/A ee Pin2 -N/C Pin 23 - N/C @ CONVERTER 2) Pind NIG Pin22 -Seral Out | (a) Pina We Pinal - Vee a WU GAAIH bs) Pin - Voo Pin 20 - Reference Out (+6.3V) sy 5 Pin6 - Digital Common Pin 19 - Clock Out cc Pin 8 ~ Bipolar Offset Pin 17 - N/C — ai Pind - Rt 10V Range Pin 16 - Clock Inhibit — Lal (i) Pin 10 - R220V Range Pin 15 - External Clock <| <i Pin 11 - Analog Common Pin 14 - Convert Command or co on re Pin 12 - Gain Adjust Pin 13 - +Vec C0} —r —— (15) <| — > %) Ca plp ABSOLUTE MAXIMUM RATINGS War to Analog Common Ton Ot ESV Power Desipation “00omw =Ver to Analog Common : Soto 165 Leas Temperature, Soldering»... +1300", tose Mex 'o Dg Common Ot0+7v Thermal Resistance, 6 : eorcrw ‘Analog Common to Digital Common Aulog Common to Dita Common 205 sents sb0v8 tote lated under “Abtoste Monimum Ratnge eoigeel common av t0 Veo 405 may cause permanent damage to the device. Exposure o absolute Anaiogunpute (Araig in Bipoar Oia ‘maximum conditions for extended periods may alfect device relie- to Analog Common a . e +165V buity. Reference Output indetiite Short to Common CAUTION: These devices are sensitive to electrostatic ciacharge. Momentary Shor 0 Voc Appropriate IC. hendling procedures should be followed. —— DISCUSSION OF a NOTE: Leads in true position t iT winin oro" (25mm/RawMcat | SPECIFICATIONS eating plane ® LINEARITY ERROR Linearity error is defined as the deviation of actual code - iy -F ’ transition values from the ideal transition values. Under a Ly this definition of linearity (sometimes referred to as inte- na Haters gral linearity), ideal transition values lie on a line drawn See Le tee Lom bg PTE] ] ©— through zero (or minus full scale for bipolar operation) ae ack Lp ‘seating [a Fe and plus full scale, providing a significantly better defini- [ss6 {coe Fess Tis ]} tion of converter accuracy than the best-straight-line-fit [stat ates fs{| definition of linearity employed by some manufacturers, [e[ we [oe oar ior|] The zero or minus full-scale value is located at an analog eae tee esc |] input value 1/2LSB before the first code transition [2 | os Toe For Te] (FFF to FFEn). The plus full-scale value is located at Fe fares SSS |] an analog value 3/2LSB beyond the last code transition Cet oo T wei Tis} (001 t0 000s). See Figure |, which illustrates these rela- tionships. A linearity specification which guarantees ORDERING INFORMATION +1/2LSB maximum linearity error assures the user that no code transition will differ from the ideal transition value by more than +1/2LSB. ADGBABH | -25°C 10 485°C Thus, for a converter connected for bipolar operation apcsoasHa — | -25°C to +85°C " s v a ppceuupHa | “25°10 00-0 and with a full-scale range (or span) of 20V (10V opera Aocamsna | secre’ tion), the minus full-scale value of —10V is 2.44mV BURNIN SCREENING OPTION below the first code transition (FFFy to FFEn at ~9.99756V) and the plus full-scale value of +10V is 7.32mV above the last code transition (00In to 000n at +9,99268V). Ideal transitions occur ILSB (4.88mV) apart, errors and the +1/2LSB linearity specification guarantees that ADCBOSHO +125¢ no actual transition will vary from the ideal by more NOTE: Or equivalent combination, Soe text than 2.44mV. The LSB weights, transition values, and Burr-Brown IC Data Book 9.1-80 Vol. 33

77 over the temperature range of —55°C to +125°C. FIGURE 1. ADC804 Transfer Characteristic bipolar offset at the first transition value above the 4 ing that every input quantum must have a finite width. If above and below +25°C.

TIMING CONSIDERATIONS into external logic devices without external shaping. FIGURE 2. ADC804 Timing Diagram (normal values ters and associated resistors should be located as close to time and the length of the convert command. The code supply lines can degrade the converter's performance. will accurately represent the analog input to the conver- especially troublesome. “n+ I", Thus, a complete conversion requires 13 clock _the internal D/A converter as it tests the various bits.

padding resistors to modify the factory-set input ranges (8.06cm’) is obtained.

1 RANGE ed toon | 2 0 6

FIGURE 3. ACD804 Input Scaling Circuit. ry ry] 2 1 vemamne 3 j commes : —9,99756V for the —10V to +10V range. FIGURE 4, Adapting an ADC80 Layout for ADC804 time.

are environmentally-screened versions of our standard TABLE III. Screening Flow for ADC804xHQ industrial products, designed to provide enhanced relia- bility. The screening illustrated in Table III is performed to selected methods of MIL-STD-883. Reference to these methods provides a convenient method of com- ‘Bur Brown Ca ea et eed [mee [eee employed; it does not imply conformance to any other | righ Temperature military standards or to any methods of MIL-STD-883 Storage 1008, ¢ 26 nour $350 other than those specified. Burr-Brown’s detailed proce- (Stabilization Bake) dures may vary slightly, model-to-model, from those in MISTS [seamen | ena 00] Electrical Test, Bur-Brown a BURN-IN SCREENING Jeers | birt | 4 = Ww Burn-in screening is an option available for the ADC804. a ae ee = Burn-in duration is 160 hours at +125°C ambient temper-— |———— [4 ature (or equivalent combination of time and temp- Fe ienn jou.aroraz | 5x10" atm ce/see wl erature). Gross Leak 1014, 6 bubble test only, z prconctoring omited All units are tested after burn-in to ensure that grade Bunbrown ° specifications are met. To order burn-in, add “BI” to the | Preteens | test procedure [| (5) ae ed a test procedure 2 a ca Con Fs E E Wi wo Burr-Brown IC Data Book 9.1-85 Vol. 33