ADC78H90

ADC78H90 NSC | Alldatasheet

Document overview

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Technical content

Features

n Variable power management n Independent analog and digital supplies n SPI™ /QSPI™ /MICROWIRE™ /DSP compatible n Packaged in 16-lead TSSOP Key Specifications n Conversion Rate 500 kSPS n DNL ± 1 LSB (max) n INL ± 1 LSB (max) n Power Consumption — 3V Supply 1.5 mW (typ) — 5V Supply 8.3 mW (typ)

Applications

n Instrumentation and Control Systems Connection Diagram 20079305

Ordering Information

Order Code Temperature Range Description ADC78H90CIMT −40˚C to +85˚C 16-Lead TSSOP Package ADC78H90CIMTX −40˚C to +85˚C 16-Lead TSSOP Package, Tape & Reel ADC78H90EVAL Evaluation Board TRI-STATE® is a trademark of National Semiconductor Corporation. MICROWIRE™ is a trademark of National Semiconductor Corporation. QSPI™ and SPI™ are trademarks of Motorola, Inc. March 2005 ADC78H90 8-Channel, 500 kSPS, 12-Bit A/D Converter © 2005 National Semiconductor Corporation DS200793 www.national.com

Pin Descriptions and Equivalent Circuits Pin No. Symbol Equivalent Circuit Description ANALOG I/O 4 - 11 AIN1 to AIN8 Analog inputs. These signals can range from 0V to AV DD. DIGITAL I/O

16 SCLK

Digital clock input. The range of frequencies for this input is 50 kHz to 8 MHz, with guaranteed performance at 8 MHz. This clock directly controls the conversion and readout processes. 15 DOUT Digital data output. The output samples are clocked out of this pin on falling edges of the SCLK pin. 14 DIN Digital data input. The ADC78H90’s Control Register is loaded through this pin on rising edges of the SCLK pin. 1C S Chip select. On the falling edge of CS, a conversion process begins. Conversions continue as long as CS is held low. POWER SUPPLY 2A V DD Positive analog supply pin. This pin should be connected to a quiet +2.7V to +5.25V source and bypassed to GND with a 1 µF tantalum capacitor and a 0.1 µF ceramic monolithic capacitor located within 1 cm of the power pin. 13 DV DD Positive digital supply pin. This pin should be connected to a +2.7V to AVDD supply, and bypassed to GND with a 0.1 µF ceramic monolithic capacitor located within 1 cm of the power pin. 3 AGND The ground return for the analog supply and signals. 12 DGND The ground return for the digital supply and signals. ADC78H90 www.national.com 2

Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Analog Supply Voltage AV DD −0.3V to 6.5V Digital Supply Voltage DVDD −0.3V to AVDD + 0.3V, max 6.5V Voltage on Any Pin to GND −0.3V to AV DD +0.3V Input Current at Any Pin (Note 3) ±10 mA Package Input Current(Note 3) ±20 mA Power Dissipation at T A = 25˚C See (Note 4) ESD Susceptibility (Note 5) Human Body Model Machine Model 2500V 250V Soldering Temperature, Infrared, 10 seconds (Note 6) 260˚C Junction Temperature +150˚C Storage Temperature −65˚C to +150˚C Operating Ratings (Notes 1, 2) Operating Temperature Range −40˚C ≤ TA ≤ +85˚C AVDD Supply Voltage +2.7V to +5.25V DVDD Supply Voltage +2.7V to AV DD Digital Input Pins Voltage Range -0.3V to AV DD Clock Frequency 50 kHz to 8 MHz Analog Input Voltage 0V to AV DD Package Thermal Resistance Package θJA 16-lead TSSOP on 4-layer, 2 oz. PCB 96˚C / W ADC78H90 Converter Electrical Characteristics (Note 8) The following specifications apply for AV DD =D VDD = +2.7V to 5.25V, AGND = DGND = 0V, f SCLK = 8 MHz, f SAMPLE = 500 KSPS, unless otherwise noted. Boldface limits apply for T A =T MIN to TMAX: all other limits T A = 25˚C. Symbol Parameter Conditions Typical Limits (Note 7) Units STATIC CONVERTER CHARACTERISTICS Resolution with No Missing Codes 12 Bits INL Integral Non-Linearity AV DD = +5.0V, DVDD = +3.0V ±1 LSB (max) DNL Differential Non-Linearity AV DD = +5.0V, DVDD = +3.0V ±1 LSB (max) VOFF Offset Error AV DD = +5.0V, DVDD = +3.0V ±2 LSB (max) OEM Offset Error Match AV DD = +5.0V, DVDD = +3.0V ±2 LSB (max) GE Gain Error AV DD = +5.0V, DVDD = +3.0V ±3 LSB (max) GEM Gain Error Match AV DD = +5.0V, DVDD = +3.0V ±3 LSB (max) DYNAMIC CONVERTER CHARACTERISTICS SINAD Signal-to-Noise Plus Distortion Ratio AVDD = +5.0V, DVDD = +3.0V, fIN = 40.2 kHz, −0.02 dBFS 73 70 dB (min) SNR Signal-to-Noise Ratio AVDD = +5.0V, DVDD = +3.0V, fIN = 40.2 kHz, −0.02 dBFS 73 70.8 dB (min) THD Total Harmonic Distortion AVDD = +5.0V, DVDD = +3.0V, fIN = 40.2 kHz, −0.02 dBFS −86 −74 dB (max) SFDR Spurious-Free Dynamic Range AVDD = +5.0V, DVDD = +3.0V, fIN = 40.2 kHz, −0.02 dBFS 88 75.6 dB (min) ENOB Effective Number of Bits AV DD = +5.0V, DVDD = +3.0V, 11.8 11.3 Bits (min) Channel-to-Channel Crosstalk AVDD = +5.0V, DVDD = +3.0V, fIN = 40.2 kHz -82 dB IMD Intermodulation Distortion, Second Order Terms AVDD = +5.0V, DVDD = +3.0V, fa = 40.161 kHz, f b = 41.015 kHz -93 dB Intermodulation Distortion, Third Order Terms AVDD = +5.0V, DVDD = +3.0V, fa = 40.161 kHz, f b = 41.015 kHz -90 dB FPBW -3 dB Full Power Bandwidth AVDD = +5V 11 MHz AVDD = +3V 8 MHz ADC78H90 www.national.com3

ADC78H90 Converter Electrical Characteristics (Note 8) (Continued) The following specifications apply for AV DD =D VDD = +2.7V to 5.25V, AGND = DGND = 0V, f SCLK = 8 MHz, f SAMPLE = 500 KSPS, unless otherwise noted. Boldface limits apply for T A =T MIN to TMAX: all other limits T A = 25˚C. Symbol Parameter Conditions Typical Limits (Note 7) Units ANALOG INPUT CHARACTERISTICS VIN Input Range 0 to AV DD V IDCL DC Leakage Current ±1 µA (max) CINA Input Capacitance Track Mode 33 pF Hold Mode 3 pF DIGITAL INPUT CHARACTERISTICS VIH Input High Voltage DVDD = +4.75Vto +5.25V 2.4 V (min) DVDD = +2.7V to +3.6V 2.1 V (min) VIL Input Low Voltage DV DD = +2.7V to +5.25V 0.8 V (max) IIN Input Current V IN =0 Vo rD V DD ±0.01 ±1 µA (max) CIND Digital Input Capacitance 2 4 pF (max) DIGITAL OUTPUT CHARACTERISTICS VOH Output High Voltage ISOURCE = 200 µA, DV DD = +2.7V to +5.25V DVDD −0.5 V (min) VOL Output Low Voltage I SINK = 200 µA 0.4 V (max) IOZH, IOZL TRI-STATE® Leakage Current ±1 µA (max) COUT TRI-STATE® Output Capacitance 2 4 pF (max) Output Coding Straight (Natural) Binary POWER SUPPLY CHARACTERISTICS (C L =1 0p F ) AVDD, DVDD Analog and Digital Supply Voltages AV DD ≥ DVDD

2.7 V (min)

5.25 V (max)

Total Supply Current, Normal Mode (Operational, CS low) AVDD =D VDD = +4.75V to +5.25V, fSAMPLE = 500 kSPS, f IN =4 0k H z 1.65 2.3 mA (max) AVDD =D VDD = +2.7V to +3.6V, fSAMPLE = 500 kSPS, f IN =4 0k H z 0.5 2.3 mA (max) Total Supply Current, Shutdown (CS high) AVDD =D VDD = +4.75V to +5.25V, fSAMPLE = 0 kSPS 200 nA AVDD =D VDD = +2.7V to +3.6V, fSAMPLE = 0 kSPS 200 nA PD Power Consumption, Normal Mode (Operational, CS low) \\AVDD =D VDD = +4.75V to +5.25V 8.3 12 mW (max) AVDD =D VDD = +2.7V to +3.6V 1.5 8.3 mW (max) Power Consumption, Shutdown (CS high) AVDD =D VDD = +4.75V to +5.25V 0.5 µW AVDD =D VDD = +2.7V to +3.6V 0.3 µW AC ELECTRICAL CHARACTERISTICS f SCLK Maximum Clock Frequency 8 MHz (min) fSMIN Minimum Clock Frequency 50 kHz fS Maximum Sample Rate 500 KSPS (min) tCONV Conversion Time 13 SCLK cycles DC SCLK Duty Cycle 50 40 % (min) 60 % (max) tACQ Track/Hold Acquisition Time Full-Scale Step Input 3 SCLK cycles Throughput Time Acquisition Time + Conversion Time 16 SCLK cycles fRATE Throughput Rate 500 kSPS (min) tAD Aperture Delay 4 ns ADC78H90 www.national.com 4

ADC78H90 Timing Specifications The following specifications apply for AV DD =D VDD = +2.7V to 5.25V, AGND = DGND = 0V, f SCLK = 8 MHz, f SAMPLE = 500 KSPS, CL =5 0p F , Boldface limits apply for T A =T MIN to TMAX: all other limits T A = 25˚C. Symbol Parameter Conditions Typical Limits (Note 7) Units t1a Setup Time SCLK High to CS Falling Edge (Note 9) 10 ns (min) t1b Hold time SCLK Low to CS Falling Edge (Note 9) 10 ns (min) t2 Delay from CS Until DOUT active 30 ns (max) Data Access Time after SCLK Falling Edge 30 ns (max) Data Setup Time Prior to SCLK Rising Edge 10 ns (min) t5 Data Valid SCLK Hold Time 10 ns (min) t6 SCLK High Pulse Width 0.4 x tSCLK ns (min) t7 SCLK Low Pulse Width 0.4 x tSCLK ns (min) CS Rising Edge to DOUT High-Impedance 20 ns (max) Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characterist ics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the lis ted test conditions. Note 2: All voltages are measured with respect to GND = 0V, unless otherwise specified. Note 3: When the input voltage at any pin exceeds the power supplies (that is, VIN < AGND or VIN > VA or VD), the current at that pin should be limited to 10 mA. The 20 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 10 mA to two. Note 4: The absolute maximum junction temperature (T Jmax) for this device is 150˚C. The maximum allowable power dissipation is dictated by T Jmax, the junction-to-ambient thermal resistance (θJA), and the ambient temperature (TA), and can be calculated using the formula PDM A X=( TJmax − TA)/θJA. In the 16-pin TSSOP, θJA is 96˚C/W, so PDMAX = 1,200 mW at 25˚C and 625 mW at the maximum operating ambient temperature of 85˚C. Note that the power consumption of this device under normal operation is a maximum of 12 mW. The values for maximum power dissipation listed above will be reached only when the ADC78H90 is operated in a severe fault condition (e.g. when input or output pins are driven beyond the power supply voltages, or the power supply polarity is reversed). Obviously, such conditions should always be avoided. Note 5: Human body model is 100 pF capacitor discharged through a 1.5 k Ω resistor. Machine model is 220 pF discharged through ZERO ohms Note 6: See AN450, “Surface Mounting Methods and Their Effect on Product Reliability”, or the section entitled “Surface Mount” found in any post 1986 Nationa l Semiconductor Linear Data Book, for other methods of soldering surface mount devices. Note 7: Tested limits are guaranteed to National’s AOQL (Average Outgoing Quality Level). Note 8: Data sheet min/max specification limits are guaranteed by design, test, or statistical analysis. Note 9: Clock may be in any state (high or low) when CS is asserted, with the restrictions on setup and hold time given by t 1a and t1b. ADC78H90 www.national.com5

FIGURE 1. ADC78H90 Operational Timing Diagram

Timing Diagrams (Continued) 20079350 SCLK and CS Timing Parameters ADC78H90 www.national.com7

ACQUISITION TIME is the time required to acquire the input voltage. That is, it is time required for the hold capacitor to charge up to the input voltage. APERTURE DELAY is the time between the fourth falling SCLK edge of a conversion and the time when the input signal is acquired or held for conversion. CONVERSION TIME is the time required, after the input voltage is acquired, for the ADC to convert the input voltage to a digital word. CROSSTALK is the coupling of energy from one channel into the other channel, or the amount of signal energy from one analog input that appears at the measured analog input. DIFFERENTIAL NON-LINEARITY (DNL) is the measure of the maximum deviation from the ideal step size of 1 LSB. DUTY CYCLE is the ratio of the time that a repetitive digital waveform is high to the total time of one period. The speci- fication here refers to the SCLK. EFFECTIVE NUMBER OF BITS (ENOB, or EFFECTIVE BITS) is another method of specifying Signal-to-Noise and Distortion or SINAD. ENOB is defined as (SINAD - 1.76) / 6.02 and says that the converter is equivalent to a perfect ADC of this (ENOB) number of bits. FULL POWER BANDWIDTH is a measure of the frequency at which the reconstructed output fundamental drops 3 dB below its low frequency value for a full scale input. GAIN ERROR is the deviation of the last code transition REF - 1.5 LSB), after adjusting for offset error. INTEGRAL NON-LINEARITY (INL) is a measure of the deviation of each individual code from a line drawn from negative full scale ( 1⁄2 LSB below the first code transition) through positive full scale ( 1⁄2 LSB above the last code transition). The deviation of any given code from this straight line is measured from the center of that code value. INTERMODULATION DISTORTION (IMD) is the creation of additional spectral components as a result of two sinusoidal frequencies being applied to the ADC input at the same time. It is defined as the ratio of the power in the second and third order intermodulation products to the sum of the power in both of the original frequencies. IMD is usually expressed in dB. MISSING CODES are those output codes that will never appear at the ADC outputs. The ADC78H90 is guaranteed not to have any missing codes. OFFSET ERROR is the deviation of the first code transition LSB). SIGNAL TO NOISE RATIO (SNR) is the ratio, expressed in dB, of the rms value of the input signal to the rms value of the sum of all other spectral components below one-half the sampling frequency, not including harmonics or d.c. SIGNAL TO NOISE PLUS DISTORTION (S/N+D or SINAD) Is the ratio, expressed in dB, of the rms value of the input signal to the rms value of all of the other spectral compo- nents below half the clock frequency, including harmonics but excluding d.c. SPURIOUS FREE DYNAMIC RANGE (SFDR) is the differ- ence, expressed in dB, between the rms values of the input signal and the peak spurious signal where a spurious signal is any signal present in the output spectrum that is not present at the input, excluding d.c. TOTAL HARMONIC DISTORTION (THD) is the ratio, ex- pressed in dB or dBc, of the rms total of the first five harmonic components at the output to the rms level of the input signal frequency as seen at the output. THD is calcu- lated as where Af1 is the RMS power of the input frequency at the output and Af2 through Af6 are the RMS power in the first 5 harmonic frequencies. THROUGHPUT TIME is the minimum time required between the start of two successive conversion. It is the acquisition time plus the conversion time. In the case of the ADC78H90, this is 16 SCLK periods. ADC78H90 www.national.com 8

Typical Performance Characteristics TA = +25˚C, fSAMPLE = 500 kSPS, f SCLK = 8 MHz, f IN = 40.2 kHz unless otherwise stated. DNL DNL 20079340 20079341 INL INL 20079342 20079343 DNL vs. Supply INL vs. Supply 20079321 20079320 ADC78H90 www.national.com9

Typical Performance Characteristics TA = +25˚C, fSAMPLE = 500 kSPS, f SCLK = 8 MHz, f IN = 40.2 kHz unless otherwise stated. (Continued) SNR vs. Supply THD vs. Supply 20079322 20079332 ENOB vs. Supply SNR vs. Input Frequency 20079333 20079323 THD vs. Input Frequency ENOB vs. Input Frequency 20079324 20079325 ADC78H90 www.national.com 10

Typical Performance Characteristics TA = +25˚C, fSAMPLE = 500 kSPS, f SCLK = 8 MHz, f IN = 40.2 kHz unless otherwise stated. (Continued) Spectral Response Spectral Response 20079330 20079331 Power Consumption vs. Throughput 20079344 ADC78H90 www.national.com11

1.0 ADC78H90 OPERATION

the sampling capacitor until the comparator is balanced. SCLK cycles after CS is brought low.

2.0 USING THE ADC78H90

both the conversion process and the timing of serial data. active when CS is low. Thus, CS acts as an output enable. FIGURE 2. ADC78H90 in Track Mode FIGURE 3. ADC78H90 in Hold Mode

of SCLK, where "N" must be an integer. input that is selected for the conversion after the current one. TABLE 1. Control Register Bits TABLE 2. Control Register Bit Descriptions 7, 6, 2, 1, 0 DONTC Don’t care. The value of these bit do not affect the device.

5 ADD2 These three bits determine which input channel will be sampled and

channels is shown in Table 3.

4 ADD1

3 ADD0

TABLE 3. Input Channel Selection

3.0 ADC78H90 TRANSFER FUNCTION

Other code transitions occur at steps of one LSB.

4.0 TYPICAL APPLICATION CIRCUIT

A typical application of the ADC78H90 is shown in Figure 5. face is also shown connected to a microprocessor or DSP. FIGURE 4. Ideal Transfer Characteristic FIGURE 5. Typical Application Circuit

5.0 ANALOG INPUTS

6.0 DIGITAL INPUTS AND OUTPUTS

CS, and DIN may be asserted before DVDD without any risk.

7.0 POWER SUPPLY CONSIDERATIONS

digital supply noise on the analog supply.

7.1 Power Management

falling edge of the subsequent conversion (see Figure 1).

7.2 Power Supply Noise Considerations

analog channel, degrading noise performance. FIGURE 6. Equivalent Input Circuit

Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead TSSOP Order Number ADC78H90CIMT, ADC78H90CIMTX National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. For the most current product information visit us at www.national.com. LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. BANNED SUBSTANCE COMPLIANCE National Semiconductor manufactures products and uses packing materials that meet the provisions of the Customer Products Stewardship Specification (CSP-9-111C2) and the Banned Substances and Materials of Interest Specification (CSP-9-111S2) and contain no ‘‘Banned Substances’’ as defined in CSP-9-111S2. National Semiconductor Americas Customer Support Center Email: new.feedback@nsc.com Tel: 1-800-272-9959 National Semiconductor Europe Customer Support Center Fax: +49 (0) 180-530 85 86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 69 9508 6208 English Tel: +44 (0) 870 24 0 2171 Français Tel: +33 (0) 1 41 91 8790 National Semiconductor Asia Pacific Customer Support Center Email: ap.support@nsc.com National Semiconductor Japan Customer Support Center Fax: 81-3-5639-7507 Email: jpn.feedback@nsc.com Tel: 81-3-5639-7560 www.national.com ADC78H90 8-Channel, 500 kSPS, 12-Bit A/D Converter