ADC1002S020HL | DigiCamel IC Datasheet

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ADC1002S020 NXP | Alldatasheet

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Technical content

General description The ADC1002S020 is a 10-bit high-speed Analog-to-Digital Converter (ADC) for professional video and other applications. It converts with 3.0 V to 5.25 V operation the analog input signal into 10-bit binary-coded digital words at a maximum sampling rate of 20 MHz. All digital inputs and outputs are CMOS compatible. A standby mode allows a reduction of the device power consumption to 4 mW. 2. Features n 10-bit resolution n 3.0 V to 5.25 V operation n Sampling rate up to 20 MHz n DC sampling allowed n High signal-to-noise ratio over a large analog input frequency range (9.3 effective bits at 1.0 MHz; full-scale input at fclk = 20 MHz) n In-Range (IR) CMOS output n CMOS/Transistor-Transistor Logic (TTL) compatible digital inputs and outputs n External reference voltage regulator n Power dissipation only 53 mW (typical value) n Low analog input capacitance, no buffer ampliﬁer required n Standby mode n No sample-and-hold circuit required 3. Applications n Video data digitizing n Camera n Camcorder n Radio communication n Barcode scanner ADC1002S020 Single 10 bits ADC, up to 20 MHz Rev. 02 — 13 August 2008 Product data sheet

ADC1002S020_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 13 August 2008 3 of 19 NXP Semiconductors ADC1002S020 Single 10 bits ADC, up to 20 MHz 6. Block diagram Fig 1. Block diagram VSSD2 R lad RB RM RT VI VDDD2 VDDA 27 D4 23 D1 22 D0 IN - RANGE LATCH CMOS OUTPUTSLATCHES CLOCK DRIVER 014aaa482 CLK OE STDBY ADC1002S020

20 VDDO

analog ground digital ground 2 digital ground 1 VSSD1 VSSO output ground analog voltage input data outputs LSB MSB VDDD1 IR output ANALOG - TO - DIGITAL CONVERTER CMOS OUTPUT

7.1 Pinning

7.2 Pin description

Table 3. Pin description

ADC1002S020_2 © NXP B.V. 2008. All rights reserved. the supply voltageΔVDD remains as indicated. Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Table 5. Thermal characteristics

ADC1002S020_2 © NXP B.V. 2008. All rights reserved. to code 1023 at Tamb = 25°C. resistor ladder are connected to pins RB and RT via offset resistors ROB and ROT as shown inFigure3. parallel and fed with the same reference source, the matching between each of them is optimized. wave signal) in order to sample the signal and obtain correct output data. SIgnal-to-Noise And Distortion (SINAD) ratio: SINAD = ENOB× 6.02 + 1.76 dB. [6] Output data acquisition: the output data is available after the maximum delay time of td(o).

Additional information relating toTable6

Table 7. Mode selection Table 8. Standby selection Table 9. Output coding and input voltage (typical values; referenced to VSSA )

ADC1002S020_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 13 August 2008 10 of 19 NXP Semiconductors ADC1002S020 Single 10 bits ADC, up to 20 MHz Fig 4. Timing diagram sample N + 1sample N CLK 014aaa481 sample N + 2 sample N + 1sample N sample N + 2 50% VI DATA D0 to D9 VDDO 0 V 50%DATA N + 1 DATA N DATA N - 1 DATA N - 2 td(o) tw(clk)H tw(clk)L td(s) th(o)

ADC1002S020_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 13 August 2008 11 of 19 NXP Semiconductors ADC1002S020 Single 10 bits ADC, up to 20 MHz frequency on pinOE= 100 kHz. Fig 5. Timing diagram and test conditions of 3-state output delay time LOW HIGH HIGH LOW ADC1002S020 VDDD VDDO OE OE output data output data 10 % 50 % 50 % 90 % 50 % tdLZ tdZL tdHZ tdZH 20 pF 3.3 kW S1TEST VDDOtdLZ VDDOtdZL VSSOtdZH tdHZ VSSO 014aaa484 Fig 6. Typical Integral Non-Linearity (INL) performance 014aaa491 -0.2 0.2 0.6 A (LSB) -0.6 f (MHZ) 0 1200800400200 1000600 1023

ADC1002S020_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 13 August 2008 12 of 19 NXP Semiconductors ADC1002S020 Single 10 bits ADC, up to 20 MHz Fig 7. Typical Differential Non-Linearity (DNL) performance 014aaa492 -0.05 0.05 -0.15 0.15 0.25 A (LSB) -0.25 f (MHZ) 0 1200800400200 1000600 1023 Fig 8. Analog input settling time diagram 014aaa479 code 1023 code 0 50 % 50 %CLK VI ts(LH) ts(HL) 50 % 50 % 5 ns 5 ns 2 ns 2 ns

ADC1002S020_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 13 August 2008 13 of 19 NXP Semiconductors ADC1002S020 Single 10 bits ADC, up to 20 MHz Effective bits: 9.59; THD =−76.60 dB. Fig 9. Typical fast Fourier transform (fclk = 20 MHz; fi = 1 MHz) 014aaa493 -80 -40 A (dB) -120 f (MHz) 0 107.512.5 5.01

ADC1002S020_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 13 August 2008 14 of 19 NXP Semiconductors ADC1002S020 Single 10 bits ADC, up to 20 MHz Fig 10. D9 to D0 and IR outputs Fig 11. VI analog input Fig 12.OE and STDBY inputs Fig 13. RB, RM and RT inputs 014aaa485 VDDO D9 to D0 IR VSSO VDDA VI VSSA 014aaa486 014aaa487 VDDO VSSO OE STDBY VDDA RT RM RB VSSA 014aaa488 R lad R lad R lad R lad Fig 14. CLK input VDDD CLK 1/2 VDDD VSSD 014aaa489

12.1 Application diagram

The analog and digital supplies should be separated and decoupled. The external voltage reference generator must be built in such a way that a good supply voltage ripple rejection is achieved with respect to the LSB value. Eventually, the reference ladder voltages can be derived from a well regulated V DDA supply through a resistor bridge and a decoupling capacitor. (1) RB, RM and RT are decoupled to VSSA (2) Pins 8, 12, 13, 17, 24 and 32 should be connected to the closest ground pin in order to prevent noise inﬂuence (3) When RM is not used, pin 11 can be left open circuit, avoiding the decoupling capacitor. In any case, pin 11 must not be grounded. (4) When the analog input signal is AC coupled, an input bias or a clamping level must be applied to VI input (pin 14). Fig 15. Application diagram ADC1002S020 014aaa490 IR VSSD1 VSSO VDDO VSSD2 VDDD2 VDDD1 VDDA CLK STDBY n.c.(2) VSSA VSSAVSSAVSSA RB (1) RT (1) OEVI(4)n.c.(2) n.c.(2)RM (1) (3) n.c.(2) n.c.(2) n.c.(2) 10 11 12 13 14 15 16 32 31 100 nF 100 nF 100 nF 30 29 28 27 26 25 D5 D4 D3 D2D8 D7 D6

ADC1002S020_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 13 August 2008 16 of 19 NXP Semiconductors ADC1002S020 Single 10 bits ADC, up to 20 MHz 13. Package outline Fig 16. Package outline SOT401-1 (LQFP32) 0.2 UNIT A max. A 1 A 2 A 3 bp cE (1) eH E LL p Zywv q REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm 1.6 0.15 0.05 1.5 1.3 0.25 0.27 0.17 0.18 0.12 5.1 4.9 0.5 7.15 6.85 1 0.95 0.55 o o0.12 0.1 DIMENSIONS (mm are the original dimensions) Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. 0.75 0.45 SOT401-1 136E01 MS-026 00-01-19 03-02-20 D (1) (1)(1) 5.1 4.9 H D 7.15 6.85 EZ 0.95 0.55 D bp e E B DH bp EH v M B D ZD A Z E e v M A X 24 17 q A 1 A Lp detail X L (A )3 A 2 y w M w M 0 2.5 5 mm scale LQFP32: plastic low profile quad flat package; 32 leads; body 5 x 5 x 1.4 mm SOT401-1 c pin 1 index

Corrections made to cross references and note 3 a) inTable6. ADC1002S020_1 20080612 Product data sheet - -

15.1 Data sheet status

[1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Deﬁnitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.

15.2 Deﬁnitions

Draft —The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modiﬁcations or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet —A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales ofﬁce. In case of any inconsistency or conﬂict with the short data sheet, the full data sheet shall prevail.

15.3 Disclaimers

General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes —NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation speciﬁcations and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use —NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications —Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the speciﬁed use without further testing or modiﬁcation. Limiting values —Stress above one or more limiting values (as deﬁned in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale —NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/proﬁle/terms , including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conﬂict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license —Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Quick reference data —The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding.

15.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 16. Contact information For more information, please visit:http://www.nxp.com For sales ofﬁce addresses, please send an email to:salesaddresses@nxp.com Document status[1][2] Product status[3] Deﬁnition Objective [short] data sheet Development This document contains data from the objective speciﬁcation for product development. Preliminary [short] data sheet Qualiﬁcation This document contains data from the preliminary speciﬁcation. Product [short] data sheet Production This document contains the product speciﬁcation.

NXP Semiconductors ADC1002S020 Single 10 bits ADC, up to 20 MHz © NXP B.V. 2008. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 13 August 2008 Document identifier: ADC1002S020_2 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. 17. Contents

11 Additional information relating to

Table6 . . . . 9

Product Information

ADC1002S020HL specifications and overview.

Summary

Single 10 bits ADC, up to 20 MHz Rev. 02-13 August 2008

Description

Single 10 bits ADC, up to 20 MHz Rev. 02-13 August 2008

Source title ADC1002S020HL Datasheet(PDF) - NXP Semiconductors

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