ADC08031 NSC | Alldatasheet
Document overview
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Technical content
Features
n Serial digital data link requires few I/O pins n Analog input track/hold function n 2-, 4-, or 8-channel input multiplexer options with address logic n 0V to 5V analog input range with single 5V power supply n No zero or full scale adjustment required n TTL/CMOS input/output compatible n On chip 2.6V band-gap reference n 0.3" standard width 8-, 14-, or 20-pin DIP package n 14-, 20-pin small-outline packages Key Specifications n Resolution 8 bits n Conversion time (fC = 1 MHz) 8µs (max) n Power dissipation 20mW (max) n Single supply 5V DC (±5% ) n Total unadjusted error ±1⁄2 LSB and ±1LSB n No missing codes over temperature
Ordering Information
Industrial (−40˚C≤ TA ≤ +85˚C) Package ADC08031CIN N08E ADC08031CIWM, ADC08034CIWM M14B ADC08038CIWM M20B TRI-STATE® is a registered trademark of National Semiconductor Corporation. COPS ™ microcontrollers and MICROWIRE™ are trademarks of National Semiconductor Corporation. June 1999 ADC08031/ADC08034/ADC08038 8-Bit High-Speed Serial I/O A/D Converters with Multiplexer Options, Voltage Reference, and Track/Hold Function © 1999 National Semiconductor Corporation DS010555 www.national.com
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Absolute Maximum Ratings(Notes 1, 3) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (V CC ) 6.5V Voltage at Inputs and Outputs −0.3V to V CC + 0.3V Input Current at Any Pin (Note 4) ±5m A Package Input Current (Note 4) ±20 mA Power Dissipation at TA = 25˚C (Note 5) 800 mW ESD Susceptibility (Note 6) 1500V Soldering Information N Package (10 sec.) Vapor Phase (60 sec.) Infrared (15 sec.) (Note 7) 260˚C 215˚C 220˚C Storage Temperature −65˚C to +150˚C Operating Ratings(Notes 2, 3) Temperature Range T MIN ≤ TA ≤ TMAX ADC08031CIN, −40˚C ≤ TA ≤ +85˚C ADC08031CIWM, ADC08034CIWM, ADC08038CIWM Supply Voltage (V CC ) 4.5 V DC to 6.3 VDC
Electrical Characteristics
The following specifications apply for VCC = VREF = +5 VDC , and fCLK = 1 MHz unless otherwise specified.Boldface limits apply for TA = TJ = TMIN to TMAX ;all other limits TA = TJ = 25˚C. Symbol Parameter Conditions ADC08031, ADC08034 and ADC08038 Units (Limits)Typical(Note Limits(Note 9) CONVERTER AND MULTIPLEXER CHARACTERISTICS Total Unadjusted Error (Note 10) BIN, BIWM ±1⁄2 LSB (max) CIN, CIWM ±1 LSB (max) Differential 8 Bits (min) Linearity R REF Reference Input Resistance 3.5 k Ω 1.3 kΩ (min) 6.0 kΩ (max) VIN Analog Input Voltage (Note 11) (VCC + 0.05) V (max) (GND − 0.05) V (min) DC Common-Mode Error ±1⁄4 LSB (max) Power Supply Sensitivity V CC = 5V ±5% , ±1⁄4 LSB (max) VREF = 4.75V On Channel Leakage On Channel = 5V, 0.2 µA (max) Current (Note 12) Off Channel = 0V 1 On Channel = 0V, −0.2 µA (max) Off Channel= 5V −1 Off Channel Leakage On Channel = 5V, −0.2 µA (max) Current (Note 12) Off Channel = 0V −1 On Channel = 0V, 0.2 µA (max) Off Channel= 5V 1 DIGITAL AND DC CHARACTERISTICS V IN(1) Logical “1” Input Voltage V CC = 5.25V 2.0 V (min) VIN(0) Logical “0” Input Voltage V CC = 4.75V 0.8 V (max) IIN(1) Logical “1” Input Current V IN = 5.0V 1 µA (max) IIN(0) Logical “0” Input Current V IN = 0V −1 µA (max) VOUT(1) Logical “1” Output Voltage V CC = 4.75V: IOUT = −360 µA 2.4 V (min) IOUT = −10 µA 4.5 V (min) www.national.com3
Electrical Characteristics(Continued) The following specifications apply for VCC = VREF = +5 VDC , and fCLK = 1 MHz unless otherwise specified.Boldface limits apply for TA = TJ = TMIN to TMAX ;all other limits TA = TJ = 25˚C. Symbol Parameter Conditions ADC08031, ADC08034 and ADC08038 Units (Limits)Typical(Note Limits(Note 9) DIGITAL AND DC CHARACTERISTICS VOUT(0) Logical “0” Output Voltage V CC = 4.75V 0.4 V (max) IOUT = 1.6 mA IOUT TRI-STATE ® Output Current V OUT = 0V −3.0 µA (max) VOUT = 5V 3.0 µA (max) ISOURCE Output Source Current V OUT = 0V −6.5 mA (min) ISINK Output Sink Current V OUT = VCC 8.0 mA (min) ICC Supply Current ADC08031, ADC08034, and ADC08038 CS = HIGH 3.0 mA (max) REFERENCE CHARACTERISTICS VREF OUT Nominal Reference Output V REF OUT Option Available Only on 2.6 V ADC08034 and ADC08038 The following specifications apply for VCC = VREF = +5 VDC , and tr = tf = 20 ns unless otherwise specified.Boldface limits apply for TA = TJ = TMIN to TMAX ;all other limits TA = TJ = 25˚C. Symbol Parameter Conditions Typical Limits Units (Note 8) (Note 9) (Limits) fCLK Clock Frequency 10 kHz (min)
1 MHz (max)
Clock Duty Cycle 40 % (min) (Note 13) 60 % (max) TC Conversion Time (Not Including f CLK = 1 MHz 8 1/fCLK (max) MUX Addressing Time) 8 µs (max) tCA Acquisition Time 1⁄2 1/fCLK (max) tSELECT CLK High while CS is High 50 ns tSET-UP CS Falling Edge or Data Input 25 ns (min) Valid to CLK Rising Edge tHOLD Data Input Valid after CLK 20 ns (min) Rising Edge tpd1,tpd0 CLK Falling Edge to Output C L = 100 pF: Data Valid (Note 14) Data MSB First 250 ns (max) Data LSB First 200 ns (max) t1H ,t0H TRI-STATE Delay from Rising Edge C L = 10 pF, RL = 10 kΩ 50 ns of CS to Data Output and SARS Hi-Z (see TRI-STATE Test Circuits) C L = 100 pF, RL = 2k Ω 180 ns (max) C IN Capacitance of Logic Inputs 5 pF C OUT Capacitance of Logic Outputs 5 pF Note 1:Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Note 2:Operating Ratings indicate conditions for which the device is functional. These ratings do not guarantee specific performance limits. For guaranteed speci- fications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance character- istics may degrade when the device is not operated under the listed test conditions. Note 3:All voltages are measured with respect to AGND= DGND = 0V DC , unless otherwise specified. www.national.com 4
Electrical Characteristics(Continued) Note 4:When the input voltage VIN at any pin exceeds the power supplies (VIN < (AGND or DGND) or VIN > VCC ) the current at that pin should be limited to 5 mA. The 20 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 5 mA to four pins. Note 5:The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX ,θJA and the ambient temperature, TA. The maximum allowable power dissipation at any temperature is PD = (TJMAX −T A)/θJA or the number given in the Absolute Maximum Ratings, whichever is lower. For devices with suffixes CIN and CIWM TJMAX = 125˚C. The typical thermal resistances (θJA) of these parts when board mounted follow: ADC08031CIN 120˚C/W, ADC08031CIWM 140˚C/W, ADC08034 CIWM 140˚C/W, ADC08038CIWM suffixes 91˚C/W. Note 6:Human body model, 100 pF capacitor discharged through a 1.5 kΩ resistor. Note 7:See AN450 “Surface Mounting Methods and Their Effect on Product Reliability” or Linear Data Book section “Surface Mount” for other methods of soldering surface mount devices. Note 8:Typicals are at TJ = 25˚C and represent the most likely parametric norm. Note 9:Guaranteed to National’s AOQL (Average Outgoing Quality Level). Note 10:Total unadjusted error includes offset, full-scale, linearity, multiplexer. Note 11:For VIN(−)≥ VIN(+)the digital code will be 0000 0000. Two on-chip diodes are tied to each analog input (see Block Diagram) which will forward-conduct for analog input voltages one diode drop below ground or one diode drop greater than VCC supply. During testing at low VCC levels (e.g., 4.5V), high level analog inputs (e.g., 5V) can cause an input diode to conduct, especially at elevated temperatures, which will cause errors for analog inputs near full-scale. The spec allows 50 mV forward bias of either diode; this means that as long as the analog VIN does not exceed the supply voltage by more than 50 mV, the output code will be correct. Ex- ceeding this range on an unselected channel will corrupt the reading of a selected channel. Achievement of an absolute 0 VDC t o5VDC input voltage range will there- fore require a minimum supply voltage of 4.950 VDC over temperature variations, initial tolerance and loading. Note 12:Channel leakage current is measured after a single-ended channel is selected and the clock is turned off. For off channel leakage current the following two cases are considered: one, with the selected channel tied high (5 VDC ) and the remaining seven off channels tied low (0 VDC ), total current flow through the off chan- nels is measured; two, with the selected channel tied low and the off channels tied high, total current flow through the off channels is again measured.The two cases considered for determining on channel leakage current are the same except total current flow through the selected channel is measured. Note 13:A4 0% to 60% duty cycle range insures proper operation at all clock frequencies. In the case that an available clock has a duty cycle outside of these limits the minimum time the clock is high or low must be at least 450 ns. The maximum time the clock can be high or low is 100 µs. Note 14:Since data, MSB first, is the output of the comparator used in the successive approximation loop, an additional delay is built in (see Block Diagram) toallow for comparator response time. Typical Performance Characteristics Linearity Error vs Reference Voltage DS010555-32 Linearity Error vs Temperature DS010555-33 Linearity Error vs Clock Frequency DS010555-34 Power Supply Current vs Temperature DS010555-35 Output Current vs Temperature DS010555-36 Power Supply Current vs Clock Frequency DS010555-37 www.national.com5
Leakage Current Test Circuit TRI-STATE Test Circuits and Waveforms Timing Diagrams DS010555-7 t1H DS010555-38 DS010555-39 t0H DS010555-40 DS010555-41 Data Input Timing DS010555-10 *To reset these devices, CLK and CS must be simultaneously high for a period of tSELECT or greater. Otherwise these devices are compatible with industry standards ADC0831/2/4/8. www.national.com 6
Timing Diagrams (Continued) Data Output Timing DS010555-11 ADC08031 Start Conversion Timing DS010555-12 ADC08031 Timing DS010555-13 *LSB first output not available on ADC08031. LSB information is maintained for remainder of clock periods until CS goes high. www.national.com7
Timing Diagrams (Continued) ADC08034 Timing DS010555-15 www.national.com 8
Timing Diagrams (Continued)ADC08038 Timing DS010555-16 *Make sure clock edge#18 clocks in the LSB before SE is taken low www.national.com9
ADC08038 Functional Block Diagram Functional Description
1.0 MULTIPLEXER ADDRESSING
The design of these converters utilizes a comparator struc- ture with built-in sample-and-hold which provides for a differ- ential analog input to be converted by a successive- approximation routine. The actual voltage converted is always the difference be- tween an assigned “+” input terminal and a “−” input terminal. The polarity of each input terminal of the pair indicates which line the converter expects to be the most positive. If the as- signed “+” input voltage is less than the “−” input voltage the converter responds with an all zeros output code. A unique input multiplexing scheme has been utilized to pro- vide multiple analog channels with software-configurable single-ended, differential, or pseudo-differential (which will convert the difference between the voltage at any analog in- put and a common terminal) operation. The analog signal conditioning required in transducer-based data acquisition systems is significantly simplified with this type of input flex- ibility. One converter package can now handle ground refer- enced inputs and true differential inputs as well as signals with some arbitrary reference voltage. A particular input configuration is assigned during the MUX addressing sequence, prior to the start of a conversion. The MUX address selects which of the analog inputs are to be DS010555-17 *Some of these functions/pins are not available with other options. For the ADC08034, the “SEL 1” Flip-Flop is bypassed. www.national.com 10
enabled and whether this input is single-ended or differential. Differential inputs are restricted to adjacent channel pairs. the various product options. The MUX address is shifted into the converter via the DI line. TABLE 1. Multiplexer/Package Options TABLE 2. MUX Addressing: ADC08038 TABLE 3. MUX Addressing: ADC08038
TABLE 4. MUX Addressing: ADC08034 differential channel for another conversion. trates the input flexibility which can be achieved. out degrading conversion accuracy.
2.0 THE DIGITAL INTERFACE
separate timing diagram is shown for each device.
- A conversion is initiated by pulling the CS (chip select)
- On each rising edge of the clock the status of the data in
(DI) line is clocked into the MUX address shift register.
- When the start bit has been shifted into the start location
inserted to allow the selected MUX channel to settle.
- The data out (DO) line now comes out of TRI-STATE
- During the conversion the output of the SAR comparator
read by the processor immediately.
- After 8 clock periods the conversion is completed. The
- The stored data in the successive approximation register
- All internal registers are cleared when the CS line is high
through a bidirectional processor I/O bit with one wire. still in a high impedance state.
3.0 REFERENCE CONSIDERATIONS
cessive approximation conversion. for a given input condition. biased with a time and temperature stable voltage source.
8 Single-Ended
8 Pseudo-Differential
4 Differential
FIGURE 1. Analog Input Multiplexer Options for the ADC08038
4.0 THE ANALOG INPUTS
racy which otherwise is most susceptible to noise pickup. riding on a large common-mode voltage. and fCLK is the A/D clock frequency. as it exceeds the maximum analog input limits. impedance signal source be required.
5.0 OPTIONAL ADJUSTMENTS
5.1 Zero Error
the differential mode operation of the A/D.
5.2 Full Scale
5.3 Adjusting for an Arbitrary Analog Input
FIGURE 2. Reference Examples
Functional Description(Continued) where: VMAX = the high end of the analog input range and VMIN = the low end (the offset zero) of the analog range. (Both are ground referenced.) The V REF IN (or VCC ) voltage is then adjusted to provide a code change from FEHEX to FFHEX . This completes the ad- justment procedure.
Applications
A “Stand-Alone” Hook-Up for ADC08038 Evaluation DS010555-44 *Pinouts shown for ADC08038. For all other products tie to pin functions as shown. www.national.com15
Applications(Continued) Low-Cost Remote Temperature Sensor DS010555-45 Digitizing a Current Flow DS010555-22 www.national.com 16
Applications(Continued) Operating with Ratiometric Transducers DS010555-23 *VIN(−)= 0.15 VCC 15% of VCC ≤ VXDR ≤ 85% of VCC Span Adjust; 0V≤ VIN ≤ 3V DS010555-46 www.national.com17
Applications(Continued) Zero-Shift and Span Adjust: 2V≤ VIN ≤ 5V DS010555-47 Protecting the Input DS010555-25 Diodes are 1N914 High Accuracy Comparators DS010555-26 DO = all 1s if +VIN > −VIN DO = all 0s if +VIN < −VIN www.national.com 18
Applications(Continued) Digital Load Cell DS010555-27
- Uses one more wire than load cell itself
- Two mini-DIPs could be mounted inside load cell for digital output transducer
- Electronic offset and gain trims relax mechanical specs for gauge factor and offset
- Low level cell output is converted immediately for high noise immunity www.national.com19
Applications(Continued) 4 mA-20 mA Current Loop Converter DS010555-28
- All power supplied by loop
- 1500V isolation at output www.national.com 20
Applications(Continued) Isolated Data Converter DS010555-29
- No power required remotely
- 1500V isolation www.national.com21
Physical Dimensionsinches (millimeters) unless otherwise noted Order Number ADC08031CIWM or ADC08034CIWM www.national.com 22
Physical Dimensionsinches (millimeters) unless otherwise noted (Continued) Order Number ADC08038CIWM Order Number ADC08031CIN www.national.com23
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Corporation Americas Tel: 1-800-272-9959 Fax: 1-800-737-7018 Email: support@nsc.com National Semiconductor Europe Fax: +49 (0) 1 80-530 85 86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 1 80-530 85 85 English Tel: +49 (0) 1 80-532 78 32 Français Tel: +49 (0) 1 80-532 93 58 Italiano Tel: +49 (0) 1 80-534 16 80 National Semiconductor Asia Pacific Customer Response Group Tel: 65-2544466 Fax: 65-2504466 Email: sea.support@nsc.com National Semiconductor Japan Ltd. Tel: 81-3-5639-7560 Fax: 81-3-5639-7507 www.national.com ADC08031/ADC08034/ADC08038 8-Bit High-Speed Serial I/O A/D Converters with Multiplexer Options, Voltage Reference, and Track/Hold Function National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.