ADC0801S040 NXP | Alldatasheet

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Technical content

  1. General description The ADC0801S040 is an 8-bit universal analog-to-digital converter (ADC) for video and general purpose applications. It converts the analog input signal from 2.7 V to 5.5 V into 8-bit binary-coded digital words at a maximum sampling rate of 40 MHz. All digital inputs and outputs are CMOS/Transistor-Transistor Logic (TTL) compatible. A sleep mode allows reduction of the device power consumption to 4 mW. 2. Features n 8-bit resolution n Operation between 2.7 V and 5.5 V n Sampling rate up to 40 MHz n DC sampling allowed n High signal-to-noise ratio over a large analog input frequency range (7.3 effective bits at 4.43 MHz full-scale input at fclk = 40 MHz) n CMOS/TTL compatible digital inputs and outputs n External reference voltage regulator n Power dissipation only 30 mW (typical value) n Low analog input capacitance, no buffer amplifier required n Sleep mode (4 mW) n No sample-and-hold circuit required 3. Applications n Video data digitizing n Camera n Camcorder n Radio communication n Car alarm system ADC0801S040 Single 8 bits ADC, up to 40 MHz Rev. 02 — 18 August 2008 Product data sheet

ADC0801S040_2 © NXP B.V. 2008. All rights reserved. Table 1. Quick reference data Tamb = 25°C unless otherwise specified. Table 2. Ordering information

ADC0801S040_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 18 August 2008 3 of 19 NXP Semiconductors ADC0801S040 Single 8 bits ADC, up to 40 MHz 6. Block diagram Fig 1. Block diagram R lad RB RM RT VI VDDD VDDA CMOS OUTPUTSLATCHES CLOCK DRIVER 014aaa495 CLK SLEEP ADC0801S040

20 VDDO

analog ground digital ground VSSD VSSO output ground analog voltage input data outputs LSB MSB 19 D7 18 D6 17 D5 16 D4 15 D3 14 D2 13 D1 12 D0 ANALOG - TO - DIGITAL CONVERTER

ADC0801S040_2 © NXP B.V. 2008. All rights reserved.

7.1 Pinning

7.2 Pin description

Table 3. Pin description

ADC0801S040_2 © NXP B.V. 2008. All rights reserved. the supply voltageΔVDD remains as indicated. Table 3. Pin description …continued Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Table 5. Thermal characteristics Table 6. Characteristics = 1.84 V; CL = 20 pF; Tamb = 0°C to 70°C; typical values measured at Tamb = 25°C unless otherwise specified.

ADC0801S040_2 © NXP B.V. 2008. All rights reserved. Table 6. Characteristics …continued = 1.84 V; CL = 20 pF; Tamb = 0°C to 70°C; typical values measured at Tamb = 25°C unless otherwise specified.

ADC0801S040_2 © NXP B.V. 2008. All rights reserved. = 1.84 V; CL = 20 pF; Tamb = 0°C to 70°C; typical values measured at Tamb = 25°C unless otherwise specified.

ADC0801S040_2 © NXP B.V. 2008. All rights reserved. resistor ladder are connected to pins RB and RT via offset resistors ROB and ROT as shown inFigure3. parallel and fed with the same reference source, the matching between each of them is optimized. than 2 LSB, nor any significant attenuation is observed in the reconstructed signal. wave signal) in order to sample the signal and obtain correct output data. signal-to-noise ratio: S/N = ENOB× 6.02 + 1.76 dB. [7] Measurement carried out using video analyzer VM700A, where video analog signal is reconstructed through a DAC. = 1.84 V; CL = 20 pF; Tamb = 0°C to 70°C; typical values measured at Tamb = 25°C unless otherwise specified.

ADC0801S040_2 © NXP B.V. 2008. All rights reserved.

  1. Additional information relating toTable6

Table 7. Output coding and input voltage (typical values; referenced to VSSA ) Table 8. Mode selection

ADC0801S040_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 18 August 2008 10 of 19 NXP Semiconductors ADC0801S040 Single 8 bits ADC, up to 40 MHz Fig 4. Timing diagram sample N + 1sample N CLK 014aaa508 sample N + 2 sample N + 1sample N sample N + 2 50 % VI DATA D0 to D7 VDDO 0 V 50 %DATA N + 1 DATA N DATA N - 1 DATA N - 2 td(o) tw(clk)H tw(clk)L td(s) th(o)

ADC0801S040_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 18 August 2008 11 of 19 NXP Semiconductors ADC0801S040 Single 8 bits ADC, up to 40 MHz frequency on pin SLEEP = 100 kHz. Fig 5. Timing diagram and test conditions of 3-state output delay time LOW HIGH HIGH LOW ADC0801S040 VDDD VDDD SLEEP SLEEP output data output data 10 % 50 % 50 % 90 % 50 % tdLZ tdZL tdHZ tdZH 20 pF 3.3 kW S1TEST VDDDtdLZ VDDDtdZL GNDtdZH tdHZ GND 014aaa496 Fig 6. Typical Integral Non-Linearity (INL) performance 014aaa501 -0.047 0.065 -0.160 0.178 0.291 A (LSB) -0.272 codes 0 27220468 136

ADC0801S040_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 18 August 2008 12 of 19 NXP Semiconductors ADC0801S040 Single 8 bits ADC, up to 40 MHz Fig 7. Typical Differential Non-Linearity (DNL) performance 014aaa502 -0.025 0.032 -0.84 0.091 0.150 A (LSB) -0.143 codes 0 27220468 136 Fig 8. Analog input settling-time diagram 014aaa497 code 255 code 0 50 % 50 %CLK VI ts(LH) ts(HL) 50 % 50 % 5 ns 5 ns 2 ns 2 ns

ADC0801S040_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 18 August 2008 13 of 19 NXP Semiconductors ADC0801S040 Single 8 bits ADC, up to 40 MHz Effective bits: 7.32; THD =−51.08 dB. Fig 9. Typical fast Fourier transform (fclk = 40 MHz; fi = 4.43 MHz) f (MHz) 0 20.015.05.0 10.0 014aaa503 -80 -40 A (dB) -120 Fig 10. CMOS data outputs Fig 11. VI analog input Fig 12. SLEEP 3-state input Fig 13. RB, RM and RT inputs 014aaa498 VDDO D7 to D0 VSSO VDDA VI VSSA 014aaa505 014aaa499 VDDO VSSO SLEEP VDDA RT RM RB VSSA 014aaa506 R L R L R L R L

ADC0801S040_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 18 August 2008 14 of 19 NXP Semiconductors ADC0801S040 Single 8 bits ADC, up to 40 MHz Fig 14. CLK input VDDD CLK 1/2 VDDD VSSD 014aaa507

ADC0801S040_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 18 August 2008 15 of 19 NXP Semiconductors ADC0801S040 Single 8 bits ADC, up to 40 MHz 12. Application information

12.1 Application diagrams

The analog and digital supplies should be separated and decoupled. The external voltage reference generator must be built in such a way that a good supply voltage ripple rejection is achieved with respect to the LSB value. Eventually, the reference ladder voltages can be derived from a well regulated V DDA supply through a resistor bridge and a decoupling capacitor. (1) RB, RM, RT are decoupled to VSSA . Fig 15. Application diagram 100 nF 100 nF 100 nF CLK SLEEP VDDD VSSD VDDA VSSA VSSA VSSA VSSA RB(1) RM(1) VI RT(1) VDDO VSSO 10 11 ADC0801S040 014aaa500

ADC0801S040_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 18 August 2008 16 of 19 NXP Semiconductors ADC0801S040 Single 8 bits ADC, up to 40 MHz 13. Package outline Fig 16. Package outline SOT266-1 (SSOP20) UNIT A 1 A 2 A 3 bp cD (1) E (1) (1)eH E LL p QZ ywv q REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm 0.15 1.4 1.2 0.32 0.20 0.20 0.13 6.6 6.4 4.5 4.3 0.65 1 0.26.6 6.2 0.65 0.45 0.48 0.18 o o0.13 0.1 DIMENSIONS (mm are the original dimensions) Note 1. Plastic or metal protrusions of 0.20 mm maximum per side are not included. 0.75 0.45 SOT266-1 MO-152 99-12-27 03-02-19 w M q A A 1 A 2 bp D H E Lp Q detail X E Z e c L v M A X (A )3 A y 0.25 11 0 20 11 pin 1 index 0 2.5 5 mm scale SSOP20: plastic shrink small outline package; 20 leads; body width 4.4 mm SOT266-1 A max. 1.5

ADC0801S040_2 © NXP B.V. 2008. All rights reserved. Table 9. Revision history

  • Corrections made to table notes inFigure1.
  • Corrections made toTable3.
  • Corrections made to symbol inTable4.
  • Corrections made toTable6.
  • Corrections made toFigure13 ADC0801S040_1 20080612 Product data sheet - -

ADC0801S040_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 18 August 2008 18 of 19 NXP Semiconductors ADC0801S040 Single 8 bits ADC, up to 40 MHz 15. Legal information

15.1 Data sheet status

[1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.

15.2 Definitions

Draft —The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet —A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.

15.3 Disclaimers

General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes —NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use —NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications —Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values —Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale —NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license —Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Quick reference data —The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding.

15.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 16. Contact information For more information, please visit:http://www.nxp.com For sales office addresses, please send an email to:salesaddresses@nxp.com Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.

NXP Semiconductors ADC0801S040 Single 8 bits ADC, up to 40 MHz © NXP B.V. 2008. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 18 August 2008 Document identifier: ADC0801S040_2 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. 17. Contents

11 Additional information relating to

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