AD9901

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REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. a Ultrahigh Speed Phase/Frequency Discriminator AD9901 GENERAL DESCRIPTION The AD9901 is a digital phase/frequency discriminator capable of directly comparing phase/frequency inputs up to 200 MHz. Processing in a high speed trench-oxide isolated process, com- bined with an innovative design, gives the AD9901 a linear detection range, free of indeterminate phase detection zones common to other digital designs. With a single +5 V supply, the AD9901 can be configured to operate with TTL or CMOS logic levels; it can also operate with ECL inputs when operated with a –5.2 V supply. The open-collector outputs allow the output swing to be matched to post-filtering input requirements. A simple current setting resis- tor controls the output stage current range, permitting a reduc- tion in power when operated at lower frequencies.

FEATURES

Phase and Frequency Detection ECL/TTL/CMOS Compatible Linear Transfer Function No “Dead Zone” MIL-STD-883 Compliant Versions Available

APPLICATIONS

Low Phase Noise Reference Loops Fast-Tuning “Agile” IF Loops Secure “Hopping” Communications Coherent Radar Transmitter/Receiver Chains A major feature of the AD9901 is its ability to compare phase/frequency inputs at standard IF frequencies without prescalers. Excessive phase uncertainty which is common with standard PLL configurations is also eliminated. The AD9901 provides the locking speed of traditional phase/frequency dis- criminators, with the phase stability of analog mixers. The AD9901 is available as a commercial temperature range device, 0°C to +70°C, and as a military temperature device, –55°C to +125°C. The commercial versions are packaged in a 14-lead ceramic DIP and a 20-lead PLCC. The AD9901 Phase/Frequency Discriminator is available in versions compliant with MIL-STD-883. Refer to the Analog Devices Military Products Databook or current AD9901/883B data sheet for specifications. FUNCTIONAL BLOCK DIAGRAM OSCILLATOR INPUT FLIP-FLOP DQ Q REFERENCE INPUT FLIP-FLOP DQ Q XOR OUTPUT OUTPUTREFERENCE INPUT OSCILLATOR INPUT OSCILLATOR FREQUENCY DISCRIMINATOR FLIP-FLOP DQ Q S REFERENCE FREQUENCY DISCRIMINATOR FLIP-FLOP DQ QR PHASE-LOCKED LOOP LOW- PASS FILTER 1/N VCO AD9901 REFERENCE INPUT OSCILLATOR OUTPUT OPTIONAL 1/N PRESCALER TYPICAL OF DIGITAL PLLs Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 1999

REV. B–2– AD9901–SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS 1 I

ELECTRICAL CHARACTERISTICS

Temp Level Min Typ Max Units INPUT CHARACTERISTICS TTL Input Logic “1” Voltage Full VI 2.0 V TTL Input Logic “0” Voltage Full VI 0.8 V TTL Input Logic “1” Current 3 Full VI 0.6 mA TTL Input Logic “0” Current3 Full VI 1.6 mA ECL Differential Switching Voltage Full VI 300 mV ECL Input Current Full VI 20 mA OUTPUT CHARACTERISTICS Peak-to-Peak Output Voltage Swing 4 Full VI 1.6 1.8 2.0 V TTL Output Compliance Range Full V 3–7 V ECL Output Compliance Range Full V – 2V I OUT Range Full V 0.9–11 mA Internal Reference Voltage Full VI 0.42 0.47 0.52 V AC CHARACTERISTICS Linear Phase Detection Range 4 40 kHz +25 °C V 360 Degrees

30 MHz +25 °C V 320 Degrees

70 MHz +25 °C V 270 Degrees

Functionality @ 70 MHz +25 °C I Pass/Fail POWER SUPPLY CHARACTERISTICS TTL Supply Current (+5.0 V) 5, 6 +25°C I 43.5 54.0 mA Full I 43.5 54.0 mA ECL Supply Current (–5.2 V) 5, 6 +25°C I 42.5 52.5 mA Full I 42.5 52.5 mA Nominal Power Dissipation +25 °C V 218 mW NOTES 1Absolute maximum ratings are limiting values, to be applied individually, and beyond which the service ability of the circuit m ay be impaired. Functional operability is not necessarily implied. Exposure to absolute maximum rating conditions for an extended period of time may affect device rel iability. 2Maximum junction temperature should not exceed +175 °C for ceramic packages, +150 °C for plastic packages. Junction temperature can be calculated by: tJ = PD (qJA) +tA = PD (qJC) +tC where: PD = power dissipation q JA = thermal impedance from junction to air ( °C/W) qJC = thermal impedance from junction to case ( °C/W) tA = ambient temperature ( °C) tC = case temperature ( °C) typical thermal impedances: AD9901 Ceramic DIP = qJA = 74°C/W; qJC = 21°C/W AD9901 LCC = qJA = 80°C/W; qJC = 19°C/W AD9901 PLCC = qJA = 88.2°C/W; qJC = 45.2°C/W 4RSET = 47.5 W ; RL = 182 W . 5lncludes load current of 10 mA (load resistors = 182 W ). 6Supply should remain stable within – 5% for normal operation. Specifications subject to change without notice. Operating Temperature Range Junction Temperature2 (6VS = +5.0 V [for TTL] or –5.2 V [for ECL], unless otherwise noted)

REV. B –3– INPUT/OUTPUT EQUIVALENT CIRCUITS (Based on DIP Pinouts) TTL Input ECL Input Output DIE LAYOUT AND MECHANICAL INFORMATION REFERENCE IN (–V S)+ V S (GND) OUTPUT R SET GND (–V S) +VS (GND) OUTPUTVCO IN (–VS)GND (VCO IN) GND (VCO IN) VS (–VS) GND (–V S) GND (REFERENCE IN) GND (REFERENCE IN ) S ORDERING GUIDE Temperature Package Package Model Ranges Descriptions Options AD9901KQ 0 °C to +70°C 14-Lead Cerdip Q-14 AD9901KP 0 °C to +70°C 20-Lead Plastic Leaded Chip Carrier P-20A AD9901TQ/883 1 –55°C to +125°C 14-Lead Cerdip Q-14 AD9901TE/8831 –55°C to +125°C 20-Terminal Ceramic Leadless Chip Carrier E-20A NOTE 1For specifications, refer to Analog Devices Military Products Databook. AD9901 BURN-IN CIRCUIT (Based on DIP ECL Pinouts) REG VMID 1kV 180V DA3 DA2 VMID 1kV 180V 50V 0.01mF –VS (–5.2V) AD9901 ECL HIGH ECL LOW DA2 ECL HIGH ECL LOW DA3 ALL RESISTORS 65% ALL CAPACITORS 620% ALL SUPPLY VOLTAGES 65% VMID = –1.3V 65% STATIC: DA2 = ECL HIGH; DA3 = ECL LOW DYNAMIC: ECL HIGH +5.0V VCO/REF, INPUT 4/13 –5.2V VCO/REF, INPUT VCO/REF, INPUT 0.47V REFERENCE TTL MODE = GROUND ECL MODE = V S (–5.2V) R SET TTL MODE = +V S (+5.0V) ECL MODE = GROUND

REV. B –5– EXPLANATION OF TEST LEVELS Test Level I – 100% production tested. II – 100% production tested at +25 °C, and sample tested at specified temperatures. III – Sample tested only. IV – Parameter is guaranteed by design and characteriza- tion testing. V – Parameter is a typical value only. VI – All devices are 100% production tested at +25 °C. 100% production tested at temperature extremes for extended temperature devices; sample tested at temperature ex- tremes for commercial/industrial devices. TTL DIP Pinouts TOP VIEW (Not to Scale) GROUND BIAS GROUND GROUND VCO INPUT OUTPUT +VS GROUND GROUND REFERENCE INPUT S OUTPUT R SET GROUND AD9901 TTL LCC Pinouts TOP VIEW (Not to Scale) 20 19123 91 0 1 1 1 2 1 3 NC = NO CONNECT GROUND REFERENCE INPUT BIASOUTPUT AD9901 GROUND NC GROUND GROUND S NC GROUND R SET NC NC GROUND +VS NC NC VCO INPUT OUTPUT TTL PLCC Pinouts 3 2 1 20 19 9 10 11 12 13 TOP VIEW (Not to Scale) PIN 1 IDENTIFIER NC = NO CONNECT GROUND REFERENCE INPUT AD9901 BIASNC GROUND NC VCO INPUT +V S OUTPUT NC NC OUTPUT GROUND GROUND NCNC GROUND +VS GROUNDR SET PIN CONFIGURATIONS ECL DIP Pinouts TOP VIEW (Not to Scale) –VS BIAS VCO INPUT VCO INPUT –VS OUTPUT GROUND REFERENCE INPUT REFERENCE INPUT –VS GROUND OUTPUT R SET –VS AD9901 ECL LCC Pinouts TOP VIEW (Not to Scale) 20 19123 91 0 1 1 1 2 1 3 NC = NO CONNECT VCO INPUT –VS BIASOUTPUT AD9901 –VS NC REFERENCE INPUT REFERENCE INPUT GROUND NC –VS R SET NC NC VCO INPUT GROUND NC NC –VS OUTPUT ECL PLCC Pinouts 3 2 1 20 19 9 10 11 12 13 TOP VIEW (Not to Scale) PIN 1 IDENTIFIER NC = NO CONNECT VCO INPUT –VS AD9901 BIASNC VCO INPUT NC –VS GROUND OUTPUT NC NC OUTPUT –VSGROUND NCNC REFERENCE INPUT–VS REFERENCE INPUTR SET

C1272b–0–1/99PRINTED IN U.S.A. Figure 12. Phased-Locked Loop Using AD9901 Dimensions shown in inches and (mm).