AD9708-EB

AD9708 AD | Alldatasheet

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REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. a AD9708* Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 1999 8-Bit, 100 MSPS+ TxDAC® D/A Converter FUNCTIONAL BLOCK DIAGRAM +1.20V REF REFLO REF IO FS ADJ 50pF COMP1 0.1mF CURRENT SOURCE ARRAY +5V AVDD SEGMENTED SWITCHES LATCHES DIGITAL DATA INPUTS (DB7–DB0) DVDD DCOM CLOCK SLEEP IOUTA IOUTB COMP2 ACOM 0.1mF +5V R SET CLOCK 0.1mF AD9708

FEATURES

Member of Pin-Compatible TxDAC Product Family

125 MSPS Update Rate

Linearity: 1/4 LSB DNL Linearity: 1/4 LSB INL Differential Current Outputs SINAD @ 5 MHz Output: 50 dB Power Dissipation: 175 mW @ 5 V to 45 mW @ 3 V Power-Down Mode: 20 mW @ 5 V On-Chip 1.20 V Reference Single +5 V or +3 V Supply Operation Packages: 28-Lead SOIC and 28-Lead TSSOP Edge-Triggered Latches Fast Settling: 35 ns Full-Scale Settling to 0.1%

APPLICATIONS

The AD9708 is the 8-bit resolution member of the TxDAC series of high performance, low power CMOS digital-to-analog converters (DACs). The TxDAC family, which consists of pin compatible 8-, 10-, 12-, and 14-bit DACs, was specifically opti- mized for the transmit signal path of communication systems. All of the devices share the same interface options, small outline package and pinout, thus providing an upward or downward component selection path based on performance, resolution and cost. The AD9708 offers exceptional ac and dc performance while supporting update rates up to 125 MSPS. The AD9708’s flexible single-supply operating range of +2.7 V to +5.5 V and low power dissipation are well suited for portable and low power applications. Its power dissipation can be further reduced to 45 mW, without a significant degradation in performance, by lowering the full-scale current output. In addi- tion, a power-down mode reduces the standby power dissipa- tion to approximately 20 mW. The AD9708 is manufactured on an advanced CMOS process. A segmented current source architecture is combined with a proprietary switching technique to reduce spurious components and enhance dynamic performance. Edge-triggered input latches and a temperature compensated bandgap reference have been inte- grated to provide a complete monolithic DAC solution. Flexible supply options support +3 V and +5 V CMOS logic families. The AD9708 is a current-output DAC with a nominal full-scale output current of 20 mA and > 100 k W output impedance. TxDAC is a registered trademark of Analog Devices, Inc. *Patent pending. Differential current outputs are provided to support single- ended or differential applications. The current outputs may be directly tied to an output resistor to provide two complemen- tary, single-ended voltage outputs. The output voltage compliance range is 1.25 V. The AD9708 contains a 1.2 V on-chip reference and reference control amplifier, which allows the full-scale output current to be simply set by a single resistor. The AD9708 can be driven by a variety of external reference voltages. The AD9708’s full-scale current can be adjusted over a 2 mA to 20 mA range without any degradation in dynamic performance. Thus, the AD9708 may operate at reduced power levels or be adjusted over a 20 dB range to provide additional gain ranging capabilities. The AD9708 is available in 28-lead SOIC and 28-lead TSSOP packages. It is specified for operation over the industrial tem- perature range. PRODUCT HIGHLIGHTS 1. The AD9708 is a member of the TxDAC product family, which provides an upward or downward component selection path based on resolution (8 to 14 bits), performance and cost. 2. Manufactured on a CMOS process, the AD9708 uses a pro- prietary switching technique that enhances dynamic perfor- mance well beyond 8- and 10-bit video DACs. 3. On-chip, edge-triggered input CMOS latches readily interface to +3 V and +5 V CMOS logic families. The AD9708 can support update rates up to 125 MSPS. 4. A flexible single-supply operating range of +2.7 V to +5.5 V and a wide full-scale current adjustment span of 2 mA to 20 mA allows the AD9708 to operate at reduced power levels (i.e., 45 mW) without any degradation in dynamic performance. 5. A temperature compensated, 1.20 V bandgap reference is included on-chip providing a complete DAC solution. An external reference may be used. 6. The current output(s) of the AD9708 can easily be config- ured for various single-ended or differential applications.

Parameter Min Typ Max Units RESOLUTION 8 Bits MONOTONICITY GUARANTEED OVER SPECIFIED TEMPERATURE RANGE DC ACCURACY1 Integral Linearity Error (INL) –1/2 – 1/4 +1/2 LSB Differential Nonlinearity (DNL) –1/2 – 1/4 +1/2 LSB ANALOG OUTPUT Offset Error –0.025 +0.025 % of FSR Gain Error (Without Internal Reference) –10 – 2 +10 % of FSR Gain Error (With Internal Reference) –10 – 1 +10 % of FSR Full-Scale Output Current 2 2.0 20.0 mA Output Compliance Range –1.0 1.25 V Output Resistance 100 k W Output Capacitance 5 pF REFERENCE OUTPUT Reference Voltage 1.08 1.20 1.32 V Reference Output Current 3 100 nA REFERENCE INPUT Input Compliance Range 0.1 1.25 V Reference Input Resistance 1 M W Small Signal Bandwidth (w/o C COMP1)4 1.4 MHz TEMPERATURE COEFFICIENTS Offset Drift 0 ppm of FSR/ °C Gain Drift (Without Internal Reference) – 50 ppm of FSR/ °C Gain Drift (With Internal Reference) – 100 ppm of FSR/ °C Reference Voltage Drift – 50 ppm/ °C POWER SUPPLY Supply Voltages AVDD5 2.7 5.0 5.5 V DVDD 2.7 5.0 5.5 V Analog Supply Current (I AVDD)2 5 3 0 m A Digital Supply Current (I DVDD)6 36 m A Supply Current Sleep Mode (I AVDD) 8.5 mA Power Dissipation6 (5 V, IOUTFS = 20 mA) 140 175 mW Power Dissipation7 (5 V, IOUTFS = 20 mA) 190 mW Power Dissipation7 (3 V, IOUTFS = 2 mA) 45 mW Power Supply Rejection Ratio—AVDD –0.4 +0.4 % of FSR/V Power Supply Rejection Ratio—DVDD –0.025 +0.025 % of FSR/V OPERATING RANGE –40 +85 °C NOTES 1Measured at IOUTA, driving a virtual ground. 2Nominal full-scale current, I OUTFS, is 32 · the I REF current. 3Use an external buffer amplifier to drive any external load. 4Reference bandwidth is a function of external cap at COMP1 pin. 5For operation below 3 V, it is recommended that the output current be reduced to 12 mA or less to maintain optimum performance. 6Measured at f CLOCK = 50 MSPS and f OUT = 1.0 MHz. 7Measured as unbuffered voltage output into 50 W RLOAD at IOUTA and IOUTB, f CLOCK = 100 MSPS and f OUT = 40 MHz. Specifications subject to change without notice. (TMIN to TMAX , AVDD = +5 V, DVDD = +5 V, I OUTFS = 20 mA, unless otherwise noted) –2– REV. B AD9708–SPECIFICATIONS

1Measured single ended into 50 W load. Specifications subject to change without notice. Specifications subject to change without notice. Figure 1. Timing Diagram

–4– REV. B ABSOLUTE MAXIMUM RATINGS* With Parameter Respect to Min Max Units AVDD ACOM –0.3 +6.5 V DVDD DCOM –0.3 +6.5 V ACOM DCOM –0.3 +0.3 V AVDD DVDD –6.5 +6.5 V CLOCK, SLEEP DCOM –0.3 DVDD + 0.3 V Digital Inputs DCOM –0.3 DVDD + 0.3 V IOUTA, IOUTB ACOM –1.0 AVDD + 0.3 V COMP1, COMP2 ACOM –0.3 AVDD + 0.3 V REFIO, FSADJ ACOM –0.3 AVDD + 0.3 V REFLO ACOM –0.3 +0.3 V Junction Temperature +150 °C Storage Temperature –65 +150 °C Lead Temperature (10 sec) +300 °C *Stresses above those listed under Absolute Maximum Ratings may cause perma- nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum ratings for extended periods may effect device reliability. THERMAL CHARACTERISTICS Thermal Resistance 28-Lead 300 mil SOIC qJA = 71.4°C/W qJC = 23°C/W 28-Lead TSSOP qJA = 97.9°C/W qJC = 14.0°C/W PIN CONFIGURATION TOP VIEW (Not to Scale) AD9708 NC = NO CONNECT (MSB) DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 NC NC NC NC NC NC CLOCK DVDD DCOM NC AVDD COMP2 IOUTA IOUTB ACOM COMP1 FS ADJ REFIO REFLO SLEEP CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD9708 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. PIN FUNCTION DESCRIPTIONS Pin No. Name Description 1 DB7 Most Significant Data Bit (MSB). 2–7 DB6–DB1 Data Bits 1–6. 8 DB0 Least Significant Data Bit (LSB). 9–14, 25 NC No Internal Connection. 15 SLEEP Power-Down Control Input. Active High. Contains active pull-down circuit, thus may be left unterminated if not used. 16 REFLO R eference Ground when Internal 1.2 V Reference Used. Connect to AVDD to disable internal reference. 17 REFIO Reference Input/Output. Serves as reference input when internal reference disabled (i.e., Tie REFLO to AVDD). Serves as 1.2 V reference output when internal reference activated (i.e., Tie REFLO to ACOM). Requires 0.1 mF capacitor to ACOM when internal reference activated. 18 FS ADJ Full-Scale Current Output Adjust. 19 COMP1 Bandwidth/Noise Reduction Node. Add 0.1 mF to AVDD for optimum performance. 20 ACOM Analog Common. 21 IOUTB Complementary DAC Current Output. Full-scale current when all data bits are 0s. 22 IOUTA DAC Current Output. Full-scale current when all data bits are 1s.

23 COMP2 Internal Bias Node for Switch Driver

Circuitry. Decouple to ACOM with 0.1 mF capacitor. 24 AVDD Analog Supply Voltage (+2.7 V to +5.5 V). 26 DCOM Digital Common. 27 DVDD Digital Supply Voltage (+2.7 V to +5.5 V). 28 CLOCK Clock Input. Data latched on positive edge of clock. ORDERING GUIDE Temperature Package Package Model Range Descriptions Options* AD9708AR –40 °C to +85°C 28-Lead 300 Mil SOIC R-28 AD9708ARU –40 °C to +85°C 28-Lead TSSOP RU-28 AD9708-EB Evaluation Board *R = Small Outline IC; RU = Thin Small Outline IC. WARNING! ESD SENSITIVE DEVICE

straight line drawn from zero to full scale. to full scale, associated with a 1 LSB change in digital input code. remains constant as the digital input increases. when all inputs are set to 1s. to 1s minus the output when all inputs are set to 0s. reported in ppm per degree C. start of the output transition. specified as the net area of the glitch in pV-s. signal and the peak spurious signal over the specified bandwidth. value for S/N+D is expressed in decibels. Figure 2. Basic AC Characterization Test Setup

16 PINDIP

Figure 26. Evaluation Board Schematic

–16– C2979b–1–4/99PRINTED IN U.S.A. OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 28-Lead, 300 Mil SOIC (R-28) 0.0125 (0.32) 0.0091 (0.23) 0.0291 (0.74) 0.0098 (0.25)3 458 0.0500 (1.27) 0.0157 (0.40) 28 15 141 0.7125 (18.10) 0.6969 (17.70) 0.4193 (10.65) 0.3937 (10.00) 0.2992 (7.60) 0.2914 (7.40)PIN 1 SEATING PLANE 0.0118 (0.30) 0.0040 (0.10) 0.0192 (0.49) 0.0138 (0.35) 0.1043 (2.65) 0.0926 (2.35) 0.0500 (1.27) BSC 28-Lead TSSOP (RU-28) 28 15 141 0.386 (9.80) 0.378 (9.60) 0.256 (6.50) 0.246 (6.25) 0.177 (4.50) 0.169 (4.30) PIN 1 SEATING PLANE 0.006 (0.15) 0.002 (0.05) 0.0118 (0.30) 0.0075 (0.19) 0.0256 (0.65) BSC 0.0433 (1.10) MAX 0.0079 (0.20) 0.0035 (0.090) 0.028 (0.70) 0.020 (0.50) AD9708 REV. B