AD9624

AD9624_15 AD | Alldatasheet

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Technical content

REV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. a AD9624* Tel: 617/329-4700 Fax: 617/326-8703 CONNECTION DIAGRAM 5AD9624 NC # –INPUT +INPUT –VS NC # +V S OUTPUT NC # OPTIONALCAPACITOR CB CONNECTED HERE DECREASES SETTLING TIME (SEE TEXT).

FEATURES

300 MHz Small Signal Bandwidth

200 MHz Large Signal BW (4 V p-p)

High Slew Rate: 2200 V/ ms Low Distortion: –60 dB @ 20 MHz Fast Settling: 15 ns to 0.01% 2.2 nV/ √Hz Spectral Noise Density

63 V Supply Operation

APPLICATIONS

Baseband and Video Communications Active Filters/lntegrators/Log Amps Wideband Voltage Feedback Amplifier Parameter AD9621 AD9622 AD9623 AD9624 Units Minimum Stable Gain +1 +2 +4 +6 V/V Harmonic Distortion (20 MHz) –52 –66 –64 –66 dB Large Signal Bandwidth (4 V p-p) 130 160 190 200 MHz SSBW (0.5 V p-p) 350 220 270 300 MHz Slew Rate 1200 1500 2100 2200 V/ µs Settling Time (to 0.1%/0.01%) 7/11 8/14 8/14 8/14 ns Input Noise (0.1 MHz – 200 MHz) 80 49 36 32 µV rms GENERAL DESCRIPTION The AD9624 is one of a family of very high speed and wide bandwidth amplifiers utilizing a voltage feedback architecture. These amplifiers define a new level of performance for voltage feedback amplifiers, especially in the categories of large signal bandwidth, slew rate, settling, low distortion, and low noise. Proprietary design architectures have resulted in an amplifier family that combines the most attractive attributes of both cur- rent feedback and voltage feedback amplifiers. The AD9624 exhibits extraordinarily accurate and fast pulse response charac- teristics (8 ns settling to 0.1%) as well as extremely wide small and large signal bandwidth previously found only in current feedback amplifiers. When combined with balanced high imped- ance inputs and low input noise current more common to volt- age feedback architectures, the AD9624 offers performance not previously available in a monolithic operational amplifier. *Protected by U.S. Patent 5,150,074 and others pending. Other members of the AD962X amplifier family are the AD9621 (G = +1), AD9622 (G = +2), and the AD9623 (G = +4). A separate data sheet is available from Analog Devices for each model. Each generic device has been designed for a different minimum stable gain setting, allowing users flex- ibility in optimizing system performance. Dynamic performance specifications such as slew rate, settling time, and distortion vary from model to model. The table below summarizes key perfor- mance attributes for the AD962X family and can be used as a selection guide. The AD9624 is offered in industrial and military temperature ranges. Industrial versions are available in plastic DIP, SOIC, and cerdip; MIL versions are packaged in cerdips. PRODUCT HIGHLIGHTS 1. Wide Large Signal Bandwidth 2. High Slew Rate 3. Fast Settling 4. Low Distortion 5. Output Short-Circuit Protected 6. Low Intermodulation Distortion of High Frequencies

AD9624–SPECIFICATIONS DC ELECTRICAL CHARACTERISTICS Test AD9624AN/AQ/AR AD9624SQ Parameter Conditions Temp Level Min Typ Max Min Typ Max Units DC SPECIFICATIONS1 Input Offset Voltage +25 °CI – 8 ± 2+ 8 – 8 ± 2+ 8m V Full VI –10 +10 –10 +10 mV Input Bias Current +25 °CI 7 1 2 7 1 2 µA Full VI 16 16 µA Bias Current TC Full V 35 35 nA/ °C Input Offset Current +25 °CI – 2 ± 0.3 +2 –2 ± 0.3 +2 µA Full VI –3 +3 –3 +3 µA Offset Current TC Full V 2.5 2.5 nA/ °C Input Resistance +25 °C V 500 500 k Ω Input Capacitance +25 °C V 1.2 1.2 pF Common-Mode Range Full VI ± 3.0 ± 3.4 ± 3.0 ± 3.4 V Common-Mode Rejection Ratio ΔVCM = 1 V +25 °C I 52 63 52 63 dB Open-Loop Gain V OUT = ± 2 V p-p +25 °C V 74 74 dB Output Voltage Range Full VI ± 3.0 ± 3.4 ± 3.0 ± 3.4 V Output Current Full II 60 70 60 70 mA Output Resistance +25 °C V 0.3 0.3 Ω FREQUENCY DOMAIN Small Signal Bandwidth AV = 6 V OUT = 0.4 V p-p Full IV 200 300 200 300 MHz AV = 8 V OUT = 0.4 V p-p Full II 130 190 130 190 MHz Large Signal Bandwidth V OUT = 4 V p-p +25 °C V 170 170 MHz Amplitude of Peaking Full Spectrum Full II 0 0.4 0 0.4 dB Amplitude of Peaking (A V = 6) Full Spectrum +25 °C IV 0.2 1.2 0.2 1.2 dB Amplitude of Roll-off DC to 100 MHz Full II 0.6 1.6 0.6 1.6 dB Phase Nonlinearity 0.3 to 100 MHz +25 °C V 0.7 0.7 Degree 2nd Harmonic Distortion 2 V p-p; 20 MHz Full II –60 –52 –60 –52 dBc 3rd Harmonic Distortion 2 V p-p; 20 MHz Full II –72 –64 –72 –64 dBc Common-Mode Rejection Ratio @ 20 MHz +25 °C V +30 +30 dB Spectral Input Noise Voltage 1 to 200 MHz +25 °C V 2.2 2.2 nV/ √Hz Spectral Input Noise Current 1 to 200 MHz +25 °C V 2.5 2.5 pA/ √Hz Average Equivalent Integrated Input Noise Voltage 0.1 to 200 MHz +25 °C V 32 32 µV rms TIME DOMAIN Slew Rate V OUT = 5 V Step Full IV 1400 2000 1400 2000 V/ µs Rise/Fall Time V OUT = 0.5 V Step +25 °C V 1.8 1.8 ns VOUT = 5 V Step Full IV 2.6 3.2 2.6 3.2 ns Overshoot V OUT = 2 V Step Full IV 0 7 0 7 % Settling Time To 0.1% V OUT = 2 V Step +25 °CV 8 8 n s To 0.01% V OUT = 2 V Step Full IV 15 20 15 20 ns To 0.1%2 VOUT = 4 V Step +25 °CV 9 9 n s To 0.01%2 VOUT = 4 V Step +25 °C V 17 17 ns Overdrive Recovery 2 3 to ± 2 mV +25 °C V 130 130 ns Differential Gain (4.3 MHz) R L = 150 Ω +25°C V 0.015 0.015 % Differential Phase (4.3 MHz) R L = 150 Ω +25°C V <0.01 <0.01 Degree POWER SUPPLY REQUIREMENTS 1 Quiescent Current +IS +VS = +5 V Full VI 23 29 23 29 mA –IS –VS = –5 V Full VI 23 29 23 29 mA Power Supply Rejection Ratio ΔVS = 1 V +25 °C I 60 70 60 70 dB NOTES 1Measured at A V = 21. 2Measured with a 0.001 µF CB capacitor connected across Pins 1 and 8. Specifications subject to change without notice. REV. 0–2– (6VS = 65 V, RLOAD = 100 Ω ; AV = +8; RF = 510 V, unless otherwise noted)

REV. 0 –3– ABSOLUTE MAXIMUM RATINGS 1 Operating Temperature Ranges Storage Temperature Junction Temperature NOTES 1Absolute maximum ratings are limiting values to be applied individually, and beyond which the serviceability of the circuit may be impaired. Functional operability is not necessarily implied. Exposure to absolute maximum rating conditions for an extended period of time may affect device reliability. 2Output is short-circuit protected; for maximum reliability, 90 mA continuous current should not be exceeded. 3Typical thermal impedances (part soldered onto board; no air flow): Ceramic DIP: θJA = 100°C/W; θJC = 30°C/W Plastic SOIC: θJA = 125°C/W; θJC = 45°C/W Plastic DIP: θJA = 90°C/W; θJC = 45°C/W 4Temperature shown is for surface mount devices, mounted by vapor phase soldering. Throughhole devices (ceramic and plastic DIPs) can be soldered at +300°C for 10 seconds. ORDERING GUIDE Temperature Package Package Model Range Description Option AD9624AN –40 °C to +85°C 8-Pin Plastic DIP N-8 AD9624AQ –40 °C to +85°C 8-Pin Cerdip Q-8 AD9624AR –40 °C to +85°C 8-Pin SOIC R-8 AD9624SQ –55 °C to +125°C 8-Pin Cerdip Q-8 EXPLANATION OF TEST LEVELS Test Level I – 100% production tested. II – 100% production tested at +25 °C, and sample tested at specified temperatures. AC testing of “A” grade devices done on sample basis. III – Sample tested only. IV – Parameter is guaranteed by design and characterization testing. V – Parameter is a typical value only. VI – All devices are 100% production tested at +25 °C. 100% production tested at temperature extremes for extended temperature devices; sample tested at temperature ex- tremes for commercial/industrial devices. –VS46.5mm – INPUT

46.5 MILS

CB– CB+ –INPUT +INPUT +VS OUTPUT MILS Chip Layout THEORY OF OPERATION The AD9624 is a wide bandwidth voltage feedback amplifier that is guaranteed for minimum gain stability of +6. Since its open-loop frequency response follows the conventional 6 dB/ octave roll-off, its gain bandwidth product is basically constant. Increasing its closed-loop gain results in a corresponding de- crease in small signal bandwidth. The AD9624 typically main- tains a 60 degree unity loop gain phase margin with R F ≅ 510 Ω . This high margin minimizes the effects of signal and noise peaking. Feedback Resistor Choice At minimum stable gain (+6), the AD9624 provides optimum dynamic performance with R F = 510 Ω . When using this value and following the high speed layout guidelines, a shunt capacitor (CF) should not be required. This value for R F provides the best combination of wide bandwidth, low peaking, and distortion. However, if improved gain flatness is desired, a shunt capacitor (CF) will provide extra phase margin. This reduces both over- shoot and peaking with only a slight reduction of bandwidth. As an example, if the amplifier exhibits (worst case) peaking of 1.2 dB with RGiRF = 85 Ω (AV = 6), then using a C F of ≈ 0.5 pF(two 1 pF capacitors in series) across R F will reduce this peaking to 0 dB. In addition, overshoot, noise, and settling time (<0.01%) will also improve. This comes at the expense of slightly decreased closed-loop bandwidth due to the R F 3 CF time constant created. If the equivalent input capacitance greatly exceeds 4 pF (due to source drive or long input traces to the amplifier), then added shunt capacitance (C F) will be necessary to maintain stability at minimum gain. As a rule of thumb, if the product of R FiRG 3 CI ≤ 300 310–12 seconds, then CF is not required (for maximum bandwidth ap- plications) and the amplifier’s phase margin will maintain about 60°. Generally, this should be the case. Pulse Response Unlike a traditional voltage feedback amplifier in which slew speed is usually dictated by its front end dc quiescent current and gain bandwidth product, the AD9624 provides “on de- mand” transconductance current that increases proportionally to the input “step” signal amplitude. This results in slew speeds (2000 V/µs) comparable to wideband current feedback designs. This, combined with relatively low input noise current (2.5 pA/ √Hz), gives the AD9624 the best attributes of both volt- age and current feedback amplifiers.