AD9040A/PWB

AD9040A AD | Alldatasheet

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REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. a 10-Bit 40 MSPS A/D Converter AD9040A

FEATURES

Low Power: 940 mW 53 dB SNR @ 10 MHz A IN On-Chip T/H, Reference CMOS-Compatible

2 V p-p Analog Input

Fully Characterized Dynamic Performance

APPLICATIONS

Ultrasound Medical Imaging Digital Oscilloscopes Professional Video Digital Communications Advanced Television (MUSE Decoders) Instrumentation GENERAL DESCRIPTION The AD9040A is a complete 10-bit monolithic sampling analog- to-digital converter (ADC) with on-board track-and-hold and reference. The unit is designed for low cost, high performance applications and requires only an encode signal to achieve 40 MSPS sample rates with 10-bit resolution. Digital inputs and outputs are CMOS compatible; the analog input requires a signal of 2 V p-p amplitude. The two-step architecture used in the AD9040A is optimized to provide the best dynamic performance available while maintaining low power requirements of only 940 mW typically; maximum dissi- pation is 1.1 watt at 40 MSPS. The signal-to-noise ratio (SNR), including harmonics, is 53 dB, or 8.5 ENOB, when sampling an analog input of 10.3 MHz at 40 MSPS. Competitive devices perform at less than 7.5 ENOB and require external references and larger input signals. The AD9040A A/D converter is available as either a 28-lead plastic DIP or a 28-lead SOIC. The two models operate over a commercial temperature range of 0 °C to +70°C. Contact the factory regarding availability of ceramic military temperature range devices. FUNCTIONAL BLOCK DIAGRAM ERROR CORRECTION AD9040A BANDGAP REFERENCE 6-BIT ADC 5-BIT ADC T/H T/H DECODE LOGIC DECODE LOGIC ENCODE A IN GND VOUT VREF BP REF AMP ARRAY REF AMP PRODUCT HIGHLIGHTS 1. CMOS compatible logic for direct interface to ASICs. 2. On-board T/H provides excellent high frequency perfor- mance on analog inputs, critical for communications and medical imaging applications. 3. High input impedance and 2 volt p-p input range reduce need for external amplifiers. 4. Easy to use; no cumbersome external voltage references required, allowing denser packing of ADCs for multichannel applications. 5. Available in 28-lead plastic DIP and SOIC packages. 6. Evaluation board includes AD9040AJR, reconstruction DAC, and latches. Space is available near the analog input and digital outputs of the converter for additional circuits. Order as part number AD9040A/PCB (schematic shown in data sheet). Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 1999

AD9040A–SPECIFICATIONS

ELECTRICAL CHARACTERISTICS

Parameter (Conditions) Temp Level Min Typ Max Units RESOLUTION 10 Bits DC ACCURACY Differential Nonlinearity +25 °C I 1.0 2.0 LSB Full VI 2.5 LSB Integral Nonlinearity +25 °C I 1.0 2.0 LSB Full VI 2.5 LSB No Missing Codes Full VI Guaranteed Gain Error +25 °CI – 0.5 – 1.5 % FS Full VI – 2% F S Gain Tempco1 Full V – 70 ppm/ °C ANALOG INPUT Input Voltage Range +25 °C V 2 V p-p Input Offset Voltage +25 °CI – 2 – 25 mV Full VI – 30 mV Input Bias Current +25 °CI 7 1 5 mA Full VI 25 mA Input Resistance +25 °C I 200 350 k W Input Capacitance +25 °CV 5 p F Analog Bandwidth +25 °C V 48 MHz BANDGAP REFERENCE Output Voltage Full VI 2.4 2.6 V Temperature Coefficient 1 Full V – 40 ppm/ °C SWITCHING PERFORMANCE Maximum Conversion Rate +25 °C I 40 MSPS Minimum Conversion Rate +25 °C IV 2 10 MSPS Aperture Delay (tA) +25 °C V 1.9 ns Aperture Uncertainty (Jitter) +25 °C V 7 ps, rms Output Propagation Delay (t PD)2 +25°C I 7.5 10 12 ns Full IV 6 14 ns DYNAMIC PERFORMANCE Transient Response +25 °CV 2 5 n s Overvoltage Recovery Time +25 °CV 4 0 n s Signal-to-Noise Ratio 3 fIN = 2.3 MHz +25 °C I 51 54 dB fIN = 10.3 MHz +25 °C I 50 53 dB Signal-to-Noise Ratio 3 (Without Harmonics) fIN = 2.3 MHz +25 °C I 52 55 dB fIN = 10.3 MHz +25 °C I 51 54 dB Signal-to-Noise Ratio3, 4 fIN = = 2.3 MHz +25 °C I 52 56 dB fIN = = 10.3 MHz +25 °C I 51 55 dB Signal-to-Noise Ratio3, 4 (Without Harmonics) fIN = 2.3 MHz +25 °C I 53 57 dB fIN = 10.3 MHz +25 °C I 53 56 dB 2nd Harmonic Distortion fIN = 2.3 MHz +25 °C I 56 67 dBc fIN = 10.3 MHz +25 °C I 56 65 dBc 3rd Harmonic Distortion fIN = 2.3 MHz +25 °C I 58 73 dBc fIN = 10.3 MHz +25 °C I 58 70 dBc Two-Tone Intermodulation +25 °C V 62 dBc Distortion Rejections Differential Phase +25 °C III 0.15 0.5 Degrees Differential Gain +25 °C III 0.25 1.0 % REV. B–2– (+VS = VD = +5 V; –V S = –5 V; internal reference: ENCODE = 40.5 MSPS unless otherwise noted)

REV. B –3– Test AD9040AJN/JR Parameter (Conditions) Temp Level Min Typ Max Units ENCODE INPUT Logic “1” Voltage Full VI 4.0 V Logic “0” Voltage Full VI 1.0 V Logic “1” Current Full VI – 1 mA Logic “0” Current Full VI – 1 mA Input Capacitance +25 °CV 1 4 p F Encode Pulsewidth (High) (t EH)6 +25°C IV 10 100 ns Encode Pulsewidth (Low) (t EL)6 +25°C IV 10 100 ns DIGITAL OUTPUTS Logic “1” Voltage Full VI 4.95 V Logic “0” Voltage Full VI 0.05 V Output Coding Offset Binary POWER SUPPLY VD Supply Current Full VI 13 20 mA +VS Supply Current Full VI 89 110 mA –VS Supply Current Full VI 87 105 mA Power Dissipation Full VI 0.94 1.2 W Power Supply Rejection Ratio (PSRR) 7 +25°CI – 15 mV/V NOTES 1“Gain Tempco” is for converter using internal reference; “Temperature Coefficient” is for bandgap reference only. 2Output propagation delay (t PD) is measured from the 50% point of the falling edge of the encode command to the min/max voltage levels of the digital outputs with 10 pF maximum loads. 3RMS signal to rms noise with analog input signal 1 dB below full scale at specified frequency. 4ENCODE = 32 MSPS. 53rd order intermodulation measured with analog input frequencies of 2.3 MHz and 2.4 MHz at 7 dB below full scale. 6For rated performance at 40 MSPS, duty cycle of encode command should be 50% – 10%. 7Measured as the ratio of the change in offset voltage for a 5% change in +V S or –VS. Specifications subject to change without notice. EXPLANATION OF TEST LEVELS Test Level I – 100% Production Tested. II – 100% production tested at +25 °C, and sample tested at specified temperatures. AC testing done on sample basis. III – Sample Tested Only. IV – Parameter is guaranteed by design and characterization testing. V – Parameter is a typical value only. VI – All devices are 100% production tested at +25 °C. 100% production tested at temperature extremes for military temperature devices; guaranteed by design and character- ization testing for industrial devices. ABSOLUTE MAXIMUM RATINGS 1 Operating Temperature Maximum Junction Temperature 2 (JN/JR Suffixes) . . . +150 °C NOTES 1Absolute maximum ratings are limiting values to be applied individually, and beyond which the serviceability of the circuit may be impaired. Functional operability is not necessarily implied. Exposure to absolute maximum rating conditions for an extended period of time may affect device reliability. 2Typical thermal impedances (parts soldered to board): N Package (Plastic DIP): qJA = 42°C/W; qJC = 10°C/W. R Package (SOIC): qJA = 47°C/W; qJC = 10°C/W. ORDERING GUIDE Model Temperature Range Package Description Package Option AD9040AJN 0 °C to +70°C 28-Lead Plastic DIP N-28 AD9040AJR 0 °C to +70°C 28-Lead SOIC Package R-28 AD9040A/PWB Printed Circuit Board (Only) of Evaluation Circuit AD9040A/PCB Complete Evaluation Board, Assembled and Tested, Including AD9040AJR

8 NC No Connection Internally

9 ENCODE Encode Clock Input to ADC. (ADC is encoding) on rising edge. 15 OR Out-of-Range Condition Output.

1 LSB (<FS –1 LSB or >+FS

16 D9 (MSB) Most Significant Bit of ADC

28 D0 (LSB) Least Significant Bit of ADC

Figure 1. Timing Diagram

and the instant at which the analog input is sampled. The sample-to-sample variation in aperture delay. The deviation of any code from an ideal 1 LSB step. superimposed on a low frequency signal (15.734 kHz). termined by a least square curve fit. The encode rate at which parametric testing is performed. ENCODE command and the 1 V/4 V points of output data. reduced to the full-scale range of the converter. input signal 1 dB below full scale. analog input signal 1 dB below full scale. when a step function is applied to the analog input. power of the strongest third-order IMD signal. Figure 2. Equivalent Circuits

among the ADCs, as shown in Figure 5. Figure 5. Slaving Multiple AD9040As to a Single Internal of a voltage-output DAC such as the AD7242. Figure 6. Ultrasound/Sonar Time-Gain Control ADC

19.9609375 MHz to provide the analog input signal; the other

performance graphs elsewhere in this data sheet.

19.9609375 MHz

40 MHz

Figure 7. Transient Response Test X-AMP is a trademark of Analog Devices, Inc.

REV. B–8– Layout Information Preserving the accuracy and dynamic performance of the AD9040A requires that designers pay special attention to the layout of the printed circuit board. Analog paths should be kept as short as possible and be properly terminated to avoid reflections. The analog input and reference voltage connections should be kept away from digital signal paths; this reduces the amount of digital switching noise which is capacitively coupled into the analog section. Digital signal paths should also be kept short, and run lengths should be matched to avoid propagation delay mismatch. The AD9040A digital outputs should be buffered or latched close to the device (<2 cm). This prevents load transients which may feedback into the device. In high speed circuits, layout of the ground is critical. A single, low impedance ground plane on the component side of the board is recommended. Power supplies should be capacitively coupled to the ground plane with high quality chip capacitors to reduce noise in the circuit. Multilayer boards allow designers to lay out signal traces without interrupting the ground plane, and provide low impedance ground planes. In systems with dedi- cated analog and digital grounds, all grounds of the AD9040A should be connected to the analog ground plane. The power supplies of the AD9040A should be isolated from the supplies used for external devices; this reduces the amount of noise coupled into the ADC. The digital +5 volt connection of the device (V D, Pin 23) powers the digital outputs and should be connected to the same supply as +V S (Pins 3 and 10). Con- necting VD to a system digital supply may couple noise into the device. Sockets limit dynamic performance and are not recom- mended for use with the AD9040A. EVALUATION BOARD The evaluation board for the AD9040A (AD9040A/PCB) pro- vides an easy and flexible method for evaluating the ADC’s performance without (or prior to) developing a user-specific printed circuit board. The two-sided board includes a recon- struction DAC and digital output interface, and uses the layout and applications suggestions outlined above. It is available from Analog Devices at nominal cost. Generous space is provided near the analog input and digital outputs to support additional signal processing components the user may wish to add. This prototyping area includes through holes with 100-mil centers to support a variety of component additions. Input/Output/Supply Information Power supply, analog input, clock connections, and recon- structed output (RC OUTPUT) are identified by labels on the evaluation board. Operation of the evaluation board should conform to the following characteristics: Table I. Evaluation Board Characteristics Parameter Typical Units Supply Current +5 V 250 mA –5.2 V 300 mA A IN Impedance 51 W Voltage Range – 1.0 V CLOCK Impedance 51 W Frequency 40 MSPS RC OUTPUT Impedance 51 W Voltage Range 0 V to –1 V V Analog Input Analog input signals can be fed directly into the Device Under Test input (AIN). The AIN input is terminated at the device with a 51 W resistor.

Figure 9. PCB Bottom View

0 V Bipolar Zero 0 10000000000

Figure 8. PCB Top View 1 V p-p signal at the output (RC OUTPUT). data are available on the falling edge of the clock.

Figure 10. PCB Schematic

REV. B–12– C1835a–0–5/99PRINTED IN U.S.A. OUTLINE DIMENSIONS Dimensions shown in inches and (mm) 28-Lead Plastic DIP (N-28) 1 14 1.565 (39.70) 1.380 (35.10) 0.550 (13.97) 0.530 (13.46) PIN 1 0.022 (0.558) 0.014 (0.356) 0.015 (0.38) MIN 0.140 (3.55) MIN SEATING PLANE 0.250 (6.35) MAX 0.100 (2.54) BSC 0.070 (1.77) MAX 0.015 (0.381) 0.008 (0.204) 0.625 (15.87) 0.600 (15.24) 28-Lead SOIC Package (R-28) 0.012 (0.30) 0.004 (0.10) 0.019 (0.48) 0.014 (0.36) 0.104 (2.64) 0.093 (2.36) 0.050 (1.27) BSC 0.013 (0.33) 0.024 (0.61) 0.712 (18.08) 0.700 (17.78) 0.419 (10.64) 0.393 (9.98) 0.300 (7.60) 0.292 (7.40) PIN 1 2815 14 1