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REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. a 10-Bit 20 MSPS 160 mW CMOS A/D Converter AD876
FEATURES
CMOS 10-Bit 20 MSPS Sampling A/D Converter Pin-Compatible 8-Bit Option Power Dissipation: 160 mW +5 V Single Supply Operation Differential Nonlinearity: 0.5 LSB Guaranteed No Missing Codes Power Down (Standby) Mode Three-State Outputs Digital I/Os Compatible with +5 V or +3.3 V Logic Adjustable Reference Input Small Size: 28-Lead SOIC, 28-Lead SSOP, or 48-Lead Thin Quad Flatpack (TQFP) PRODUCT DESCRIPTION The AD876 is a CMOS, 160 mW, 10-bit, 20 MSPS analog-to- digital converter (ADC). The AD876 has an on-chip input sample-and-hold amplifier. By implementing a multistage pipe- lined architecture with output error correction logic, the AD876 offers accurate performance and guarantees no missing codes over the full operating temperature range. Force and sense con- nections to the reference inputs minimize external voltage drops. The AD876 can be placed into a standby mode of operation reducing the power below 50 mW. The AD876’s digital I/O interfaces to either +5 V or +3.3 V logic. Digital output pins can be placed in a high impedance state; the format of the out- put is straight binary coding. The AD876’s speed, resolution and single-supply operation ideally suit a variety of applications in video, multimedia, imag- ing, high speed data acquisition and communications. The AD876’s low power and single-supply operation satisfy require- ments for high speed portable applications. Its speed and reso- lution ideally suit charge coupled device (CCD) input systems such as color scanners, digital copiers, electronic still cameras and camcorders. The AD876 comes in a space saving 28-lead SOIC and 48-lead thin quad flatpack (TQFP) and is specified over the commercial (0°C to +70°C) temperature range. PRODUCT HIGHLIGHTS Low Power The AD876 at 160 mW consumes a fraction of the power of presently available 8- or 10-bit, video speed converters. Power- down mode and single-supply operation further enhance its desirability in low power, battery operated applications such as electronic still cameras, camcorders and communication systems. Very Small Package The AD876 comes in a 28-lead SOIC, 28-lead SSOP, and 48- lead surface mount, thin quad flat package. The TQFP package is ideal for very tight, low headroom designs. Digital I/O Functionality The AD876 offers three-state output control. Pin Compatible Upgrade Path The AD876 offers the option of laying out designs for eight bits and migrating to 10-bit resolution if prototype results warrant. FUNCTIONAL BLOCK DIAGRAM A/D D/A A/D D/A A/D D/A A/D CORRECTION LOGIC AIN REFTF REFTS REFBS REFBF STBY THREE- STATE (MSB) (LSB) DRV DDDV DDAV DDCLK DRV SSDV SSAV SSCML AD876 SHA SHA SHA GAIN SHA GAIN GAIN OUTPUT BUFFERS Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 1998
AD876* PRODUCT PAGE QUICK LINKS Last Content Update: 02/23/2017 COMPARABLE PARTS View a parametric search of comparable parts. DOCUMENTATION Application Notes
- AN-297: Test Video A/D Converters Under Dynamic Conditions Data Sheet
- AD876: 10-Bit 20 MSPS 160 mW CMOS A/D Converter Data Sheet REFERENCE MATERIALS Technical Articles
- Correlating High-Speed ADC Performance to Multicarrier 3G Requirements
- DNL and Some of its Effects on Converter Performance
- MS-2210: Designing Power Supplies for High Speed ADC DESIGN RESOURCES
- AD876 Material Declaration
- PCN-PDN Information
- Quality And Reliability
- Symbols and Footprints DISCUSSIONS View all AD876 EngineerZone Discussions. SAMPLE AND BUY Visit the product page to see pricing options. TECHNICAL SUPPORT Submit a technical question or find your regional support number. DOCUMENT FEEDBACK Submit feedback for this data sheet. This page is dynamically generated by Analog Devices, Inc., and inserted into this data sheet. A dynamic change to the content on this page will not trigger a change to either the revision number or the content of the product data sheet. This dynamic page may be frequently modified.
AD876–SPECIFICATIONS REV. B–2– AD876JR-8 AD876 Parameter Min Typ Max Min Typ Max Units RESOLUTION 8 10 Bits DC ACCURACY Integral Nonlinearity (INL) ± 0.3 ± 1.0 ± 1.0 LSB Differential Nonlinearity (DNL) ± 0.1 ± 0.75 ± 0.5 ± 1 LSB No Missing Codes GUARANTEED GUARANTEED Offset Error 0.1 0.4 % FSR Gain Error 0.1 0.2 % FSR ANALOG INPUT Input Range 2 2 V p-p Input Capacitance 5.0 5.0 pF REFERENCE INPUT Reference Input Resistance 250 250 Ω Reference Input Current 8.0 8.0 mA Reference Top Offset 35 35 mV Reference Bottom Offset 35 35 mV DYNAMIC PERFORMANCE Effective Number of Bits fIN = 1 MHz 7.8 9.0 Bits fIN = 10 MHz 7.5 8.2 Bits Signal-to-Noise and Distortion (S/N+D) Ratio fIN = 1 MHz 49 56 dB fIN = 3.58 MHz 46 49 51 56 dB fIN = 10 MHz 47 51 dB Total Harmonic Distortion (THD) fIN =1 MHz –62 –62 dB fIN = 3.58 MHz –62 –56 –62 –56 dB fIN =10 MHz –60 –60 dB Spurious Free Dynamic Range 2 –65 –65 dB Full Power Bandwidth 150 150 MHz Differential Phase 0.5 0.5 Degree Differential Gain 1 1 % POWER SUPPLIES Operating Voltage AVDD1 +4.5 +5.25 +4.5 +5.25 Volts DVDD1 +4.5 +5.25 +4.5 +5.25 Volts DRVDD +3.0 +5.25 +3.0 +5.25 Volts Operating Current IAVDD 20 25 20 25 mA IDVDD 12 16 12 16 mA IDRVDD 0.1 1 0.1 1 mA POWER CONSUMPTION 160 190 160 190 mW TEMPERATURE RANGE Specified 0 +70 0 +70 °C NOTES 1AVDD and DV DD must be within 0.5 V of each other to maintain specified performance levels. 23.58 MHz Input Frequency. Specifications subject to change without notice. See Definition of Specifications for additional information. (TMIN to TMAX with AVDD = +5.0 V, DVDD = +5.0 V, DRVDD = +3.3 V, VREFB = +4.0 V, VREFB = +2.0 V, fCLOCK = 20 MSPS, unless otherwise noted)
Specifications subject to change without notice. 1Conversion rate is operational down to 10 kHz without degradation in specified performance. Figure 1. Timing Diagram
REV. B–4– AD876 SOIC TQFP Symbol Pin No. Pin No. Type Name and Function D0 (LSB) 3 1 DO Least Significant Bit. D1–D4 4–7 2–5 DO Data Bits 1 through 4. D5–D8 8–11 8–11 Data Bits 5 through 8. D9 (MSB) 12 12 DO Most Significant Bit. THREE- 16 23 DI THREE-STATE = LOW THREE-STATE = HIGH STATE or N/C Normal Operating Mode High Impedance Outputs STBY 17 24 DI STBY = LOW or N/C STBY = HIGH Normal Operating Mode Standby Mode CLK 15 22 DI Clock Input. CML 26 38 AO Bypass Pin for an Internal Bias Point. REFTF 22 30 AI Reference Top Force. REFBF 24 34 AI Reference Bottom Force. REFTS 21 29 AI Reference Top Sense. REFBS 25 35 AI Reference Bottom Sense. AIN 27 39 AI Analog Input. AV DD 28 42 P +5 V Analog Supply. AVSS 1 44 P Analog Ground. DVDD 18 26 P +5 V Digital Supply. DVSS 14, 19, 20 17, 27, 28 P Digital Ground. DRVDD 2 45 P +3.3 V/+5 V Digital Supply. Supply for digital input and output buffers. DRVSS 13 16 P +3.3 V/+5 V Digital Ground. Ground for digital input and output buffers. Type: AI = Analog Input; AO = Analog Output; DI = Digital Input; DO = Digital Output; P = Power. PIN CONFIGURATIONS SOIC/SSOP TQFP PIN FUNCTION DESCRIPTIONS PINS D0 AND D1 ARE LEFT OPEN FOR THE AD876JR-8 AV SS DRV DD AV DD AIN REFBF REFTF *D0 *D1 CML REFBS D5 REFTS D6 DV SS D7 DV SS D8 DV DD D9 STBY DRV SS THREE-STATE DV SS CLK 8 21 9 20 10 19 12 17 14 15 TOP VIEW (Not to Scale) AD876 NC NC = NO CONNECT REFBS REFTF REFBF DV SS DV DD REFTS 41424347 4546 17 20 191814 1615 373839 21 24 2322 2512 TOP VIEW (Not to Scale) AD876 DRV SS DV SS CLK THREE-STATE STBY DRV DD AV SS AV DD AIN CML DV SS
ratings for extended periods may effect device reliability. accumulate on the human body and test equipment and can discharge without detection. precautions are recommended to avoid performance degradation or loss of functionality. Figure 2. Equivalent Circuits
pedance state by setting the THREE-STATE pin to HIGH. Figure 22. High-Impedance Output Timing Diagram
- The minimization of the loop area encompassed by a signal
- The minimization of the impedance associated with ground
- The inherent distributed capacitor formed by the power
plane, PCB insulation, and ground plane. AD876 Evaluation Board data sheet .
Figure 23. AD876 Evaluation Board Schematic
REV. B–16– AD876 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). R-28 28-Lead Wide Body (SOIC) 28 15 141 0.7125 (18.10) 0.6969 (17.70) 0.4193 (10.65) 0.3937 (10.00) 0.2992 (7.60) 0.2914 (7.40) PIN 1 SEATING PLANE 0.0118 (0.30) 0.0040 (0.10) 0.0192 (0.49) 0.0138 (0.35) 0.1043 (2.65) 0.0926 (2.35) 0.0500 (1.27) BSC 0.0125 (0.32) 0.0091 (0.23) 0.0500 (1.27) 0.0157 (0.40) 0.0291 (0.74) 0.0098 (0.25)x 45° ST-48 28-Lead Plastic Thin Quad Flatpack (TQFP) TOP VIEW (PINS DOWN) 0.276 ± 0.004 (7.0 ± 0.1) SQ 0.039 (1.00) REF 0.02 ± 0.003 (0.50 ± 0.08) (0.18 +0.08 –0.03) SEATING PLANE 0.055 ± 0.002 (1.40 ± 0.05) (1.50 +0.2 –0.1) 0.02 ± 0.008 (0.5 ± 0.2) 0.005 +0.002 –0.0008 0.004 ± 0.002 (3.5° ± 3.5°) RS-28 28-Lead Shrink Small Outline Package (SSOP) 28 15 141 0.407 (10.34) 0.397 (10.08) 0.311 (7.9) 0.301 (7.64) 0.212 (5.38) 0.205 (5.21) PIN 1 SEATING PLANE 0.008 (0.203) 0.002 (0.050) 0.07 (1.79) 0.066 (1.67) 0.0256 (0.65) BSC 0.078 (1.98) 0.068 (1.73) 0.015 (0.38) 0.010 (0.25) 0.009 (0.229) 0.005 (0.127) 0.03 (0.762) 0.022 (0.558) PRINTED IN U.S.A. C1991a–0–1/98