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REV.0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. a AD8302 Tel: 781/329–4700 www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2001 LF–2.7 GHz RF/IF Gain and Phase Detector FUNCTIONAL BLOCK DIAGRAM MFLT VMAG MSET PSET VPHS PFLT VREF VIDEO OUTPUT – A INPA OFSA COMM OFSB INPB VPOS 60dB LOG AMPS (7 DETECTORS) 60dB LOG AMPS (7 DETECTORS) VIDEO OUTPUT – B PHASE DETECTOR BIAS x3 1.8V AD8302

FEATURES

Measures Gain/Loss and Phase up to 2.7 GHz Dual Demodulating Log Amps and Phase Detector Input Range –60 dBm to 0 dBm in a 50 /H9024 System Accurate Gain Measurement Scaling (30 mV/dB) Typical Nonlinearity < 0.5 dB Accurate Phase Measurement Scaling (10 mV/Degree) Typical Nonlinearity < 1 Degree Measurement/Controller/Level Comparator Modes Operates from Supply Voltages of 2.7 V–5.5 V Stable 1.8 V Reference Voltage Output Small Signal Envelope Bandwidth from DC to 30 MHz

APPLICATIONS

Remote System Monitoring and Diagnostics Return Loss/VSWR Measurements Log Ratio Function for AC Signals PRODUCT DESCRIPTION The AD8302 is an innovative, fully integrated system for mea- suring gain/loss and phase in numerous receive, transmit, and instrumentation applications. It requires few external compo- nents and a single supply of 2.7 V–5.5 V. The ac-coupled i nput signals can range from –60 dBm to 0 dBm in a 50 Ω system, from low frequencies up to 2.7 GHz. The outputs provide an accu- rate measurement of either gain or loss over a ±30 dB range scaled to 30 mV/dB, and of phase over a 0 °–180° range scaled to 10 mV/degree. Both subsystems have an output bandwidth of

30 MHz, w hich may optionally be reduced by the addition of

external filter capacitors. The AD8302 can be used in direct control mode to servo gain and phase of a signal chain toward predetermined setpoints. The AD8302 comprises a closely matched pair of demodulating logarithmic amplifiers, each having a 60 dB measurement range. By taking the difference of their outputs, a measurement of the magnitude ratio or gain betw een the two input signals is available. These signals may even be at different frequencies, allowing the measurement of conversion gain or loss. The AD8302 may be used to determine absolute signal level by applying the unknown signal to one input and a calibrated ac reference signal to the other. With the output stage feedback connection dis- abled, a comparator may be realized, using the setpoint pins MSET and PSET to program the thresholds. The signal inputs are single-ended, allowing them to be matched and connected directly to a directional coupler. T heir input impedance is nominally 3 k Ω at low frequencies. The AD8302 includes a phase detector of the multiplier type, but with precise phase balance, driven by the fully limited sig- nals appearing at the outputs of the two logarithmic amplifiers. Thus, the phase accuracy measurement is independent of signal level over a wide range. The phase and gain output voltages are simultaneously available at loadable ground referenced outputs over the standard output range of 0 V to 1.8 V. The output drivers can source or sink up to 8 mA. A loadable, stable reference voltage of 1.8 V is avail- able for precise repositioning of the output range by the user. In controller applications, the connection between the gain output pin VMAG and the setpoint control pin MSET is broken. The desired setpoint is presented to MSET and the VMAG control signal drives an appropriate external variable gain device. Likewise, the feedback path between the phase output pin VPHS and its setpoint control pin PSET may be broken, to allow operation as a phase controller. The AD8302 is fabricated on Analog Devices’ proprietary, high- performance 25 GHz SOI complementary bipolar IC process. It is available in a 14-lead TSSOP package and operates over a –40°C to +85°C temperature range. An evaluation board is available.

REV. 0–2– AD8302–SPECIFICATIONS(TA = 25/H11543C, VS = 5 V, VMAG shorted to MSET, VPHS shorted to PSET, 52.3 /H9024 shunt resistors connected to INPA and INPB, for Phase measurement P INPA = PINPB unless otherwise noted) Parameter Conditions Min Typ Max Unit OVERALL FUNCTION Input Frequency Range >0 2700 MHz Gain Measurement Range P IN at INPA, PIN at INPB = –30 dBm ±30 dB Phase Measurement Range φIN at INPA > φIN at INPB ±90 Degree Reference Voltage Output Pin VREF, –40 °C ≤ TA ≤ +85°C 1.72 1.8 1.88 V INPUT INTERFACE Pins INPA and INPB Input Simplified Equivalent Circuit To AC Ground, f ≤ 500 MHz 3 /H206482k Ω/H20648pF Input Voltage Range AC-Coupled (0 dBV = 1 V rms) –73 –13 dBV re: 50 Ω –60 0 dBm Center of Input Dynamic Range –43 dBV –30 dBm MAGNITUDE OUTPUT Pin VMAG Output Voltage Minimum 20 × Log (VINPA/VINPB) = –30 dB 30 mV Output Voltage Maximum 20 × Log (VINPA/VINPB) = +30 dB 1.8 V Center Point of Output (MCP) V INPA = VINPB 900 mV Output Current Source/Sink 8 mA Small Signal Envelope Bandwidth Pin MFLT Open 30 MHz Slew Rate 40 dB Change, Load 20 pF /H2064810 kΩ 25 V/ µs Response Time Rise Time Any 20 dB Change, 10%–90% 50 ns Fall Time Any 20 dB Change, 90%–10% 60 ns Settling Time Full-Scale 60 dB Change, to 1% Settling 300 ns PHASE OUTPUT Pin VPHS Output Voltage Minimum Phase Difference 180 Degrees 30 mV Output Voltage Maximum Phase Difference 0 Degrees 1.8 V Phase Center Point When φ INPA = φINPB ±90° 900 mV Output Current Drive Source/Sink 8 mA Slew Rate 25 V/ µs Small Signal Envelope Bandwidth 30 MHz Response Time Any 15 Degree Change, 10%–90% 40 ns

120 Degree Change C FILT = 1 pF, to 1% Settling 500 ns

100 MHz MAGNITUDE OUTPUT

Dynamic Range ±1 dB Linearity P REF = –30 dBm (VREF = –43 dBV) 58 dB ±0.5 dB Linearity P REF = –30 dBm (VREF = –43 dBV) 55 dB ±0.2 dB Linearity P REF = –30 dBm (VREF = –43 dBV) 42 dB Slope From Linear Regression 29 mV/dB Deviation vs. Temperature Deviation from Output at 25 °C –40°C ≤ TA ≤ +85°C, PINPA = PINPB = –30 dBm 0.25 dB Deviation from Best Fit Curve at 25 °C –40°C ≤ TA ≤ +85°C, PINPA = ±25 dB, PINPB = –30 dBm 0.25 dB Gain Measurement Balance P INPA = PINPB = –5 dBm to –50 dBm 0.2 dB PHASE OUTPUT Dynamic Range Less than ± 1 Degree Deviation from Best Fit Line 145 Degree Less than 10% Deviation in Instantaneous Slope 143 Degree Slope (Absolute Value) From Linear Regression about –90 ° or +90° 10 mV/Degree Deviation vs. Temperature Deviation from Output at 25 °C –40°C ≤ TA ≤ +85°C, Delta Phase = 90 Degrees 0.7 Degree Deviation from Best Fit Curve at 25 °C –40°C ≤ TA ≤ +85°C, Delta Phase = ±30 Degrees 0.7 Degree

REV. 0 –3– AD8302 Parameter Conditions Min Typ Max Unit

900 MHz MAGNITUDE OUTPUT

Dynamic Range ±1 dB Linearity P REF = –30 dBm (VREF = –43 dBV) 58 dB ±0.5 dB Linearity P REF = –30 dBm (VREF = –43 dBV) 54 dB ±0.2 dB Linearity P REF = –30 dBm (VREF = –43 dBV) 42 dB Slope From Linear Regression 28.7 mV/dB Deviation vs. Temperature Deviation from Output at 25 °C –40°C ≤ TA ≤ +85°C, PINPA = PINPB = –30 dBm 0.25 dB Deviation from Best Fit Curve at 25 °C –40°C ≤ TA ≤ +85°C, PINPA = ±25 dB, PINPB = –30 dBm 0.25 dB Gain Measurement Balance P INPA = PINPB = –5 dBm to –50 dBm 0.2 dB PHASE OUTPUT Dynamic Range Less than ± 1 Degree Deviation from Best Fit Line 143 Degree Less than 10% Deviation in Instantaneous Slope 143 Degree Slope (Absolute Value) From Linear Regression about –90 ° or +90° 10.1 mV/Degree Deviation Linear Deviation from Best Fit Curve at 25 °C –40°C ≤ TA ≤ +85°C, Delta Phase = 90 Degrees 0.75 Degree –40°C ≤ TA ≤ +85°C, Delta Phase = ±30 Degrees 0.75 Degree Phase Measurement Balance Phase @ INPA = Phase @ INPB, P IN = –5 dBm to –50 dBm 0.8 Degree

1900 MHz MAGNITUDE OUTPUT

Dynamic Range ±1 dB Linearity P REF = –30 dBm (VREF = –43 dBV) 57 dB ±0.5 dB Linearity P REF = –30 dBm (VREF = –43 dBV) 54 dB ±0.2 dB Linearity P REF = –30 dBm (VREF = –43 dBV) 42 dB Slope From Linear Regression 27.5 mV/dB Deviation vs. Temperature Deviation from Output at 25 °C –40°C ≤ TA ≤ +85°C, PINPA = PINPB = –30 dBm 0.27 dB Deviation from Best Fit Curve at 25 °C –40°C ≤ TA ≤ +85°C, PINPA = ±25 dB, PINPB = –30 dBm 0.33 dB Gain Measurement Balance P INPA = PINPB = –5 dBm to –50 dBm 0.2 dB PHASE OUTPUT Dynamic Range Less than ± 1 Degree Deviation from Best Fit Line 128 Degree Less than 10% Deviation in Instantaneous Slope 120 Degree Slope (Absolute Value) From Linear Regression about –90 ° or +90° 10.2 mV/Degree Deviation Linear Deviation from Best Fit Curve at 25 °C –40°C ≤ TA ≤ +85°C, Delta Phase = 90 Degrees 0.8 Degree –40°C ≤ TA ≤ +85°C, Delta Phase = ±30 Degrees 0.8 Degree Phase Measurement Balance Phase @ INPA = Phase @ INPB, PIN = –5 dBm to –50 dBm 1 Degree

2200 MHz MAGNITUDE OUTPUT

Dynamic Range ±1 dB Linearity P REF = –30 dBm (VREF = –43 dBV) 53 dB ±0.5 dB Linearity P REF = –30 dBm (VREF = –43 dBV) 51 dB ±0.2 dB Linearity P REF = –30 dBm (VREF = –43 dBV) 38 dB Slope From Linear Regression 27.5 mV/dB Deviation vs. Temperature Deviation from Output at 25 °C –40°C ≤ TA ≤ +85°C, PINPA = PINPB = –30 dBm 0.28 dB Deviation from Best Fit Curve at 25 °C –40°C ≤ TA ≤ +85°C, PINPA = ±25 dB, PINPB = –30 dBm 0.4 dB Gain Measurement Balance P INPA = PINPB = –5 dBm to –50 dBm 0.2 dB PHASE OUTPUT Dynamic Range Less than ± 1 Degree Deviation from Best Fit Line 115 Degree Less than 10% Deviation in Instantaneous Slope 110 Degree Slope (Absolute Value) From Linear Regression about –90 ° or +90° 10 mV/Degree Deviation Linear Deviation from Best Fit Curve at 25 °C –40°C ≤ TA ≤ +85°C, Delta Phase = 90 Degrees 0.85 Degree –40°C ≤ TA ≤ +85°C, Delta Phase = ±30 Degrees 0.9 Degree REFERENCE VOLTAGE Pin VREF Output Voltage Load = 2 k Ω 1.7 1.8 1.9 V PSRR V S = 2.7 V to 5.5 V 0.25 mV/V Output Current Source/Sink (Less than 1% Change) 5 mA POWER SUPPLY Pin VPOS Supply 2.7 5.0 5.5 V Operating Current (Quiescent) V S = 5 V 19 25 mA –40°C ≤ TA ≤ +85°C2 1 2 7 m A Specifications subject to change without notice.

REV. 0 AD8302 –4– ABSOLUTE MAXIMUM RATINGS 1 θJA NOTES 1Stresses above those listed under Absolute Maximum Ratings may cause perma- nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2JEDEC 1S Standard (2-layer) board data. PIN CONFIGURATION TOP VIEW (Not to Scale) 1COMM AD8302 INPA OFSA VPOS OFSB INPB COMM MFLT VMAG MSET VREF PSET VPHS PFLT PIN FUNCTION DESCRIPTIONS Equivalent Pin No. Mnemonic Function Circuit 1, 7 COMM Device Common. Connect to low impedance ground. 2 INPA High Input Impedance to Channel A. Must be ac-coupled. Circuit A

3 OFSA A capacitor to ground at this pin sets the offset compensation filter corner Circuit A

and provides input decoupling. 4 VPOS Voltage Supply (V S), 2.7 V to 5.5 V.

5 OFSB A capacitor to ground at this pin sets the offset compensation filter corner Circuit A

and provides input decoupling. 6 INPB Input to Channel B. Same structure as INPA. Circuit A 8 PFLT Low-Pass Filter Terminal for the Phase Output. Circuit E

9 VPHS Single-Ended Output Proportional to the Phase Difference between INPA Circuit B

and INPB. 10 PSET Feedback Pin for Scaling of VPHS Output Voltage in Measurement Mode. Circuit D Apply a setpoint voltage for controller mode. 11 VREF Internally-Generated Reference Voltage (1.8 V Nominal). Circuit C 12 MSET Feedback Pin for Scaling of VMAG Output Voltage Measurement Mode. Circuit D Accepts a set point voltage in controller mode. 13 VMAG Single-Ended Output. Output voltage proportional to the decibel ratio of signals applied to INPA and INPB. Circuit B 14 MFLT Low-Pass Filter Terminal for the Magnitude Output. Circuit E CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD8302 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE ORDERING GUIDE Package Model Temperature Range Package Description Option AD8302ARU –40 °C to +85°C Tube, 14-Lead TSSOP RU-14 AD8302ARU-REEL 13" Tape and Reel AD8302ARU-REEL7 7" Tape and Reel AD8302-EVAL Evaluation Board

Figure 1. Equivalent Circuits

REV. 0 AD8302 –6– Typical Performance Characteristics (VS = 5 V, VINPB is the reference input and V INPA is swept unless otherwise noted. All references to dBm are referred to 50 /H9024. For the Phase Output curves the input signal levels are equal unless otherwise noted.) MAGNITUDE RA TIO – dB 2.0 –30 VMAG – V 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 –25 –20 –15 –10 –5 0 5 1 01 52 02 53 0 1900 900 100 2700 2200 TPC 1. Magnitude Output (VMAG) vs. Input Level Ratio (Gain) VINPA/VINPB, Frequencies 100 MHz, 900 MHz,

1900 MHz, 2200 MHz, 2700 MHz, 25 °C, PINPB = –30 dBm,

(Re: 50 Ω) MAGNITUDE RA TIO – dB 2.0 –30 VMAG – V 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 –25 –20 –15 –10 –5 0 5 1 01 52 02 53 0 900 100 2200 1900 2700 TPC 2. VMAG vs. Input Level Ratio (Gain) VINPA/VINPB, Frequencies 100 MHz, 900 MHz, 1900 MHz, 2200 MHz,

2700 MHz, PINPA = –30 dBm

MAGNITUDE RA TIO – dB –30 VMAG – V 1.80 –20 –1 00 1 02 03 0 3.0 ERROR IN VMAG – dB 2.5 2.0 1.5 1.0 0.5 0.0 –0.5 –1.0 –1.5 –3.0 –2.0 –2.5 1.65 1.50 1.35 1.20 1.05 0.90 0.75 0.60 0.45 0.30 0.15 TPC 3. VMAG Output and Log Conformance vs. Input Level Ratio (Gain), Frequency 100 MHz, –40 °C, +25°C, and +85°C, Reference Level = –30 dBm MAGNITUDE RA TIO – dB –30 VMAG – dB 1.80 –20 –10 0 10 20 30 3.0 ERROR IN VMAG – dB 2.5 2.0 1.5 1.0 0.5 0.0 –0.5 –1.0 –1.5 –3.0 –2.0 –2.5 1.65 1.50 1.35 1.20 1.05 0.90 0.75 0.60 0.45 0.30 0.15 TPC 4. VMAG and Log Conformance vs. Input Level Ratio (Gain), Frequency 900 MHz, –40 °C, +25°C, and +85°C, Reference Level = –30 dBm MAGNITUDE RA TIO – dB –30 VMAG – dB 1.80 1.65 –20 –10 0 10 20 30 3.0 ERROR IN VMAG – dB 2.5 2.0 1.5 1.0 0.5 0.0 –0.5 –1.0 –1.5 –3.0 –2.0 –2.5 1.50 1.35 1.20 1.02 0.90 0.75 0.60 0.45 0.30 0.15 TPC 5. VMAG and Log Conformance vs. Input Level Ratio (Gain), Frequency 1900 MHz, –40 °C, +25°C, and +85°C, Reference Level = –30 dBm MAGNITUDE RA TIO – dB –30 VMAG – dB –20 –10 0 10 20 30 3.0 ERROR IN VMAG – dB 2.5 2.0 1.5 1.0 0.5 0.0 –0.5 –1.0 –1.5 –3.0 –2.0 –2.5 1.80 1.65 1.50 1.35 1.20 1.02 0.90 0.75 0.60 0.45 0.30 0.15 TPC 6. VMAG Output and Log Conformance vs. Input Level Ratio (Gain), Frequency 2200 MHz, –40°C, +25°C, and +85°C, Reference Level = –30 dBm

REV. 0 AD8302 –7– MAGNITUDE RA TIO – dB –30 ERROR IN VMAG – dB 1.5 1.0 0.5 0.0 –0.5 –1.0 –1.5 –2.0 –2.5 –3.0 –25 –20 –15 –10 –5 0 5 1 01 52 02 53 0 2.0 3.0 2.5 –40 C+85 C +25 C –40 C +85 C TPC 7. Distribution of Magnitude Error vs. Input Level Ratio (Gain), Three Sigma to Either Side of Mean, Fre- quency 900 MHz, Temperatures –40 °C, +25°C, and +85°C, Reference Level = –30 dBm MAGNITUDE RA TIO – dB –30 ERROR IN VMAG – dB 1.5 1.0 0.5 0.0 –0.5 –1.0 –1.5 –2.0 –2.5 –3.0 –25 –20 –15 –10 –5 0 5 1 01 52 02 53 0 2.0 3.0 2.5 –40 C +85 C +25 C +85 C–40 C TPC 8. Distribution of Error vs. Input Level Ratio (Gain), Three Sigma to Either Side of Mean, Frequency 1900 MHz, –40°C, +25°C, and +85°C, Reference Level = –30 dBm MAGNITUDE RA TIO – dB –30 ERROR IN VMAG – dB 1.5 1.0 0.5 0.0 –0.5 –1.0 –1.5 –2.0 –2.5 –3.0 –25 –20 –15 –10 –5 0 5 1 01 52 02 53 0 2.0 3.0 2.5 –40 C +85 C +25 C +85 C –40 C TPC 9. Distribution of Magnitude Error vs. Input Level Ratio (Gain), Three Sigma to Either Side of Mean, Fre- quency 2200 MHz, Temperatures –40 °C, +25°C, and +85°C, Reference Level = –30 dBm MAGNITUDE RA TIO – dB –30 VMAG – V 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 –25 –20 –15 –10 –5 0 5 1 01 52 02 53 0 2.0 TPC 10. Distribution of VMAG vs. Input Level Ratio (Gain), Three Sigma to Either Side of Mean, Frequency 1900 MHz, Temperatures Between –40°C, and +85°C, Reference Level = –30 dBm MAGNITUDE RA TIO – dB –30 VMAG – V 1.2 1.0 0.8 0.6 0.4 0.2 0.0 –20 –1 00 1 02 03 0 1.4 1.8 1.6 –40dBm ERROR IN VMAG – dB 1.5 1.0 0.5 0.0 –0.5 –1.0 –1.5 2.0 3.0 2.5 –2.0 –2.5 –3.0 –30dBm–45dBm –30dBm –15dBm –15dBm TPC 11. VMAG Output and Log Conformance vs. Input Level Ratio (Gain), Reference Level = –10 dBm, –30 dBm, and –45 dBm, Frequency 1900 MHz INPUT LEVEL – dBm –65 VMAG – V 0.90 0.85 0.80 0.75 0.95 1.05 1.00 PINP A = PINPB PINP A = PINPB – 5dB PINP A = PINPB + 5dB 1.10 TPC 12. VMAG Output vs. Input Level for P INPA = PINPB, PINPA = PINPB +5 dB, PINPA = PINPB –5 dB, Frequency 1900 MHz

REV. 0 AD8302 –8– FREQUENCY – MHz VMAG – V 200 400 600 800 1000 1200 1400 1.06 1600 1800 2000 22000 1.04 1.02 1.00 0.98 0.96 0.94 0.92 0.90 0.88 0.86 0.84 0.82 0.80 0.78 0.76 0.74 PINP A = PINPB + 5dB PINP A = PINPB PINP A = PINPB – 5dB TPC 13. VMAG Output vs. Frequency, for PINPA = PINPB, PINPA = PINPB +5 dB, and PINPA = PINPB –5 dB, PINPB = 30 dBm TEMPERA TURE – /H11543C CHANGE IN SLOPE – mV –40 –2 00 2 04 06 08 0 0.4 0.2 –0.2 –0.4 –0.6 –0.8 –1.0 –1.2 –1.4 –1.6 –1.8 TPC 14. Change in VMAG Slope vs. Temperature, Three Sigma to Either Side of Mean, Frequencies 1900 MHz TEMPERA TURE – /H11543C VMAG – mV –40 –30 –20 –10 0 10 20 30 40 50 60 –10 –15 –20 –25 70 80 90 TPC 15. Change in Center Point of Magnitude Output (MCP) vs. Temperature, Three Sigma to Either Side of Mean Frequencies 1900 MHz 0.80 0.85 0.90 0.95 1.00 PERCENT MCP – V TPC 16. Center Point of Magnitude Output (MCP) Dis- tribution Frequencies 900 MHz, 17,000 Units 27.0 27.5 28.0 28.5 29.0 29.5 30.0 PERCENT VMAG SLOPE – mV/dB TPC 17. VMAG Slope, Frequency 900 MHz, 17,000 Units FREQUENCY – MHz SLOPE OF VMAG – V 0.032 0.030 0.028 0.026 0.024 200 400 600 800 1000 1200 1400 1600 1800 2000 2200 2400 2600 2800 TPC 18. VMAG Slope vs. Frequency

REV. 0 AD8302 –9– 25ns HORIZONT AL 20mV PER VERTICAL DIVISION TPC 19. Magnitude Output Response to 4 dB Step, for PINPB = –30 dBm, PINPA = –32 dBm to –28 dBm, Frequency

1900 MHz, No Filter Capacitor

1.00/H9262s HORIZONT AL 20mV PER VERTICAL DIVISION TPC 20. Magnitude Output Response to 4 dB Step, for PINPB = –30 dBm, PINPA = –32 dBm to –28 dBm, Frequency

1900 MHz, 1 nF Filter Capacitor

TPC 21. Magnitude Output Response to 40 dB Step, for PINPB = –30 dBm, PINPA = –50 dBm to –10 dBm, Supply 5 V, Frequency 1900 MHz, No Filter Capacitor FREQUENCY – Hz VMAG – nV/ Hz 1k 10k 10000 100k 1M 10M 100M 1000 100 INPUT –50dBm INPUT –30dBm INPUT –10dBm TPC 22. Magnitude Output Noise Spectral Density, PINPA = PINPB = –10 dBm, –30 dBm, –50 dBm, No Filter Capacitor FREQUENCY – Hz VMAG – nV/ Hz 1k 10k 10000 100k 1M 10M 100M 1000 100 INPUT –50dBm INPUT –30dBm INPUT –10dBm TPC 23. Magnitude Output Noise Spectral Density, PINPA = PINPB = –10 dBm, –30 dBm, –50 dBm, with Filter Capacitor MAGNITUDE RA TIO – dB VMAG (PEAK-TO-PEAK) – V –25 –20 0.18 –15 –10 25 –5 0 5 1 01 52 0 100 0.16 0.14 0.12 0.10 0.08 0.06 0.04 0.02 0.00 900 1900 1200 2700 TPC 24. VMAG Peak-to-Peak Output Induced by Sweeping Phase Difference through 360 Degrees vs. Magnitude Ratio, Frequencies 100 MHz, 900 MHz, 1900 MHz, 2200 MHz

REV. 0 AD8302 –10– PHASE DIFFERENCE – Degrees PHASE OUT – V –180 –140 1.8 –100 –60 –20 20 60 100 140 180 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 900MHz100MHz 190MHz 2200MHz 2700MHz TPC 25. Phase Output (VPHS) vs. Input Phase Difference, Input Levels –30 dBm, Frequencies 100 MHz, 900 MHz,

1900 MHz, 2200 MHz, Supply 5 V

PHASE DIFFERENCE – Degrees PHASE OUT – V –180 –150 1.80 –120 –90 –60 –3 00 3 06 09 0 1.62 1.44 1.26 1.08 0.90 0.72 0.54 0.36 1.11022e–16 120 150 180 0.18 ERROR – Degrees –10 TPC 26. VPHS Output and Nonlinearity vs. Input Phase Difference, Input Levels –30 dBm, Frequency 100 MHz PHASE DIFFERENCE – Degrees PHASE OUT – V –180 –150 1.80 –120 –90 –60 –3 00 3 06 09 0 1.62 1.44 1.26 1.08 0.90 0.72 0.54 0.36 0.00 120 150 180 0.18 ERROR – Degrees –10 TPC 27. VPHS Output and Nonlinearity vs. Input Phase Difference, Input Levels –30 dBm, Frequency 900 MHz PHASE DIFFERENCE – Degrees PHASE OUT – V –180 –150 1.80 –120 –90 –60 –3 00 3 06 09 0 1.62 1.44 1.26 1.08 0.90 0.72 0.54 0.36 1.11022e–16 120 150 180 0.18 ERROR – Degrees –10 TPC 28. VPHS Output and Nonlinearity vs. Input Phase Difference, Input Levels –30 dBm, Frequency 1900 MHz PHASE DIFFERENCE – Degrees PHASE OUT – V –180 –150 1.80 –120 –90 –60 –3 00 3 06 09 0 1.62 1.44 1.26 1.08 0.90 0.72 0.54 0.36 1.11022e–16 120 150 180 0.18 ERROR – Degrees –10 TPC 29. VPHS Output and Nonlinearity vs. Input Phase Difference, Input Levels –30 dBm, Frequency 2200 MHz PHASE DIFFERENCE – Degrees ERROR – Degrees –180 –150 –120 –90 –60 –3 00 3 06 09 0 –10 120 150 180 –40/H11543C +85/H11543C +25/H11543C TPC 30. Distribution of VPHS Error vs. Input Phase Differ- ence, Three Sigma to Either Side of Mean, Frequency

900 MHz, –40°C, +25°C, and +85°C, Input Levels –30 dBm

REV. 0 AD8302 –11– PHASE DIFFERENCE – Degrees ERROR – Degrees –180 –150 –120 –90 –60 –3 00 3 06 09 0 –10 120 150 180 –40/H11543C +85/H11543C +25/H11543C TPC 31. Distribution of VPHS Error vs. Input Phase Differ- ence, Three Sigma to Either Side of Mean, Frequency

1900 MHz, –40°C, +25°C, and +85°C, Supply 5 V, Input

Levels PINPA = PINPB = –30 dBm PHASE DIFFERENCE – Degrees ERROR – Degrees –180 –150 –120 –90 –60 –3 00 3 06 09 0 –10 120 150 180 –40/H11543C +85/H11543C +25/H11543C TPC 32. Distribution of VPHS Error vs. Input Phase Differ- ence, Three Sigma to Either Side of Mean, Frequency

2200 MHz, –40°C, +25°C, and +85°C, Input Levels –30 dBm

PHASE DIFFERENCE – Degrees VPHS – V –180 –150 –120 –90 –60 –3 00 3 06 09 0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.0 120 150 180 0.2 TPC 33. Distribution of VPHS vs. Input Phase Differ- ence, Three Sigma to Either Side of Mean, Frequency

900 MHz, Temperature between –40 °C and +85°C, Input

Levels –30 dBm TEMPERA TURE – /H11543C CHANGE IN VPHS SLOPE – mV –40 –30 –20 –1 00 1 02 03 04 05 0 –0.35 60 80 90 MEAN +3 SIGMA MEAN –3 SIGMA –0.30 –0.25 –0.20 –0.15 –0.10 –0.05 0.00 0.05 0.10 0.15 TPC 34. Change in VPHS Slope vs. Temperature, Three Sigma to Either Side of Mean, Frequency 1900 MHz TEMPERA TURE – /H11543C CHANGE IN PCP – mV –40 –30 –20 –1 00 1 02 03 04 05 0 –40 60 80 90 +3 SIGMA –3 SIGMA –35 –30 –25 –20 –15 –10 TPC 35. Change in Phase Center Point (PCP) vs. Temperature, Three Sigma to Either Side of Mean, Frequency 1900MHz PCP – V PERCENT 1.00 1.05 TPC 36. Phase Center Point (PCP) Distribution, Frequency

900 MHz, 17000 units

REV. 0 AD8302 –12– VPHS – mV/Degree PERCENT 11.1 TPC 37. VPHS Slope Distribution, Frequency

900 MHz

TPC 38. VPHS Output Response to 4° Step with Nominal Phase Shift of 90°, Input Levels –30 dBm Frequency

1900 MHz, Temperature 25°C, 1 pF Filter Capacitor

TPC 39. VPHS Output Response to 4° Step with Nominal Phase Shift of 90°, Input Levels PINPA = PINPB = –30 dBm, Supply 5 V, Frequency 1900 MHz, Temperature 25 °C, with 100 pF Filter Capacitor 50ns HORIZONT AL 10mV PER VERTICAL DIVISION TPC 40. VPHS Output Response to 40° Step with Nominal Phase Shift of 90°, Input Levels PINPA = PINPB = –30 dBm, Frequency 1900 MHz,1 pF Filter Capacitor FREQUENCY – Hz VPHS – nV/ Hz 10000 1000 100 10k 100k 1M 10M 100M INPUT –50dBm INPUT –30dBm INPUT –10dBm TPC 41. VPHS Output Noise Spectral Density vs. Frequency, PINPA = –30 dBm, PINPB = –10 dBm, –30 dBm, –50 dBm, and 90° Input Phase Difference PHASE DIFFERENCE – Degrees PHASE OUT – V –180 –150 1.80 –120 –90 –60 –3 00 3 06 09 0 1.62 1.44 1.26 1.08 0.90 0.72 0.54 0.36 1.11022e–16 120 150 180 0.18 PINP A = –45dBm PINP A = –15dBm PINP A = –30dBm TPC 42. Phase Output vs. Input Phase Difference, PINPA = PINPB, PINPA = PINPB +15 dB, PINPA = PINPB – 15 dB, Frequency

REV. 0 AD8302 –13– PHASE DIFFERENCE – Degrees ABSOLUTE VALUE OF VPHS INST ANT ANEOUS SLOPE – mV –180 –150 –120 –90 –60 –3 00 3 06 09 0 120 150 180 PINP A = –30dBm PINP A = –45dBm PINP A = –15dBm TPC 43. Phase Output Instantaneous Slope, PINPA = PINPB, PINPA = PINPB + 15 dB, PINPA = PINPB – 15 dB, Frequency 900 MHz PHASE DIFFERENCE – Degrees PHASE OUT – V –180 –150 1.80 –120 –90 –60 –3 00 3 06 09 0 1.62 1.44 1.26 1.08 0.90 0.72 0.54 0.36 1.11022e–16 120 150 180 0.18 PINP A = –40dBm PINP A = –20dBm PINP A = –30dBm TPC 44. Phase Output vs. Input Phase Difference, PINPA = PINPB, PINPA = PINPB + 10 dB, PINPA = PINPB – 10 dB, Frequency 1900 MHz, Supply 5 V PHASE DIFFERENCE – Degrees ABSOLUTE VALUE OF VPHS INST ANT ANEOUS SLOPE – mV –180 –150 –120 –90 –60 –3 00 3 06 09 0 120 150 180 PINP A = –40dBm PINP A = –20dBm PINP A = –30dBm TPC 45. Phase Output Instantaneous Slope, PINPA = PINPB, PINPA = PINPB + 10 dB, PINPA = PINPB – 10 dB, Frequency 1900 MHz, Supply 5 V PHASE DIFFERENCE – Degrees PHASE OUT – V –180 –150 1.80 –120 –90 –60 –3 00 3 06 09 0 1.62 120 150 180 PINP A = –40dBm PINP A = –20dBm PINP A = –30dBm 1.44 1.26 1.08 0.90 0.72 0.54 0.36 0.18 1.11022e–16 TPC 46. Phase Output vs. Input Phase Difference, PINPA = PINPB, PINPA = PINPB + 10 dB, PINPA = PINPB – 10 dB, Frequency 2200 MHz PHASE DIFFERENCE – Degrees –180 –150 –120 –90 –60 –30 0 30 60 90 120 150 180 PINP A = –40dBm PINP A = –20dBm PINP A = –30dBm ABSOLUTE VALUE OF VPHS INST ANT ANEOUS SLOPE – mV TPC 47. Phase Output Instantaneous Slope, PINPA = PINPB, PINPA = PINPB + 10 dB, PINPA = PINPB – 10 dB, Frequency

2200 MHz

REAL SHUNT Z (/H9024) FREQUENCY – MHz RESIST ANCE – /H9024 4000 500 1000 1500 2000 2500 3500 3000 2500 2000 1500 1000 500 CAP ACIT ANCE – pF 4.0 3.5 0.0 3.0 2.5 2.0 1.5 1.0 0.5 SHUNT C SHUNT R CAP ACIT ANCE SHUNT Z (pF) TPC 48. Input Impedance, Modeled as Shunt R in Parallel with Shunt C

REV. 0 AD8302 –14– TEMPERA TURE – /H11543C VREF – mV –40 –30 –20 –1 00 1 02 03 04 05 06 07 0 9 0 TPC 49. Change in VREF vs. Temperature, Three Sigma to Either Side of Mean FREQUENCY – Hz 120 100 10k 100k 1M 10M 100M NOISE – nV/ Hz TPC 50. VREF Output Noise Spectral Density vs. Frequency VREF – V 1.74 PERCENT 1.76 1.80 TPC 51. VREF Distribution, 17,000 Units

hard-limited outputs drive the phase detector. to a physically realizable part of the log amp signal range. the intercept is a function of the input waveform as well. intercept represents a reference level. both log amps drive an exclusive-OR style digital phase detector. voltage that tracks the internal scaling constants. Figure 2. General Structure of the AD8302 tial to minimize the effect of common-mode signals and noise. surement errors for small signals. sitive to temperature and supply voltage. derived from the same reference as the log amp slope. 2For example, see the data sheet for the AD8307.

tered at 90°, or 0° to –180° centered at –90°. Figure 3. Simplified Block Diagram of the Output Interface the signal currents coming from the log amps and phase detector. external capacitors be added to the MFLT and PFLT pins.

1 COMM MFLT 14

Figure 4. Basic Connections for the AD8302 in Measurement RF ISLP is 600 mV/decade or dividing by 20 dB/decade, 30 mV/dB. the same full-scale swing but with the opposite slope. Figure 5. Idealized Transfer Characteristics for the Gain

them is modulated, then only the phase output should respond. noise transferred from the input is increased by the same factor. corresponding to VMAG = 1.8 V. Figure 8. Increasing the Slope Requires the Inclusion of a Figure 9. The increase in slope is now simplified to 1 + R1/10 kΩ. tions should be better in comparison to a fixed external voltage. Figure 9. The Center-Point is Repositioned with the Help

1.8 V if Gain > GainSP

0 V if Gain < GainSP

1.8 V if Phase > PhaseSP

0 V if Phase < PhaseSP

Figure 10. Disconnecting the Feedback to the Setpoint

REV. 0 AD8302 –19– The comparator mode can be turned into a controller mode by closing the loop around the V MAG and VPHS outputs. Figure 11 illustrates a closed loop controller that stabilizes the gain and phase of a DUT with gain and phase adjustment elements. If VMAG and VPHS are properly conditioned to drive gain and phase adjustment blocks preceding the DUT, the actual gain and phase of the DUT will be servoed toward the prescribed setpoint gain and phase given in Equations 11 and 12. These are essentially AGC and APC loops. Note that as with all control loops of this kind, loop dynam- ics and appropriate interfaces all must be considered in more detail. MAG SETPOINT PHASE SETPOINT VMAG MSET PSET VPHS INPA INPB /H9004MAG /H9004/H9021 AD8302 Figure 11. By applying overall feedback to a DUT via Measuring Amplifier Gain and Compression The most fundamental application of AD8302 is the monitoring of the gain and phase response of a functional circuit block such as an amplifier or a mixer. As illustrated in Figure 12, direc- tional couplers, DCB and DCA, sample the input and output signals of the “Black Box” DUT. The attenuators ensure that the signal levels presented to the AD8302 fall within its dynamic range. From the discussion in the Dynamic Range section, the optimal choice places both channels at P OPT = –30 dBm refer- enced to 50 Ω, which corresponds to –43 dBV. To achieve this, the combination of coupling factor and attenuation are given by, CB + LB = PIN – POPT (15) CA + LA = PIN + GAINNOM–POPT (16) where CB and CA are the coupling coefficients, LB and LA are the attenuation factors and GAIN NOM is the nominal DUT gain. If identical couplers are used for both ports, then the difference in the two attenuators compensates for the nominal DUT gain. When the actual gain is nominal, the V MAG output is 900 mV, corresponding to 0 dB. Variations from nominal gain appear as a deviation from 900 mV or 0 dB with a 30 mV/dB scaling. Depending on the nominal insertion phase associated with DUT, the phase measurement may require a fixed phase shift in series with one of the channels to bring the nominal phase difference presented to the AD8302 near the optimal 90 ° point. When the insertion phase is nominal, the VPHS output is 900 mV. Deviations from the nominal are reported with a 10 mV/degree scaling. Table I gives suggested component values for the mea- surement of an amplifier with a nominal gain of 10 dB and an input power of –10 dBm. ATTENA DCA ATTENB DCB H H “BLACK BOX” OUTPUTINPUT Figure 12. Using the AD8302 to Measure the Gain and range of the AD8302 for proper operation.

Figure 13. Using the AD8302 to Measure the Vector signal is 10 dBm and the nominal reflection coefficient is –19 dB.

the user to simulate their circuit loading of the device.

1 COMM

Figure 14. Evaluation Board Schematic

1 Common

2 VPOS

3 Common

REV. 0 AD8302 –23– 14-Lead Thin Shrink SO Package (TSSOP) (RU-14) 14 8 0.256 (6.50) 0.246 (6.25) 0.177 (4.50) 0.169 (4.30)PIN 1 0.201 (5.10) 0.193 (4.90) SEATING PLANE 0.006 (0.15) 0.002 (0.05) 0.0118 (0.30) 0.0075 (0.19) 0.0256 (0.65) BSC 0.0433 (1.10) MAX 0.0079 (0.20) 0.0035 (0.090) 0.028 (0.70) 0.020 (0.50) 8/H11543 0/H11543 OUTLINE DIMENSIONS Dimensions shown in inches and (mm).

–24– C02492–1–7/01(0) PRINTED IN U.S.A.