AD8203 AD | Alldatasheet
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Rev. B | Page 2 of 20 TABLE OF CONTENTS High Line Current Sensing with LPF and
REVISION HISTORY
10/05—Rev. A to Rev. B 2/05—Rev. 0 to Rev. A 10/04—Revision 0: Initial Version
Rev. B | Page 3 of 20 SPECIFICATIONS SINGLE SUPPLY TA = operating temperature range, VS = 5 V , unless otherwise noted. Table 1. AD8203 SOIC AD8203 MSOP AD8203 Die Parameter Conditions Min Typ Max Min Typ Max Min Typ Max Unit SYSTEM GAIN Initial 14 14 14 V/V vs. Temperature 1 20 1 25 1 30 ppm/°C VOLTAGE OFFSET Input Offset (RTI) VCM = 0.15 V; 25°C −1 +1 −2 +2 −1 +1 mV vs. Temperature −40°C to +125°C −10 +0.3 +10 −20 +2 +20 −10 +0.3 +10 μV/°C INPUT Input Impedance Differential 260 320 380 260 320 380 260 320 380 kΩ Common Mode 130 160 190 130 160 190 130 160 190 kΩ CMV Continuous −6 +30 −6 +30 −6 +30 V CMRR1 VCM = −6 V to +30 V f = dc 82 82 82 dB f = 1 kHz 82 82 82 dB f = 10 kHz2 80 80 80 dB PREAMPLIFIER Gain 7 7 7 V/V Output Resistance 97 100 103 97 100 103 97 100 103 kΩ OUTPUT BUFFER Gain 2 2 2 V/V Input Bias Current 40 40 40 nA Output Resistance 2 2 2 Ω DYNAMIC RESPONSE System Bandwidth VIN = 0.01 V p-p, VOUT = 0.14 V p-p 40 60 40 60 40 60 kHz Slew Rate VIN = 0.28 V, VOUT = 4 V step 0.33 0.33 0.33 V/μs NOISE
0.1 Hz to 10 Hz 10 10 10 μV p-p
Spectral Density, 1 kHz (RTI) 300 300 300 nV/√Hz POWER SUPPLY Operating Range 3.5 12 3.5 12 3.5 12 V Quiescent Current vs. Temperature PSRR VS = 3.5 V to 12 V 75 83 75 83 75 83 dB TEMPERATURE RANGE For Specified Performance −40 +125 −40 +125 −40 +150 °C 1 Source imbalance <2 Ω. 2 The AD8203 preamplifier exceeds 80 dB CMRR at 10 kHz. However, since the signal is available only by way of a 100 kΩ resistor, even the small amount of pin-to-pin capacitance between Pin 1, Pin 8 and Pin 3, Pin 4 may couple an input common-mode signal larger than the greatly attenuated preamplifier output. The effect of pin- to-pin coupling may be neglected in all applications by using filter capacitors at Node 3.
Rev. B | Page 4 of 20 ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Rating Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Supply Voltage 12.5 V Transient Input Voltage (400 ms) 44 V Continuous Input Voltage (Common Mode) 35 V Reversed Supply Voltage Protection 0.3 V Operating Temperature Range Die −40°C to +150°C SOIC −40°C to +125°C MSOP −40°C to +125°C Storage Temperature −65°C to +150°C Output Short-Circuit Duration Indefinite Lead Temperature Range (Soldering 10 sec) 300°C ESD CAUTION ESD (electrostatic discharge) sensitive device. Electr ostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can disc harge without detection. Although this product features proprietary ESD protection circuitry, pe rmanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
Figure 4. Pin Configuration Table 3. Pin Function Descriptions
6 NC NA NA
Figure 5. Metallization Photograph
Figure 15. CMRR Distribution, Temperature = 25°C Figure 12. Swing Minus Supply vs. Supply Voltage Figure 16. Offset Drift Distribution, MSOP, Figure 13. Pulse Response
0 HITS
Figure 17. Offset Drift Distribution, MSOP,
Figure 21. V Distribution, MSOP, Temperature Range = 25°C to 125°C Distribution, MSOP, Temperature = −40°C Figure 18. VOS OS Figure 22. MSOP Gain Accuracy, Temperature = 25°C Figure 19. V Distribution, MSOP, Temperature = 25°C OS Figure 20. V Distribution, MSOP, Temperature = 125°C Figure 23. MSOP Gain Accuracy, Temperature = 125°C OS
Figure 24. MSOP Gain Accuracy, Temperature = −40°C Figure 27. Gain Drift Distribution, MSOP, Figure 28. V Distribution, SOIC, Temperature = 25°C Figure 25. Gain Drift Distribution, Figure 26. Gain Drift Distribution, MSOP, Figure 29. V Distribution, SOIC, Temperature = 125°C OS
Rev. B | Page 13 of 20 the AD8203 system (Pin 3 and Pin 4 shorted). An example of how to calculate the correct output voltage swing of the AD8203, by taking all variables into account, follows:
- Amplifier A1 output saturation potential can go as low as 20 mV at its output.
- A2 typical input bias current of 40 nA multiplied by the 100 kΩ preamplifier output resistor produces 40 nA × 100 kΩ = 4 mV at the A2 input
- Total voltage at the A2 input equals the output saturation voltage of A1 combined with the voltage error generated by the input bias current 20 mV + 4 mV = 24 mV
- The total error at the input of A2, 24 mV, multiplied by the buffer gain generates a resulting error of 48 mV at the output of the buffer. This is the AD8203 system output low saturation potential.
- The high output voltage range of the AD8203 is specified as 4.8 V. Therefore, assuming a typical A2 input bias current, the output voltage range for the AD8203 is 48 mV to 4.8 V. For an example of the effect of changes in A2 input bias current vs. applied input potentials, see Figure 41. The change in bias current causes a change in error voltage at the input of the buffer amplifier. This results in a change in overall error potential at the output of the buffer amplifier.
Rev. B | Page 14 of 20
APPLICATIONS
10kΩ10kΩ 100kΩ A2 A1GND–IN OUT+VS NC+IN AD8203 OUT +VS REXT VCM VDIFF
2 GAIN =
REXT + 100kΩ REXT = 100kΩ GAIN 14 – GAIN VDIFF NC = NO CONNECT 05013-016 The AD8203 difference amplifier is intended for applications that require extracting a small differential signal in the presence of large common-mode voltages. The input resistance is nominally 320 kΩ, and the device can tolerate common-mode voltages higher than the supply voltage and lower than ground. The open collector output stage sources current to within 20 mV of ground and to within 200 mV of V . S CURRENT SENSING High Line, High Current Sensing Basic automotive applications making use of the large common- mode range are shown in Figure 2 and Figure 3. The capability of the device to operate as an amplifier in primary battery sup- ply circuits is shown in Figure 43. Adjusting for Gains < 14 Figure 2. Figure 3 illustrates the ability of the device to withstand voltages below system ground. the imbalance in source resistances at the input to the buffer. Figure 42. In such low impedance side of the input corrects this error. offset nulling resistor is 50 kΩ. 100 kΩ); for example, the gain is doubled for REXT = 200 kΩ. A1) limits the part’s use in high gain, dc-coupled applications. Figure 42. 4 to 20 mA Current Loop Receiver lowered, raised, or finely calibrated.
0.65 BSC
1.10 MAX
Figure 53. 8-Lead Standard Small Outline Package [SOIC_N] Figure 52. 8-Lead Mini Small Outline Package [MSOP]
Rev. B | Page 18 of 20 NOTES
Rev. B | Page 19 of 20 NOTES
Rev. B | Page 20 of 20 NOTES © 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05013-0-10/05(B)