AD8002AR-REEL

AD8002 AD | Alldatasheet

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REV. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. a AD8002 Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 1999 Dual 600 MHz, 50 mW Current Feedback Amplifier

FEATURES

Excellent Video Specifications (R L = 150 V, G = +2) Gain Flatness 0.1 dB to 60 MHz 0.01% Differential Gain Error

0.028 Differential Phase Error

5.5 mA/Amp Max Power Supply Current (55 mW) High Speed and Fast Settling

600 MHz, –3 dB Bandwidth (G = +1)

500 MHz, –3 dB Bandwidth (G = +2)

1200 V/ ms Slew Rate

16 ns Settling Time to 0.1% Low Distortion –65 dBc THD, f C = 5 MHz 33 dBm 3rd Order Intercept, F 1 = 10 MHz –66 dB SFDR, f = 5 MHz –60 dB Crosstalk, f = 5 MHz High Output Drive Over 70 mA Output Current Drives Up to Eight Back-Terminated 75 V Loads (Four Loads/Side) While Maintaining Good Differential Gain/Phase Performance (0.01%/0.17 8) Available in 8-Lead Plastic DIP, SOIC and mSOIC Packages

APPLICATIONS

8-Lead Plastic DIP, SOIC and mSOIC OUT1 –IN1 +IN1 OUT2 –IN2 +IN2 AD8002 PRODUCT DESCRIPTION The AD8002 is a dual, low power, high speed amplifier de- signed to operate on – 5 V supplies. The AD8002 features unique transimpedance linearization circuitry. This allows it to drive video loads with excellent differential gain and phase per- formance on only 50 mW of power per amplifier. The AD8002 is a current feedback amplifier and features gain flatness of 0.1 dB to 60 MHz while offering differential gain and phase error of 0.01% and 0.02°. This makes the AD8002 ideal for professional video electronics such as cameras and video switchers. Addition- ally, the AD8002’s low distortion and fast settling make it ideal for buffer high speed A-to-D converters. The AD8002 offers low power of 5.5 mA/amplifier max (V S = – 5 V) and can run on a single +12 V power supply, while ca- pable of delivering over 70 mA of load current. It is offered in an 8-lead plastic DIP, SOIC and mSOIC package. These features make this amplifier ideal for portable and battery powered appli- cations where size and power is critical. The outstanding bandwidth of 600 MHz along with 1200 V/ ms of slew rate make the AD8002 useful in many general purpose high speed applications where dual power supplies of up to – 6 V and single supplies from 6 V to 12 V are needed. The AD8002 is available in the industrial temperature range of –40°C to +85 °C. 1M 10M 1G 100M –0.5 –0.1 –0.2 –0.3 –0.4 0.1 NORMALIZED FLATNESS – dB FREQUENCY – Hz NORMALIZED FREQUENCY RESPONSE – dB G = +2 RL = 100V VIN = 50mV SIDE 1 SIDE 2 SIDE 1 SIDE 2 Figure 1. Frequency Response and Flatness, G = +2 Figure 2. 1 V Step Response, G = +1

REV. C–2– AD8002–SPECIFICATIONS(@ TA = + 258C, VS = 65 V, RL = 100 V, RC 1 = 75 V, unless otherwise noted) Model AD8002A Conditions Min Typ Max Units DYNAMIC PERFORMANCE –3 dB Small Signal Bandwidth, N Package G = +2, R F = 750 W 500 MHz G = +1, RF = 1.21 kW 600 MHz R Package G = +2, R F = 681 W 500 MHz G = +1, RF = 953 W 600 MHz G = +1, RF = 1 kW 600 MHz Bandwidth for 0.1 dB Flatness N Package G = +2, R F = 750 W 60 MHz R Package G = +2, R F = 681 W 90 MHz Slew Rate G = +2, V O = 2 V Step 700 V/ ms G = –1, VO = 2 V Step 1200 V/ ms Settling Time to 0.1% G = +2, V O = 2 V Step 16 ns Rise & Fall Time G = +2, V O = 2 V Step, RF = 750 W 2.4 ns NOISE/HARMONIC PERFORMANCE Total Harmonic Distortion f C = 5 MHz, VO = 2 V p-p –65 dBc G = +2, RL = 100 W Crosstalk, Output to Output f = 5 MHz, G = +2 –60 dB Input Voltage Noise f = 10 kHz, R C = 0 W 2.0 nV/ ÖHz Input Current Noise f = 10 kHz, +In 2.0 pA/ ÖHz –In 18 pA/ ÖHz Differential Gain Error NTSC, G = +2, R L = 150 W 0.01 % Differential Phase Error NTSC, G = +2, R L = 150 W 0.02 Degree Third Order Intercept f = 10 MHz 33 dBm 1 dB Gain Compression f = 10 MHz 14 dBm SFDR f = 5 MHz –66 dB DC PERFORMANCE Input Offset Voltage 2.0 6 mV TMIN–TMAX 2.0 9 mV Offset Drift 10 mV/°C –Input Bias Current 5.0 25 –m A TMIN–TMAX 35 –m A +Input Bias Current 3.0 6.0 –m A TMIN–TMAX 10 –m A Open Loop Transresistance V O = – 2.5 V 250 900 k W TMIN–TMAX 175 k W INPUT CHARACTERISTICS Input Resistance +Input 10 M W –Input 50 W Input Capacitance +Input 1.5 pF Input Common-Mode Voltage Range 3.2 – V Common-Mode Rejection Ratio Offset Voltage V CM = – 2.5 V 49 54 dB –Input Current V CM = – 2.5 V, TMIN–TMAX 0.3 1.0 mA/V +Input Current V CM = – 2.5 V, TMIN–TMAX 0.2 0.9 mA/V OUTPUT CHARACTERISTICS Output Voltage Swing R L = 150 W 2.7 3.1 – V Output Current2 70 mA Short Circuit Current 2 85 110 mA POWER SUPPLY Operating Range – 3.0 – 6.0 V Quiescent Current/Both Amplifiers T MIN–TMAX 10.0 11.5 mA Power Supply Rejection Ratio +V S = +4 V to +6 V, –VS = –5 V 60 75 dB –VS = – 4 V to –6 V, +VS = +5 V 49 56 dB –Input Current T MIN–TMAX 0.5 2.5 mA/V +Input Current T MIN–TMAX 0.1 0.5 mA/V NOTES 1RC is recommended to reduce peaking and minimize input reflections at frequencies above 300 MHz. However, R C is not required. 2Output current is limited by the maximum power dissipation in the package. See the power derating curves. Specifications subject to change without notice.

conditions for extended periods may affect device reliability. due to a change in the stresses exerted on the die by the package. period can result in device failure. Figure 3. Plot of Maximum Power Dissipation vs. accumulate on the human body and test equipment and can discharge without detection. precautions are recommended to avoid performance degradation or loss of functionality.

Figure 10. Frequency Response and Flatness, G = +2 Figure 11. Distortion vs. Frequency, G = +2, R L = 100 W Figure 12. Distortion vs. Frequency, G = +2, R L = 1 kW Figure 13. Crosstalk (Output-to-Output) vs. Frequency Figure 14. Pulse Crosstalk, Worst Case, 1 V Step

2 BACK TERMINATED

1 BACK TERMINATED

Figure 15. Differential Gain and Differential Phase

Figure 46. AD8002 Driving a Dual A-to-D Converter consumption while not limiting the performance of the circuit.

*RC is recommended to reduce peaking and minimizes input reflections at frequencies above 300 MHz. However, R C is not required. careful attention to board layout and component selection. from the area near the input pins to reduce stray capacitance. for fast, large-signal changes at the output. ing input will significantly affect high speed performance. Figure 49. Inverting and Noninverting Configurations

Figure 50. Board Layout (Silkscreen)

Figure 51. Board Layout (Component Layer)

Figure 52. Board Layout (Solder Side) (Looking Through the Board)

REV. C AD8002 –18– OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 8-Lead Plastic DIP (N-8) SEATING PLANE 0.060 (1.52) 0.015 (0.38)0.210 (5.33) MAX 0.022 (0.558) 0.014 (0.356) 0.160 (4.06) 0.115 (2.93) 0.070 (1.77) 0.045 (1.15) 0.130 (3.30) MIN PIN 1 0.280 (7.11) 0.240 (6.10) 0.100 (2.54) BSC 0.430 (10.92) 0.348 (8.84) 0.195 (4.95) 0.115 (2.93) 0.015 (0.381) 0.008 (0.204) 0.325 (8.25) 0.300 (7.62) 8-Lead SOIC (SO-8) 0.1968 (5.00) 0.1890 (4.80) 0.2440 (6.20) 0.2284 (5.80) PIN 1 0.1574 (4.00) 0.1497 (3.80) 0.0500 (1.27) BSC 0.0688 (1.75) 0.0532 (1.35) SEATING PLANE 0.0098 (0.25) 0.0040 (0.10) 0.0192 (0.49) 0.0138 (0.35) 0.0098 (0.25) 0.0075 (0.19) 0.0500 (1.27) 0.0160 (0.41) 0.0196 (0.50) 0.0099 (0.25)3 458 8-Lead mSOIC (RM-8) 0.011 (0.28) 0.003 (0.08) 0.028 (0.71) 0.016 (0.41) 338 278 0.120 (3.05) 0.112 (2.84) 0.122 (3.10) 0.114 (2.90) 0.199 (5.05) 0.187 (4.75) PIN 1 0.0256 (0.65) BSC 0.122 (3.10) 0.114 (2.90) SEATING PLANE 0.006 (0.15) 0.002 (0.05) 0.018 (0.46) 0.008 (0.20) 0.043 (1.09) 0.037 (0.94) 0.120 (3.05) 0.112 (2.84) C2004b–0–7/99PRINTED IN U.S.A.