AD8000_V01 AD | Alldatasheet
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Technical content
1.5 GHz, Ultrahigh Speed Op Amp
Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no re- sponsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Tel: 781.329.4700 ©2005–2016 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com
FEATURES
1.5 GHz, −3 dB bandwidth (G = +1)
650 MHz, full power bandwidth (G = +2, VO = 2 V p-p)
Slew rate: 4100 V/μs 0.1% settling time: 12 ns Excellent video specifications 0.1 dB flatness: 170 MHz Differential gain: 0.02% Differential phase: 0.01° Output overdrive recovery: 22 ns Low noise: 1.6 nV/√Hz input voltage noise Low distortion over wide bandwidth 75 dBc SFDR at 20 MHz 62 dBc SFDR at 50 MHz Input offset voltage: 1 mV typical High output current: 100 mA Wide supply voltage range: 4.5 V to 12 V Supply current: 13.5 mA Power-down mode
APPLICATIONS
High speed instrumentation Video switching IF/RF gain stage CCD imaging GENERAL DESCRIPTION The AD8000 is an ultrahigh speed, high performance, current feedback amplifier. Using Analog Devices, Inc., proprietary eXtra Fast Complementary Bipolar (XFCB) process, the ampli- fier can achieve a small signal bandwidth of 1.5 GHz and a slew rate of 4100 V/μs. The AD8000 has low spurious-free dynamic range (SFDR) of 75 dBc at 20 MHz and input voltage noise of 1.6 nV/√Hz. The AD8000 can drive over 100 mA of load current with minimal distortion. The amplifier can operate on +5 V to ±6 V . These specifications make the AD8000 ideal for a variety of applica- tions, including high speed instrumentation. With a differential gain of 0.02%, differential phase of 0.01°, and 0.1 dB flatness out to 170 MHz, the AD8000 has excellent video specifications, which ensure that even the most demanding video systems maintain excellent fidelity. CONNECTION DIAGRAMS 05321-001 POWER DOWN FEEDBACK –IN +IN OUTPUT +VS NC –VS AD8000 TOP VIEW (Not to Scale) NOTES 1. NC = NO CONNECT. 2. THE EXPOSED PADDLE IS CONNECTED TO GROUND. Figure 1. 8-Lead AD8000, 3 mm × 3 mm LFCSP (CP-8-13)
- THE EXPOSED PADDLE IS CONNECTED TO GROUND.
Figure 2. 8-Lead AD8000 SOIC_N_EP (RD-8-1) over the extended industrial temperature range (−40°C to +125°C). A triple version of the AD8000 (AD8003) is underdevelopment. Figure 3. Large Signal Frequency Response
Rev. C | Page 2 of 17 TABLE OF CONTENTS
REVISION HISTORY
5/16—Rev. B to Rev. C 3/13—Rev. A to Rev. B 3/10—Rev. 0 to Rev. A 1/05—Rev. 0: Initial Version
Rev. C | Page 3 of 17 SPECIFICATIONS WITH ±5 V SUPPLY At TA = 25°C, VS = ±5 V , RL = 150 Ω, Gain = +2, RF = RG = 432 Ω, unless otherwise noted. Connect the exposed paddle to ground. Table 1. Parameter Test Conditions/Comments Min Typ Max Unit DYNAMIC PERFORMANCE −3 dB Bandwidth G = +1, VO = 0.2 V p-p, SOIC/LFCSP 1580/1350 MHz G = +2, VO = 2 V p-p, SOIC/LFCSP 650/610 MHz Bandwidth for 0.1 dB Flatness VO = 2 V p-p, SOIC/LFCSP 190/170 MHz Slew Rate G = +2, VO = 4 V step 4100 V/μs Settling Time to 0.1% G = +2, VO = 2 V step 12 ns NOISE/HARMONIC PERFORMANCE Second/Third Harmonic VO = 2 V p-p, f = 5 MHz, LFCSP only 86/89 dBc Second/Third Harmonic VO = 2 V p-p, f = 20 MHz, LFCSP only 75/79 dBc Input Voltage Noise f = 100 kHz 1.6 nV/√Hz Input Current Noise f = 100 kHz, −IN 26 pA/√Hz f = 100 kHz, +IN 3.4 pA/√Hz Differential Gain Error NTSC, G = +2 0.02 % Differential Phase Error NTSC, G = +2 0.01 Degree DC PERFORMANCE Input Offset Voltage 1 10 mV Input Offset Voltage Drift 11 μV/°C Input Bias Current (Enabled) +IB −5 +4 μA −I B −3 +45 μA Transimpedance 570 890 1600 kΩ INPUT CHARACTERISTICS Noninverting Input Impedance 2/3.6 MΩ/pF Input Common-Mode Voltage Range −3.5 to +3.5 V Common-Mode Rejection Ratio VCM = ±2.5 V −52 −54 −56 dB Overdrive Recovery G = +1, f = 1 MHz, triangle wave 30 ns POWER DOWN PIN Power-Down Input Voltage Power-down < +VS – 3.1 V Enabled > +VS – 1.9 V Turn-Off Time 50% of power-down voltage to 10% of VOUT final, VIN = 0.3 V p-p 150 ns Turn-On Time 50% of power-down voltage to 90% of VOUT final, VIN = 0.3 V p-p 300 ns Input Bias Current Enabled −1.1 +0.17 +1.4 μA Power-Down −300 −235 −160 μA OUTPUT CHARACTERISTICS Output Voltage Swing RL = 100 Ω ±3.7 ±3.9 V Output Voltage Swing RL = 1 kΩ ±3.9 ±4.1 V Linear Output Current VO = 2 V p-p, second HD < −50 dBc 100 mA Overdrive Recovery G = + 2, f = 1 MHz, triangle wave 45 ns G = +2, VIN = 2.5 V to 0 V step 22 ns POWER SUPPLY Operating Range 4.5 12 V Quiescent Current 12.7 13.5 14.3 mA Quiescent Current (Power-Down) 1.1 1.3 1.65 mA Power Supply Rejection Ratio −PSRR/+PSRR −56/−61 −59/−63 dB
Rev. C | Page 4 of 17 SPECIFICATIONS WITH +5 V SUPPLY At TA = 25°C, VS = 5 V , RL = 150 Ω, Gain = +2, RF = RG = 432 Ω, unless otherwise noted. Connect the exposed paddle to ground. Table 2. Parameter Test Conditions/Comments Min Typ Max Unit DYNAMIC PERFORMANCE −3 dB Bandwidth G = +1, VO = 0.2 V p-p 980 MHz G = +2, VO = 2 V p-p 477 MHz G = +10, VO = 0.2 V p-p 328 MHz Bandwidth for 0.1 dB Flatness VO = 0.2 V p-p 136 MHz V O = 2 V p-p 136 MHz Slew Rate G = +2, VO = 2 V step 2700 V/μs Settling Time to 0.1% G = +2, VO = 2 V step 16 ns NOISE/HARMONIC PERFORMANCE Second/Third Harmonic VO = 2 V p-p, 5 MHz, LFCSP only 71/71 dBc Second/Third Harmonic VO = 2 V p-p, 20 MHz, LFCSP only 60/62 dBc Input Voltage Noise f = 100 kHz 1.6 nV/√Hz Input Current Noise f = 100 kHz, −IN 26 pA/√Hz f = 100 kHz, +IN 3.4 pA/√Hz Differential Gain Error NTSC, G = +2 0.01 % Differential Phase Error NTSC, G = +2 0.06 Degree DC PERFORMANCE Input Offset Voltage 1.3 10 mV Input Offset Voltage Drift 18 μV/°C Input Bias Current (Enabled) +IB −5 +3 μA −I B −1 +45 μA Transimpedance 440 800 1500 kΩ INPUT CHARACTERISTICS Noninverting Input Impedance 2/3.6 MΩ/pF Input Common-Mode Voltage Range 1.5 to 3.6 V Common-Mode Rejection Ratio VCM = ±2.5 V −51 −52 −54 dB Overdrive Recovery G = +1, f = 1 MHz, triangle wave 60 ns POWER DOWN PIN Power-Down Input Voltage Power-down < +VS − 3.1 V Enable > +VS − 1.9 V Turn-Off Time 50% of power-down voltage to 10% of VOUT final, VIN = 0.3 V p-p 200 ns Turn-On Time 50% of power-down voltage to 90% of VOUT final, VIN = 0.3 V p-p 300 ns Input Current Enabled −1.1 +0.17 +1.4 μA Power-Down −50 −40 −30 μA OUTPUT CHARACTERISTICS Output Voltage Swing RL = 100 Ω 1.1 to 3.9 1.05 to 4.1 V R L = 1 kΩ 1 to 4.0 0.85 to 4.15 V Linear Output Current VO = 2 V p-p, second HD < −50 dBc 70 mA Overdrive Recovery G = +2, f = 100 kHz, triangle wave 65 ns POWER SUPPLY Operating Range 4.5 12 V Quiescent Current 11 12 13 mA Quiescent Current (Power-Down) 0.7 0.95 1.25 mA Power Supply Rejection Ratio −PSRR/+PSRR −55/−60 −57/−62 dB
this distortion significantly, as seen in Figure 22. parasitics and increase stability. take full advantage of the performance offered by the AD8000. Pin 6 can still be used for the feedback resistor. the same type of pad geometry can be applied to the SOIC package. vias improve the thermal transfer from the package to the PCB. thermal resistance seen by the AD8000. Figure 53. LFCSP Exposed Paddle Layout be addressed to ensure optimal performance. input, which greatly simplifies the routing of the feedback network. formation of parasitic capacitors, which degrades phase margin. layers of the PCB, which can provide maximum shielding. need to be properly bypassed. important for minimizing the coupling of noise into the amplifier. capacitors can be used, depending on the circuit requirements. but are not always necessary. but equal from the load, is optimal for performance.
Rev. C | Page 16 of 17 In some cases, bypassing between the two supplies can help to improve PSRR and to maintain distortion performance in crowded or difficult layouts. This is as another option to improve performance. Minimizing the trace length and widening the trace from the capacitors to the amplifier reduce the trace inductance. A series inductance with the parallel capacitance can form a tank circuit, which can introduce high frequency ringing at the output. This additional inductance can also contribute to increased distor- tion due to high frequency compression at the output. Minimize the use of vias in the direct path to the amplifier power supply pins because vias can introduce parasitic inductance, which can lead to instability. When required, use multiple large diameter vias because this lowers the equivalent parasitic inductance. GROUNDING The use of ground and power planes is encouraged as a method of proving low impedance returns for power supply and signal currents. Ground and power planes can also help to reduce stray trace inductance and to provide a low thermal path for the amplifier. Do not use ground and power planes under any of the pins of the AD8000. The mounting pads and the ground or power planes can form a parasitic capacitance at the amplifiers input. Stray capacitance on the inverting input and the feedback resistor form a pole, which degrades the phase margin, leading to instability. Excessive stray capacitance on the output also forms a pole, which degrades phase margin.
0.10 MAX
0.05 NOM
3.81 REF
1.04 REF
1.27 BSC
Figure 54. 8-Lead Standard Small Outline Package, with Exposed Pad [SOIC_N_EP]
0.203 REF
0.05 MAX
0.02 NOM
0.50 BSC
Figure 55. 8-Lead Lead Frame Chip Scale Package [LFCSP] registered trademarks are the prop erty of their respective owners.