AD7520

AD7520_15 AD | Alldatasheet

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-..ANALOG W DEVICES CMOS 10-& 12-BitMonolithic MultiplyingOfA Converters AD7520/AD7521I 1.1 Scope. This specificationcoversthe detailrequirementsfora 10-and a 12-bitmonolithicCMOS multiplying digital-to-analogconverters. 1.2 Part Number. The complete partnumbers per Tables 1 and 2 of thisspecificationare as follows: 1.2.3Case Outline. SeeAppendix 1ofGeneralSpecificationADI-M-lOOO:packageoutline:Q-16-AD7520 Q-18-AD7521 1.3 Absolute Maximum Ratings.(TA = 25°Cunlessotherwisenoted) VootoGND +17V VREFtOGND ::!:25V DigitalInput VoltageRange VootoGND Output Voltage(Pins1 and 2) -IOOmVtoVoo Power Dissipation Upto+75°C 450mW Deratesabove+75°C 6mW/oC DigitalInput VoltageRange VootoGND 1.5 Thermal Characteristics. Thermal Resistance alC = 35°C/W forQ-16 or Q-18 alA = 120°C/WforQ-16orQ-18 REV.B 401~-- Device PartNumber -I AD7520SQ/883B AD7521 SQ/883B -2 AD7520TQ/883B AD7521 TQ/883B -3 AD7520UQ/883B AD7521 UQ/883B OBSOLETE

AD1520/AD7521SPECIFICATIONS NOTES 'VREF= + tOY, unlessotherwisestated. 2Thesedesignlimitsare + 25°C only. 3Feedthrough errorcan be furtherminimized by connecting themetal lidtoground. Table1. REV.B 402 ,- " AD7520 Design Sub Sub Sub Limit Group Group Group Test ConditionI Test Symbol Device T min-T max 1 2,3 4 VDD= +15V Units Resolption IRES -1,2,3 10 1 Bits, II- RelativeAccuracy ilRA -1 2 2 2 .. :tLSB Max -2 1 2 1 1I -3 1/2 2 1/2 1/2 NonlinearityT empco TCNL -1,2,3 2 :tppnifC Max Gain Tempco TCAE -1,2,3 20 :tppnifC Max Output Leakage Current Pin 1 lOUT! -1,2,3 200 200 200 DigitalInputs=VIL. :tnA Max Pin2 ' loUTI -1,2,3 200 200 200 DigitalInputs= VIH. :tnA Max Output CurrentSettlingTime2 tSL -1,2,3 500 To :t1/2LSB. AllDigitalInputs osMax VILto Vm and Vm toVIL. Feedthrough Erro,3 FT -1,2,3 30 VREF=20Vp-p,lookHz,All mVp-pmax DigitalInput=VIL. ReferenceInputResistance RIN -1,2,3 5 5 5 kO min 20 20 20 MeasuredatPin 15. kO Max DigitalInputHigh Voltage VIH -1,2,3 2.4 2.4 2.4 Vmin DigitalInputLow Voltage VIL -1,2,3 0.8 0.8 0.8 Vmax DigitalInputLeakage Current IIN -1,2,3 1.0 :tj.LAMax Output Capacitance Pin 1 COUT! -1,2,3 120 AllDigitalInputsV m. pF Max Pin 2 COUTI -1,2,3 37 AllDigitalInputsV IH. pF Max Pin 1 CoU"rI -1,2,3 37 AllDigitalInputsVIL. pF Max Pin 2 COUTI -1,2,3 120 AllDigitalInputsVIL. pF Max Supply Currentfrom V DD IDD -1,2,3 2 2 2 AllDigitalInputsVIL orVm. mA Max OBSOLETE

IV REF = + lOV, unlessotherwisestated. 2These design limits are + 25°C only- 3Feedthrough error can be further minimized by connecting the metal lidto ground- Table2, REV,B AD7521 Design Sub Sub Sub Limit Group Group Group Test Condition1 Test Symbol Device TIJIin-Tmax 1 2,3 4 Voo= + lSV Units Resolution RES -1,2,3 12 Bits RelativeAccuracy RA -I 8 8 8 :tLSB max -2 4 8 4 4 -3 2 8 2 2 NonlinearityTempco TCNL -1,2,3 2 :tppm/°C max Gain Tempco TCAE -1,2,3 20 :tppm/°C max Output Leakage Current Pin 1 lOUT! -1,2,3 200 200 200 DigitalInputs= V IL.- :tnA max Pin2 IouT2 -1,2,3 200 200 200 DigitalInputs= V1H- :tnA max Output CurrentSettlingTime2 tSL -1,2,3 500 To :t1/2LSB. AllDigitalInputs nsmax V1L to VIH and VIH tOV1L- Feedthrough Error2,3 FT -1,2,3 30 V REF = 20V pop,100kHz, All m V popmax DigitalInput= V1L- ReferenceInputResistance RIN -1,2,3 5 5 5 kilmin 20 20 20 Measured atPin 17- kilmax DigitalInputHigh Voltage VIH -1,2,3 2.4 2.4 2.4 Vmin DigitalInputLow Voltage V1L -1,2,3 0,8 0,8 0,8 Vmax DigitalInputLeakage Current IIN -1,2,3 1.0 :t !-LA max Output Capacitance Pin 1 COOT! -1,2,3 120 AllDigitalInputsV IH- pFmax Pin2 COUT2 -1,2,3 37 AllDigitalInputsV IH' pFmax Pin 1 COOT! -1,2,3 37 AllDigitalInputsV IL' pF max Pin 2 COUT2 -1,2,3 120 AllDigitalInputsV IL. pF max Supply Currentfrom VDD IDD -1,2,3 2 2 2 AllDigitalInputsV1L orVIH- mAmax OBSOLETE

3.2.1FunctionalBlockDiagram andTerminalAssignments. VREF 101e 101e101e 2Ok 2Ok 201e 2Ok loon louT1 I I I I L JvvI 0 0 0 0 BIT 1 (MSB) BIT2 BIT3 BITN (LSB) AD7520: DIGITAL INPUTS (DTUTTL/CMOS COMPATIBLE) AD7521: BIT 1 (MSB) I4 BIT 2 BIT 4 3.2.4MicrocircuitTechnologyGroup. Thismicrocircuitiscoveredby technologygroup(80). RFEEDBACK N=10 N=12 BIT 1 (MSBII 4 BIT 12 (LSB) 4.2.1LifeTestIBurn-InCircuit. SteadystatelifetestisperMIL-STD-883 Method 1005.Bum-in isperMIL-STD-883 Method 1015 testcondition(B). DATA AD7520 loun +15V +10V STANDARD BURN.IN-DATA LINE IS+15V 100k --ONE PER BOARD DATA 404 AD7521 100k ":" "-ONEPERBOARD STANDARD BURN.IN-DATA LINE IS +15V +10V +15V REV.B OBSOLETE

-..ANALOG W DEVICES I

FEATURES

AD7520: 10-BitResolution AD7521: 12-BitResolution End PointLinearity:8-,9-and 10-Bit NonlinearityTempco: 2ppm of FSRfc Low Power Dissipation:2OmW CurrentSettlingTime: 5OOns FeedthroughError:1/2LSB @ 100kHz TTL/DTL/CMOS Compatible Note: AD7533 i.recommended fornew 10-bitdesigns. AD7541A or AD7545 isrecommended fornew 12-bitdesigns. GENERAL DESCRIPTION The AD7520 (AD752I) isa low cost,monolithic to-bit (12-bit)multiplying digital-to-analogconverterpackaged in a I6-pin (I8-pin)DIP. The devicesuse advanced CMOS and thin fdm technologiesprovidingup to to-bitaccuracy with TTL/ DTL/CMOS compatibility. The AD7520 (AD7521) operatesfrom +5V to +15V supply and dissipatesonly 20mW, includingthe laddernetwork. Typical AD7520 (AD752I) applicationsinclude:digital/ analog multiplication,CRT charactergeneration,program- mable power supplies,digitallycontrolledgain circuits,etc.

ORDERING INFORMATION

CMOS 10- & 12-BitMonolithic Multiplying0/A Converters AD7520,AD7521I AD7520, AD752I FUNCTIONAL BLOCK DIAGRAM VREF 101< 101<101< 2Ok 201< 201< 201< 20k IoUT2 louT1 101< RFEEDBACK DIGITAL INPUTS (DTL/TTl/CMOS COMPATIBLE) AD7520: AD752I: Logic: N=10 N=12 A switch isclosed to 'oUTl for its digitalinput in a "HIGH" state. PIN CONFIGURATIONS BIT 1 IMSBJ I4 BIT 10 IlSBI BIT 1 CMSBI BIT 12 IlSBI 16-PIN DIP PACKAGE IDENTIFICATION 1 SuffixD: Ceramic DIP Package AD7520: (DI6B) AD752I: (DI8B) 18-PIN DIP SuffixN: PlasticDIP Package AD7520 (NI6B) AD752I (NI8B) 1 See Section 19 forpackage outlineinformation. Nonlinearity TemperatUre Range 0 to +70oC -25°C to +85°C -55°C to +125°C 0.2% (8-Bit) AD7520JN AD7520JD AD7520SD AD7521JN AD7521JD AD7521SD 0.1% (9-Bit) AD7520KN AD7520KD AD752OTD AD7521KN AD7521KD AD7521TD 0.05% (lo-Bit) AD7520LN AD7520LD AD7520UD AD7521LN AD7521LD AD7521UD OBSOLETE

SPECIFICAJIONS (Voo=+15,VREF= +10V,TA = +25°Cunlessotherwisenoted) PARAMETER TEST CONDITIONSAD7520 AD7521 DC ACCURACY! Resolution RelativeAccuracy (See Figure 5) Nonlineari7 TempcoGain Error Gain Error Tempc02 Output Leakage Current (eitheroutput) Power Supply Rejection (See Figure 6) AC ACCURACY Output Current SettlingTime (See Figure 10) . 4 Feedthrough Error (See Figure 9)

10 Bits 12 Bits

S,T,U: over -55°C to +125°C -10V~VREF~+10V -10V~VREF~+ 10V -10V~VREF~+10V -lOV~VREF~+lOV Over specifiedtemperature range To 0.05% of FSR All digitalinputs low to high and high to low VREF = 20V p-p, 100kHz All digitalinputs low REFERENCE INPUT Input Resistance3 J, 0.2% of FSR max (8 Bit) . S, 0.2% of FSR max (8 Bit) . K, 0.1% of FSR max (9 Bit) . T, 0.1% of FSR max (9 Bit) . L, 0.05% of FSR max (10 Bit) . U, 0.05% of FSR max (10 Bit) . 2ppm of FSR/ C max . 0.3% of FSR ty~ . lOppm of F!)R/ C max . 200nA max 50ppm of FSR/% typ ANALOG OUTPUT Output Capacitance (See Figure 8) 'oun 'oun 'oun 'oun Output Noise (both outputs) (See Figure 7) DIGITAL INPUTS5 Low StateThreshold High State Threshold Input Current (low to high state) Input Coding POWER REQUIREMENTS Power Supply Voltage Range IDD Total Dissipation(Includingladder) 500ns typ . All digitalinputs high All digitalinputs high All digitalinputs low All digitalinputs low Over specifiedtemperature range Over specifiedtemperature range Over specifiedtemperature range See Tables I & IIunder Applications All digitalinputs at GND All digitalinputs high or low 10m V p-p max . 5kil min 10kil typ 20kil max ..* NOTES I Fullscalerange (FSR) is 10V for unipolar mode and :t10V for bipolarmode.

2 Using the internalRFEEDBACK

3 Ladder and feedback resistortemp co isapproximately -1 SOppmf C. 4To minimize feedthrough with the ceramic package, the user must ground the metal lid.If the lid isnot grounded, then the feedthrough is lOmV typical and 3OmV maximum. sDigital input levelsshould not go below ground or exceed the positive supply voltage, otherwise damage may occur. Specifications subject to,change without notice. 120pF typ 37pF typ 37pF typ 120pF typ Equivalent to 10kil typ Johnson noise 0.8V max 2.4V min 1JlA typ Binary +5V to +15V 5nA typ 2mA max 20mW typ VOL. I,9-154 DIGITAL-TO-ANALOG CONVERTERS OBSOLETE

1. Do not apply voltageshigher than VDD or lessthan
2. The digitalcontrol inputs are zener protected;however,

in conductive foam at alltimes. Figure 2. Supply Current vs. Temperature

Note: The following testcircuitsapply for the AD7S20. Similar circuitscan be used for the AD7S 21.

10 BIT

12 BIT

Figure 5. RelativeAccuracy Figure 6. Power Supply Rejection Figure 7. Noise

5 AD7520 1~

scalerange or (sub)multiplesof lLSB. [V REF]' Resolution in no way implieslinearity. input stimulus,i.e.,0 to Full Scale. voltageto the input voltage. coupling from VREF to output with allswitches OFF. terminalwhen allinputs are HIGH.

Figure 20. Analog/DigitalDivider This isdivisionof an analog variable(VIN) by a digitalword. gain is1024. With allbitsON, the gain isI (:tlLSB).