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REV. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. a LC2MOS Octal 8-Bit DAC AD7228A Tel: 617/329-4700 Fax: 617/326-8703 FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS 1. Eight DACs and Amplifiers in Small Package The single-chip design of eight 8-bit DACs and amplifiers al- lows a dramatic reduction in board space requirements and offers increased reliability in systems using multiple convert- ers. Its pinout is aimed at optimizing board layout with all analog inputs and outputs at one side of the package and all digital inputs at the other. 2. Single or Dual Supply Operation The voltage-mode configuration of the DACs allows single supply operation of the AD7228A. The part can also be oper- ated with dual supplies giving enhanced performance for some parameters. 3. Microprocessor Compatibility The AD7228A has a common 8-bit data bus with individual DAC latches, providing a versatile control architecture for simple interface to microprocessors. All latch enable signals are level triggered and speed compatible with most high per- formance 8-bit microprocessors.

FEATURES

Eight 8-Bit DACs with Output Amplifiers Operates with Single +5 V, +12 V or +15 V or Dual Supplies mP Compatible (95 ns WR Pulse) No User Trims Required Skinny 24-Pin DlPs, SOIC, and 28-Terminal Surface Mount Packages GENERAL DESCRIPTION The AD7228A contains eight 8-bit voltage-mode digital-to- analog converters, with output buffer amplifiers and interface logic on a single monolithic chip. No external trims are required to achieve full specified performance for the part. Separate on-chip latches are provided for each of the eight D/A converters. Data is transferred into the data latches through a common 8-bit TTL/CMOS (5 V) compatible input port. Ad- dress inputs A0, A1 and A2 determine which latch is loaded when WR goes low. The control logic is speed compatible with most 8-bit microprocessors. Specified performance is guaranteed for input reference voltages from +2 to +10 V when using dual supplies. The part is also specified for single supply +15 V operation using a reference of +10 V and single supply +5 V operation using a reference of +1.23 V. Each output buffer amplifier is capable of developing +10 V across a 2 kΩ load. The AD7228A is fabricated on an all ion-implanted, high- speed, Linear Compatible CMOS (LC 2MOS) process which has been specifically developed to integrate high-speed digital logic circuits and precision analog circuits on the same chip.

REV. A–2– AD7228A–SPECIFICATIONS (VDD = 10.8 V to 16.5 V; VSS = –5 V 6 10%; GND = 0 V; VREF = +2 V to +10 V1; RL = 2 kΩ , CL = 100 pF unless otherwise noted.) All specifications T MIN to TMAX unless otherwise noted. 5Sample tested at 25 °C to ensure compliance. 6The glitch impulse transferred to the output of one converter (not addressed) due to a change in the digital input code to another addressed converter. Specifications subject to change without notice. (VDD = +15 V 6 10%, VSS; = GND = 0 V; VREF = +10 V, RL = 2 kΩ , CL = 100 pF unless otherwise noted.) AII specifications TMIN to TMAX unless otherwise noted. DUAL SUPPLY BC T U Parameter Version 2 Version Version Version Units Conditions/Comments STATIC PERFORMANCE Resolution 8 8 8 8 Bits Total Unadjusted Error 3 ± 2 ± 1 ± 2 ± 1 LSB max V DD = +15 V ± 10%, VREF = +10 V Relative Accuracy ± 1 ± 1/2 ± 1 ± 1/2 LSB max Differential Nonlinearity ± 1 ± 1 ± 1 ± 1 LSB max Guaranteed Monotonic Full-Scale Error 4 ± 1 ± 1/2 ± 1 ± 1/2 LSB max Typical tempco is 5 ppm/ °C with VREF = +10 V Zero Code Error @ 25°C ± 25 ± 15 ± 25 ± 15 mV max Typical tempco is 30 µV/°C T MIN to TMAX ± 30 ± 20 ± 30 ± 20 mV max Minimum Load Resistance 2 2 2 2 k Ω min V OUT = +10 V REFERENCE INPUT Voltage Range 1 2 to 10 2 to 10 2 to 10 2 to 10 V min/V max Input Resistance 2 2 2 2 k Ω min Input Capacitance 5 500 500 500 500 pF max Occurs when each DAC is loaded with all 1s. AC Feedthrough –70 –70 –70 –7 0 dB typ V REF = 8 V p-p Sine Wave @ 10 kHz DIGITAL INPUTS Input High Voltage, V INH 2.4 2.4 2.4 2.4 V min Input Low Voltage, V INL 0.8 0.8 0.8 0.8 V max Input Leakage Current ± 1 ± 1 ± 1 ± 1 µA max V IN = 0 V or V DD Input Capacitance 5 8 8 8 8 pF max Input Coding Binary Binary Binary Binary DYNAMIC PERFORMANCE 5 Voltage Output Slew Rate 2 2 2 2 V/ µs min Voltage Output Settling Time Positive Full-Scale Change 5 5 5 5 µs max V REF = +10 V; Settling Time to ± 1/2 LSB Negative Full-Scale Change 5 5 5 5 µs max V REF = +10 V; Settling Time to ± 1/2 LSB Digital Feedthrough 50 50 50 50 nV secs typ Code transition all 0s to all 1s. V REF = 0 V; WR = VDD Digital Crosstalk 6 50 50 50 50 nV secs typ Code transition all 0s to all 1s. V REF = +10 V; WR = 0 V POWER SUPPLIES IDD Outputs Unloaded; V IN = VINL or VINH @ 25°C 16 16 16 16 mA max TMIN to TMAX 20 20 22 22 mA max ISS Outputs Unloaded; V IN = VINL or VINH @ 25°C 14 14 14 14 mA max TMIN to TMAX 18 18 20 20 mA max SINGLE SUPPLY STATIC PERFORMANCE Resolution 8 8 8 8 Bits Total Unadjusted Error 3 ± 2 ± 1 ± 2 ± 1 LSB max Differential Nonlinearity ± 1 ± 1 ± 1 ± 1 LSB max Guaranteed Monotonic Minimum Load Resistance 2 2 2 2 k Ω min V OUT = +10 V REFERENCE INPUT Input Resistance 2 2 2 2 k Ω min Input Capacitance 5 500 500 500 500 pF max Occurs when each DAC is loaded with all 1s. DIGITAL INPUTS As per Dual Supply Specifications DYNAMIC PERFORMANCE 5 Voltage Output Slew Rate 2 2 2 2 V/ µs min Voltage Output Settling Time Positive Full-Scale Change 5 5 5 5 µs max Settling Time to ± 1/2 LSB Negative Full-Scale Change 7 7 7 7 µs max Settling Time to ± 1/2 LSB Digital Feedthrough 50 50 50 50 nV secs typ Code transition all 0s to all 1s. V REF = 0 V; WR = VDD Digital Crosstalk 6 50 50 50 50 nV secs typ Code transition all 0s to all 1s. V REF = +10 V, WR = 0 V POWER SUPPLIES IDD Outputs Unloaded; V IN = VINL or VINH @ 25°C 16 16 16 16 mA max TMIN to TMAX 20 20 22 22 mA max NOTES 1VOUT must be less than V DD by 3.5 V to ensure correct operation. 2Temperature ranges are as follows: B, C Versions; –40 °C to +85°C T, U Versions; –55 °C to +125°C 3Total Unadjusted Error includes zero code error, relative accuracy and full-scale error. 4Calculated after zero code error has been adjusted out.

maximum rating conditions for extended periods may affect device reliability. accumulate on the human body and test equipment and can discharge without detection. precautions are recommended to avoid performance degradation or loss of functionality. 1To order MIL-STD-883, Class B processed parts, add /883B to part number. Contact your local sales office for military data sheet and availability. R = Small Outline IC (SOIC). 3These grades will be available to /883B processing only. Figure 3. D/A Simplified Circuit Diagram code and can vary from 0 to 255/256. described in the following section.