AD712_06 AD | Alldatasheet
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Dual Precision, Low Cost, High Speed BiFET Op Amp AD712 Rev. G Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2006 Analog Devices, Inc. All rights reserved.
FEATURES
Enhanced replacement for LF412 and TL082 AC performance Settles to ±0.01% in 1.0 μs
16 V/μs minimum slew rate (AD712J)
3 MHz minimum unity-gain bandwidth (AD712J)
200 V/mV minimum open-loop gain (AD712K)
Surface mount available in tape and reel in accordance with the EIA-481A standard MIL-STD-883B parts available Single version available: AD711 Quad version: AD713 Available in PDIP , SOIC_N, and CERDIP packages CONNECTION DIAGRAM OUTPUT V+ OUTPUT AD712 AMPLIFIER NO. 2AMPLIFIER NO. 1 INVERTING INPUT NONINVERTING INPUT INVERTING INPUT NONINVERTING INPUT 00823-001 Figure 1. 8-Lead PDIP (N-Suffix), use older precision BiFETs and, in many cases, bipolar op amps. unmatched by any similar IC amplifier. current also make the AD712 useful for photo diode preamps.
400 V/mV ensure 12-bit performance even in high speed
processed to MIL-STD-883B, Rev. C. environmental and physical tests.
- The AD712 offers excellent overall performance at very
- The Analog Devices, Inc. advanced processing technology
- Together with precision dc performance, the AD712 offers
combination of superior ac and dc performance.
Rev. G | Page 2 of 20 TABLE OF CONTENTS Driving the Analog Input of an
REVISION HISTORY
8/06—Rev. F to Rev. G 6/06—Rev. E to Rev. F 7/02—Rev. D to Rev. E 9/01—Rev. C to Rev. D
Rev. G | Page 3 of 20 SPECIFICATIONS VS = ±15 V @ TA = 25°C, unless otherwise noted. Specifications in boldface are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. All min and max specifications are guaranteed, although only those shown in boldface are tested on all production units. Table 1. AD712J/A/S AD712K Parameter Min Typ Max Min Typ Max Unit INPUT OFFSET VOLTAGE1 Initial Offset 0.3 3/1/1 0.2 1.0 mV TMIN to TMAX 4/2/2 2.0 mV vs. Temp 7 20/20/20 7 10 μV/°C vs. Supply 76 95 80 100 dB TMIN to TMAX 76/76/76 80 dB Long-Term Offset Stability 15 15 μV/month INPUT BIAS CURRENT2 VCM = 0 V 25 75 20 75 pA VCM = ±10 V 100 100 pA INPUT OFFSET CURRENT VCM = 0 V 10 25 5 25 pA MATCHING CHARACTERISTICS Input Offset Voltage 3/1/1 1.0 mV TMIN to TMAX 4/2/2 2.0 mV Input Offset Voltage Drift 20/20/20 10 μV/°C Input Bias Current 25 25 pA Crosstalk @ f = 1 kHz 120 120 dB @ f = 100 kHz 90 90 dB FREQUENCY RESPONSE Small Signal Bandwidth 3.0 4.0 3.4 4.0 MHz Full Power Response 200 200 kHz Slew Rate 16 20 18 20 V/μs Total Harmonic Distortion 0.0003 0.0003 % INPUT IMPEDANCE Differential 3×1012||5.5 3×1012||5.5 Ω||pF Common Mode 3×1012||5.5 3×1012||5.5 Ω||pF INPUT VOLTAGE RANGE Differential3 ±20 ±20 V Common-Mode Voltage4 +14.5, −11.5 +14.5, −11.5 V TMIN to TMAX −VS + 4 +VS − 2 −VS + 4 +VS − 2 V Common-Mode Rejection Ratio VCM = ±10 V 76 88 80 88 dB TMIN to TMAX 76/76/76 84 80 84 dB VCM = ±11 V 70 84 76 84 dB TMIN to TMAX 70/70/70 80 74 80 dB INPUT VOLTAGE NOISE 2 2 μV p-p 45 45 nV/√Hz 22 22 nV/√Hz 18 18 nV/√Hz 16 16 nV/√Hz
Rev. G | Page 4 of 20 AD712J/A/S AD712K Parameter Min Typ Max Min Typ Max Unit INPUT CURRENT NOISE 0.01 0.01 pA/√Hz OPEN-LOOP GAIN 150 400 200 400 V/mV 100/100/100 100 V/mV OUTPUT CHARACTERISTICS Current +25 +25 mA POWER SUPPLY Rated Performance ±15 ±15 V Operating Range ±4.5 ±18 ±4.5 ±18 V Quiescent Current +5.0 +6.8 +5.0 +6.0 mA 1 Input offset voltage specifications are guaranteed after 5 minutes of operation at TA = 25°C. 2 Bias current specifications are guaranteed maximum at either input after 5 minutes of operation at TA = 25°C. For higher temperatures, the current doubles every 10°C. 3 Defined as voltage between inputs, such that neither exceeds ±10 V from ground. 4 Typically exceeding −14.1 V negative common-mode voltage on either input results in an output phase reversal.
Rev. G | Page 5 of 20 ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Rating Supply Voltage ±18 V Internal Power Dissipation1 Input Voltage2 ±18 V Output Short-Circuit Duration Indefinite Differential Input Voltage +VS and −VS Storage Temperature Range Q-Suffix −65°C to +150°C N-Suffix and R-Suffix −65°C to +125°C Operating Temperature Range AD712J/K 0°C to 70°C AD712A −40°C to +85°C AD712S −55°C to +125°C Lead Temperature Range (Soldering 60 sec) 300°C
1 Thermal characteristics:
8-lead PDIP package: θJA = 165°C/W 8-lead CERDIP package: θJC = 22°C/W; θJA = 110°C/W 8-lead SOIC package: θJA = 100°C/W
2 For supply voltages less than ±18 V, the absolute maximum voltage is equal
to the supply voltage. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD CAUTION ESD (electrostatic discharge) sensitive device. Electros tatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge wi thout detection. Although this product features proprietary ESD protection circuitry, permanent dama ge may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD pr ecautions are recommended to avoid performance degradation or loss of functionality.
Figure 34. Value of Capacitor CF vs. Value of CX response of the AD712 in the settling test circuit of Figure 37. Figure 35. Settling Characteristics 0 V to +10 V Step Figure 36. Settling Characteristics 0 V to −10 V Step
5 TO 18pF
Figure 37. Settling Time Test Circuit
Rev. G | Page 20 of 20 ORDERING GUIDE Model Temperature Range Package Description Package Option AD712AQ −40°C to +85°C 8-Lead CERDIP Q-8 AD712JN 0°C to 70°C 8-Lead PDIP N-8 AD712JNZ1 0°C to 70°C 8-Lead PDIP N-8 AD712JR 0°C to 70°C 8-Lead SOIC_N R-8 AD712JR-REEL 0°C to 70°C 8-Lead SOIC_N R-8 AD712JR-REEL7 0°C to 70°C 8-Lead SOIC_N R-8 AD712JRZ1 0°C to 70°C 8-Lead SOIC_N R-8 AD712JRZ-REEL1 0°C to 70°C 8-Lead SOIC_N R-8 AD712JRZ-REEL71 0°C to 70°C 8-Lead SOIC_N R-8 AD712KN 0°C to 70°C 8-Lead PDIP N-8 AD712KNZ1 0°C to 70°C 8-Lead PDIP N-8 AD712KR 0°C to 70°C 8-Lead SOIC_N R-8 AD712KR-REEL 0°C to 70°C 8-Lead SOIC_N R-8 AD712KR-REEL7 0°C to 70°C 8-Lead SOIC_N R-8 AD712KRZ1 0°C to 70°C 8-Lead SOIC_N R-8 AD712KRZ-REEL1 0°C to 70°C 8-Lead SOIC_N R-8 AD712KRZ-REEL71 0°C to 70°C 8-Lead SOIC_N R-8 AD712SQ/883B −55°C to +125°C 8-Lead CERDIP Q-8 1 Z = Pb-free part. ©2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C00823-0-8/06(G)