AD648

AD648 DS

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Technical content

REV. E Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. a Dual Precision, Low Power BiFET Op Amp AD648

FEATURES

400 /H9262A max Quiescent Current 10 pA max Bias Current, Warmed Up (AD648B) 1 /H9262V max Offset Voltage (AD648B) 10 /H9262V//H11543C max Drift (AD648B) 2 /H9262V p-p Noise, 0.1 Hz to 10 Hz AC Performance

1.8 V/ /H9262s Slew Rate

1 MHz Unity Gain Bandwidth

Available in Plastic Mini-DIP, CERDIP, and Plastic SOIC Packages MIL-STD-883B Parts Available Surface Mount (SOIC) Package Available in Tape and Reel in Accordance with EIA-481A Standard Single Version: AD548 PRODUCT DESCRIPTION The AD648 is a matched pair of low power, precision mono- lithic operational amplifiers. It offers both low bias current (10 pA max, warmed up) and low quiescent current (400 µA max) and is fabricated with ion-implanted FET and laser wafer trimming technologies. Input bias current is guaranteed over the AD648’s entire common-mode voltage range. The economical J grade has a maximum guaranteed offset voltage of less than 2 mV and an offset voltage drift of less than 20 µV/°C. This level of dc precision is achieved using Analog’s laser wafer drift trimming process. The combination of low quiescent current and low offset voltage drift minimizes changes in input offset voltage due to self-heating effects. Five grades are offered over the commercial, industrial and military temperature ranges. The AD648 is recommended for any dual supply op amp application requiring low power and excellent dc and ac per- formance. In applications such as battery-powered, precision instrument front ends and CMOS DAC buffers, the AD648’s excellent combination of low input offset voltage and drift, low bias current, and low 1/f noise reduces output errors. High common-mode rejection (82 dB, min on the “B” grade) and high open-loop gain ensures better than 12-bit linearity in high impedance, buffer applications. The AD648 is pinned out in a standard dual op amp configura- tion and is available in seven performance grades. The AD648J and AD648K are rated over the commercial temperature range of 0°C to 70 °C. The AD648 and AD648B are rated over the industrial temperature range of –40 °C to +85°C. The AD648S and AD648T are rated over the military temperature range of –55°C to +125°C and the AD648T* grade is available pro- cessed to MIL-STD-883B, Rev. C. The AD648 is available in an 8-lead plastic mini-DIP, CERDIP, and SOIC. *Not for new design, obsolete April 2002. PRODUCT HIGHLIGHTS 1. A combination of low supply current, excellent dc and ac performance and low drift makes the AD648 the ideal op amp for high performance, low power applications. 2. The AD648 is pin compatible with industry standard dual op amps such as the LF442, TL062, and AD642, enabling designers to improve performance while achieving a reduc- tion in power dissipation of up to 85%. 3. Guaranteed low input offset voltage (2 mV max) and drift (20 µV/°C max) for the AD648J are achieved using Analog Devices’ laser drift trimming technology. 4. Analog Devices specifies each device in the warmed-up condition, insuring that the device will meet its published specifications in actual use. 5. Matching characteristics are excellent for all grades. The input offset voltage matching between amplifiers in the AD648J is within 2 mV. 6. Crosstalk between amplifiers is less than –120 dB at 1 kHz. CONNECTION DIAGRAM Plastic Mini-Dip (N) Package, Plastic SOIC (R) Package and CERDIP (Q) Package Tel: 781/329-4700www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2002

AD648–SPECIFICATIONS(@ + 25/H11543C and VS = /H1155015 V dc, unless otherwise noted.) –2– REV. E AD648J/A/S AD648K/B/T Model Min Typ Max Min Typ Max Unit INPUT OFFSET VOLTAGE 1 Initial Offset 0.75 2.0 0.3 1.0 vs. Temperature 20 10 µV/°C vs. Supply 80 86 dB vs. Supply, T MIN to TMAX 76/76/76 80 dB Long-Term Offset Stability 15 15 µV/month INPUT BIAS CURREN Either Input,2 VCM = 0 5 20 3 10 pA Either Input2 at TMAX, VCM = 0 0.45/1.3/20 0.25/0.65/10 nA Max Input Bias Current Over Common-Mode Voltage Range 30 15 pA Offset Current, V CM = 0 5 10 2 5 pA Offset Current at T MAX 0.25/0.7/10 0.15/0.35/5 nA MATCHING CHARACTERISTICS 3 Input Offset Voltage 1.0 2.0 0.5 1.0 mV Input Offset Voltage vs. Temperature 8 5 µV/°C Input Bias Current 10 5 pA Crosstalk –120 –120 dB INPUT IMPEDANCE Differential 1 × 101 2/H206483 1 × 1012/H206483 Ω/H20648pF Common Mode 3 × 1012/H206483 3 × 1012/H206483 Ω/H20648pF INPUT VOLTAGE RANGE Differential4 ± 20 ± 20 V Common Mode ± 11 ± 12 ± 11 ± 12 V Common-Mode Rejection VCM = ± 10 V 76 82 dB TMIN to TMAX 76/76/76 82 dB VCM = ± 11 V 70 76 dB TMIN to TMAX 70/70/70 76 dB INPUT VOLTAGE NOISE Voltage 0.1 Hz to 10 Hz 2 2 µV p-p f = 10 Hz 80 80 nV/ √Hz f = 100 Hz 40 40 nV/ √Hz f = 1 kHz 30 30 nV/ √Hz f = 10 kHz 30 30 nV/ √Hz INPUT CURRENT NOISE f = 1 kHz 1.8 1.8 fA/ √Hz FREQUENCY RESPONSE Unity Gain, Small Signal 0.8 1.0 0.8 1.0 MHz Full Power Response 30 30 kHz Slew Rate, Unity Gain 1.0 1.8 1.0 1.8 V/ µs Settling Time to ± 0.01% 8 8 µs OPEN-LOOP GAIN VO = ±10 V, RL ≥ 10 kΩ 300 1000 300 1000 V/mV TMIN to TMAX, RL ≥ 10 kΩ 300/300/300 700 300 700 V/mV VO = ±10 V, RL ≥ 5 kΩ 150 500 150 500 V/mV TMIN to TMAX, RL ≥ 5 kΩ 150/150/150 300 150 300 V/mV

Model Min Typ Max Min Typ Max Unit OUTPUT CHARACTERISTICS Voltage @ RL ≥ 10 kΩ, TMIN to TMAX ± 12/± 12/± 12 ± 13 ± 12 ± 13 V Voltage @ RL ≥ 5 kΩ, TMIN to TMAX ± 11/± 11/± 11 ± 12 ± 11 ± 12 V Short Circuit Current 15 15 mA POWER SUPPLY Rated Performance ± 15 ± 15 V Operating Range ± 4.5 ± 18 ± 4.5 ± 18 V Quiescent Current (Both Amplifiers) 340 400 340 400 µA TEMPERATURE RANGE Operating, Rated Performance Commercial (0°C to 70°C) AD648J AD648K Industrial (–40°C to +85°C) AD648A AD648B Military (–55°C to +125°C) AD648S AD648T PACKAGE OPTIONS SOIC (R-8) AD648JR AD648KR Plastic (N-8) AD648JN AD648KN CERDIP (Q-8) AD648AQ 5, AD648SQ5 AD648BQ5, AD648TQ/883B5 Tape and Reel AD648JR-REEL, AD648JR-REEL7 AD648KR-REEL, AD648KR-REEL7 NOTES 1Input Offset Voltage specifications are guaranteed after five minutes of operation at T A = 25°C. 2Bias Current specifications are guaranteed maximum at either input after five minutes of operation at T A = 25°C. For higher temperature, the current doubles every 10°C. 3Matching is defined as the difference between parameters of the two amplifiers. 4Defined as voltages between inputs, such that neither exceeds ± 10 V from ground. 5Not for new design. Obsolete April 2002. Specifications subject to change without notice. AD648 REV. E –3– SPECIFICATIONS (Continued)

REV. E–4– WARNING! ESD SENSITIVE DEVICE CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD648 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. ABSOLUTE MAXIMUM RATINGS 1 Operating Temperature Range NOTES 1Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2Thermal Characteristics: 8-Pin Plastic Package: θJA = 165°C/Watt 8-Pin CERDIP Package: θJC = 22°C/Watt; θJA = 110°C/Watt 8-Pin SOIC Package: θJC = 42°C/Wat; θJA = 160°C/Watt 3For supply voltages less than ± 18 V, the absolute maximum input voltage is equal to the supply voltage.

REV. E –5– Typical Performance Characteristics—

REV. E–6–

OUT with both inputs grounded. gain of 100. The typical output slew rate is 1.8 V/ µs. Figure 29. Low Power Instrumentation Amplifier

and compressing analog signals having a wide dynamic range. by a factor of approximately 16 by resistors R9, R10, and R8. which have a positive 3500 ppm/ °C temperature coefficient. Frequency compensation is provided by R11, R12, C1, and C2. of the two logging transistors’ ohmic emitter resistance. Figure 30. Precision Log Ratio Amplifier

C00795–0–5/02(E) PRINTED IN U.S.A. –12– OUTLINE DIMENSIONS CERDIP (Q) Package Dimensions shown in inches and (millimeters) AD648 REV. E

Revision History

Data Sheet changed from REV. C to REV. E. 8-Lead SOIC (R) Package Dimensions shown in millimeters and (inches) 0.25 (0.0098) 0.19 (0.0075) 1.27 (0.0500) 0.41 (0.0160) 0.50 (0.0196) 0.25 (0.0099) /H11547 45/H11543 8/H11543 0/H11543 1.75 (0.0688) 1.35 (0.0532) SEATING PLANE 0.25 (0.0098) 0.10 (0.0040) 5.00 (0.1968) 4.80 (0.1890) PIN 1 0.1574 (4.00) 0.1497 (3.80) 1.27 (0.0500) BSC 6.20 (0.2440) 5.80 (0.2284) 0.51 (0.0201) 0.33 (0.0130) COPLANARITY CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN COMPLIANT TO JEDEC STANDARDS MS-012 AA Mini-DIP (N) Package Dimensions shown in inches and (millimeters)