AD633JN

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Rev. J Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Tel: 781.329.4700 ©2012–2013 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com

FEATURES

Low cost, 8-lead SOIC and PDIP packages Complete—no external components required Laser-trimmed accuracy and stability Total error within 2% of full scale Differential high impedance X and Y inputs High impedance unity-gain summing input Laser-trimmed 10 V scaling reference

APPLICATIONS

Multiplication, division, squaring Modulation/demodulation, phase detection Voltage-controlled amplifiers/attenuators/filters FUNCTIONAL BLOCK DIAGRAM A 10V 00786-023 W Z Figure 1. GENERAL DESCRIPTION The AD633 is a functionally complete, four-quadrant, analog multiplier. It includes high impedance, differential X and Y inputs, and a high impedance summing input (Z). The low impedance output voltage is a nominal 10 V full scale provided by a buried Zener. The AD633 is the first product to offer these features in modestly priced 8-lead PDIP and SOIC packages. The AD633 is laser calibrated to a guaranteed total accuracy of 2% of full scale. Nonlinearity for the Y input is typically less than 0.1% and noise referred to the output is typically less than 100 μV rms in a 10 Hz to 10 kHz bandwidth. A 1 MHz bandwidth,

20 V/μs slew rate, and the ability to drive capacitive loads make

the AD633 useful in a wide variety of applications where simplicity and cost are key concerns. The versatility of the AD633 is not compromised by its simplicity. The Z input provides access to the output buffer amplifier, enabling the user to sum the outputs of two or more multipliers, increase the multiplier gain, convert the output voltage to a current, and configure a variety of applications. The AD633 is available in 8-lead PDIP and SOIC packages. It is specified to operate over the 0°C to 70°C commercial temperature range (J Grade) or the −40°C to +85°C industrial temperature range (A Grade). PRODUCT HIGHLIGHTS 1. The AD633 is a complete four-quadrant multiplier offered in low cost 8-lead SOIC and PDIP packages. The result is a product that is cost effective and easy to apply. 2. No external components or expensive user calibration are required to apply the AD633. 3. Monolithic construction and laser calibration make the device stable and reliable. 4. High (10 MΩ) input resistances make signal source loading negligible. 5. Power supply voltages can range from ±8 V to ±18 V . The internal scaling voltage is generated by a stable Zener diode; multiplier accuracy is essentially supply insensitive.

IMPORTANT LINKS for the AD633* Last content update 09/16/2013 11:35 am PARAMETRIC SELECTION TABLES Find Similar Products By Operating Parameters DOCUMENTATION AN-348: Avoiding Passive-Component Pitfalls AN-213: Low Cost, Two-Chip, Voltage -Controlled Amplifier and Video Switch DESIGN TOOLS, MODELS, DRIVERS & SOFTWARE AD633 SPICE Macro-Model Analog Multiplier AD633J SPICE Macro-Model Analog Multiplier EVALUATION KITS & SYMBOLS & FOOTPRINTS View the Evaluation Boards and Kits page for documentation and purchasing Symbols and Footprints DESIGN COLLABORATION COMMUNITY Collaborate Online with the ADI support team and other designers about select ADI products. Follow us on Twitter: www.twitter.com/ADI_News Like us on Facebook: www.facebook.com/AnalogDevicesInc DESIGN SUPPORT Submit your support request here: Linear and Data Converters Embedded Processing and DSP Telephone our Customer Interaction Centers toll free: Americas: 1-800-262-5643 Europe: 00800-266-822-82 China: 4006-100-006 India: 1800-419-0108 Russia: 8-800-555-45-90 Quality and Reliability Lead(Pb)-Free Data SAMPLE & BUY AD633 View Price & Packaging Request Evaluation Board Request Samples Check Inventory & Purchase Find Local Distributors * This page was dynamically generated by Analog Devices, Inc. and inserted into this data sheet. Note: Dynamic changes to the content on this page (labeled 'Important Links') does not constitute a change to the revision number of the product data sheet. This content may be frequently modified. Powered by TCPDF (www.tcpdf.org)

Rev. J | Page 2 of 20 TABLE OF CONTENTS

REVISION HISTORY

8/13—Rev. I to Rev. J 2/12—Rev. H to Rev. I Added Evaluation Board Section and Figure 23 to Figure 29, 4/11—Rev. G to Rev. H 4/10—Rev. F to Rev. G 10/09—Rev. E to Rev. F 10/02—Rev. D to Rev. E

Rev. J | Page 3 of 20 SPECIFICATIONS TA = 25°C, VS = ±15 V, RL ≥ 2 kΩ. Table 1. AD633J, AD633A Parameter Conditions Min Typ Max Unit TRANSFER FUNCTION ( )( ) ZY2 Y1X2 X1W +− −= V 10 MULTIPLIER PERFORMANCE Total Error −10 V ≤ X, Y ≤ +10 V ±1 ±21 % full scale TMIN to TMAX ±3 % full scale Scale Voltage Error SF = 10.00 V nominal ±0.25% % full scale Supply Rejection VS = ±14 V to ±16 V ±0.01 % full scale Nonlinearity, X X = ±10 V, Y = +10 V ±0.4 ±11 % full scale Nonlinearity, Y Y = ±10 V, X = +10 V ±0.1 ±0.41 % full scale X Feedthrough Y nulled, X = ±10 V ±0.3 ±11 % full scale Y Feedthrough X nulled, Y = ±10 V ±0.1 ±0.41 % full scale Output Offset Voltage2 ±5 ±501 mV DYNAMICS Small Signal Bandwidth VO = 0.1 V rms 1 MHz Slew Rate VO = 20 V p-p 20 V/µs Settling Time to 1% ΔVO = 20 V 2 µs OUTPUT NOISE Spectral Density 0.8 µV/√Hz Wideband Noise f = 10 Hz to 5 MHz 1 mV rms f = 10 Hz to 10 kHz 90 µV rms OUTPUT Output Voltage Swing ±111 V Short Circuit Current RL = 0 Ω 30 401 mA INPUT AMPLIFIERS Signal Voltage Range Differential ±101 V Common mode ±101 V Offset Voltage (X, Y) ±5 ±301 mV CMRR (X, Y) VCM = ±10 V, f = 50 Hz 601 80 dB Bias Current (X , Y, Z) 0.8 2.01 µA Differential Resistance 10 MΩ POWER SUPPLY Supply Voltage Rated Performance ±15 V Operating Range ±81 ±181 V Supply Current Quiescent 4 61 mA 1 This specification was tested on all production units at electrical test. Results from those tests are used to calculate outgoing quality levels. All minimum and maximum specifications are guaranteed; however, only this specification was tested on all production units. 2 Allow approximately 0.5 ms for settling following power on.

Rev. J | Page 4 of 20 ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Rating Supply Voltage ±18 V Internal Power Dissipation 500 mW Input Voltages1 ±18 V Output Short-Circuit Duration Indefinite Storage Temperature Range −65°C to +150°C Operating Temperature Range AD633J 0°C to 70°C AD633A −40°C to +85°C Lead Temperature (Soldering, 60 sec) 300°C ESD Rating 1000 V

1 For supply voltages less than ±18 V, the absolute maximum input voltage is

equal to the supply voltage. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. THERMAL RESISTANCE θJA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. Table 3. Package Type θJA Unit 8-Lead PDIP 90 °C/W 8-Lead SOIC 155 °C/W ESD CAUTION

Figure 2. 8-Lead PDIP Figure 3. 8-Lead SOIC Table 4. 8-Lead PDIP Pin Function Descriptions

1 X1 X Multiplicand Noninverting Input

2 X2 X Multiplicand Inverting Input

3 Y1 Y Multiplicand Noninverting Input

4 Y2 Y Multiplicand Inverting Input

6 Z Summing Input

7 W Product Output

Table 5. 8-Lead SOIC Pin Function Descriptions

1 Y1 Y Multiplicand Noninverting Input

2 Y2 Y Multiplicand Inverting Input

4 Z Summing Input

5 W Product Output

7 X1 X Multiplicand Noninverting Input

8 X2 X Multiplicand Inverting Input

Figure 10. Typical VOS vs. Time, For Five Minutes Following Power Up

realize the full accuracy of the AD633. Figure 11. Optional Offset Trim Configuration

Figure 23. Connections for Use in Automatic Gain Control Circuit

Figure 32. AD633-EVALZ Configured for Bench Experiments

Rev. J | Page 17 of 20 ORDERING GUIDE Model1 Temperature Range Package Description Package Option AD633ANZ −40°C to +85°C 8-Lead Plastic Dual-in-Line Package [PDIP] N-8 AD633ARZ −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8 AD633ARZ-R7 −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N], 7" Tape and Reel R-8 AD633ARZ-RL −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N], 13" Tape and Reel R-8 AD633JN 0°C to 70°C 8-Lead Plastic Dual-in-Line Package [PDIP] N-8 AD633JNZ 0°C to 70°C 8-Lead Plastic Dual-in-Line Package [PDIP] N-8 AD633JR 0°C to 70°C 8-Lead Standard Small Outline Package [SOIC_N] R-8 AD633JR-REEL 0°C to 70°C 8-Lead Standard Small Outline Package [SOIC_N], 13" Tape and Reel R-8 AD633JR-REEL7 0°C to 70°C 8-Lead Standard Small Outline Package [SOIC_N], 7" Tape and Reel R-8 AD633JRZ 0°C to 70°C 8-Lead Standard Small Outline Package [SOIC_N] R-8 AD633JRZ-R7 0°C to 70°C 8-Lead Standard Small Outline Package [SOIC_N], 7" Tape and Reel R-8 AD633JRZ-RL 0°C to 70°C 8-Lead Standard Small Outline Package [SOIC_N], 13" Tape and Reel R-8 AD633-EVALZ Evaluation Board 1 Z = RoHS Compliant Part.

Rev. J | Page 18 of 20 NOTES

Rev. J | Page 19 of 20 NOTES

Rev. J | Page 20 of 20 NOTES ©2012–2013 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D00786-0-9/ 13(J)