AD632BD

AD632 AD | Alldatasheet

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REV. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. a AD632 Tel: 617/329-4700 World Wide Web Site: http://www.analog.com Fax: 617/326-8703 © Analog Devices, Inc., 1997 Internally Trimmed Precision IC Multiplier PIN CONFIGURATIONS H-Package TO-100 D-Package TO-116 PRODUCT DESCRIPTION The AD632 is an internally-trimmed monolithic four-quadrant multiplier/divider. The AD632B has a maximum multiplying error of ± 0.5% without external trims. Excellent supply rejection, low temperature coefficients and long term stability of the on-chip thin film resistors and buried zener reference preserve accuracy even under adverse condi- tions. The simplicity and flexibility of use provide an attractive alternative approach to the solution of complex control func- tions. The AD632 is pin-for-pin compatible with the industry standard AD532 with improved specifications and a fully differential high impedance Z-input. The AD632 is capable of providing gains of up to X10, frequently eliminating the need for separate instru- mentation amplifiers to precondition the inputs. The AD632 can be effectively employed as a variable gain differential input amplifier with high common-mode rejection. The effectiveness of the variable gain capability is enhanced by the inherent low noise of the AD632: 90 µV rms.

FEATURES

Pretrimmed to ±0.5% Max 4-Quadrant Error All Inputs (X, Y and Z) Differential, High Impedance for [(X1–X2)(Y1–Y2)/10] + Z 2 Transfer Function Scale-Factor Adjustable to Provide up to X10 Gain Low Noise Design: 90 mV rms, 10 Hz–10 kHz Low Cost, Monolithic Construction Excellent Long-Term Stability

APPLICATIONS

High Quality Analog Signal Processing Differential Ratio and Percentage Computations Algebraic and Trigonometric Function Synthesis Accurate Voltage Controlled Oscillators and Filters PRODUCT HIGHLIGHTS Guaranteed Performance Over Temperature The AD632A and AD632B are specified for maximum multi- plying errors of ± 1.0% and ± 0.5% of full scale, respectively at +25°C and are rated for operation from –25 °C to +85°C. Maximum multiplying errors of ± 2.0% (AD632S) and ± 1.0% (AD632T) are guaranteed over the extended temperature range of –55°C to +125°C. High Reliability The AD632S and AD632T series are also available with MIL-STD-883 Level B screening and all devices are available in either the hermetically-sealed TO-100 metal can or TO-116 ceramic DIP package.

–2– REV. A AD632–SPECIFICATIONS(@ +258C, VS = ±15 V, R ≥ 2 kV unless otherwise noted) AD632A AD632B AD632S AD632T Model Min Typ Max Min Typ Max Min Typ Max Min Typ Max Units MULTIPLIER PERFORMANCE Transfer Function 10V + Z2 10V + Z2 10V + Z2 10V + Z2 Total Error1 (–10 V ≤ X, Y ≤ +10 V) 61.0 60.5 61.0 60.5 % TA = Min to Max 61.5 61.0 62.0 61.0 % Scale Factor Error Temperature-Coefficient of Scaling-Voltage ± 0.02 60.01 ± 0.2 60.005 %/°C Supply Rejection ( ± 15 V ± 1 V) ± 0.01 ± 0.01 ± 0.01 ± 0.01 % Feedthrough3, X (Y Nulled, Feedthrough3, Y (X Nulled, Output Offset Voltage ± 5 630 ± 2 ± 15 ± 5 630 ± 2 ± 15 mV Output Offset Voltage Drift 200 100 500 300 µV/°C DYNAMICS Small Signal BW, (V OUT = 0.1 rms) 1111 M H z 1% Amplitude Error (C LOAD = 1000 pF) 50 50 50 50 kHz Slew Rate (VOUT 20 p-p) 20 20 20 20 V/ µs Settling Time (to 1%, ΔVOUT = 2 0 V ) 2222 µs NOISE Noise Spectral-Density SF = 10 V 0.8 0.8 0.8 0.8 µV/√Hz SF = 3 V 4 0.4 0.4 0.4 0.4 µV/√Hz Wideband Noise A = 10 Hz to 5 MHz 1.0 1 .0 1.0 1.0 mV rms P = 10 Hz to 10 kHz 90 90 90 90 µV/rms OUTPUT Output Voltage Swing 611 611 611 611 V Output Impedance (f ≤ 1 kHz) 0.1 0.1 0.1 0.1 Ω Output Short Circuit Current (RL = 0, TA = Min to Max) 30 30 30 30 mA Amplifier Open Loop Gain (f = 50 Hz) 70 70 70 70 dB INPUT AMPLIFIERS (X, Y and Z) 5 Signal Voltage Range (Diff. or CM ± 10 ± 10 ± 10 ± 10 V Operating Diff.) ± 12 ± 12 ± 12 ± 12 V Offset Voltage X, Y ± 5 620 ± 2 610 ± 5 620 ± 2 610 mV Offset Voltage Drift X, Y 100 50 100 150 µV/°C Offset Voltage Z ± 5 630 ± 2 615 ± 5 630 ± 2 615 mV Offset Voltage Drift Z 200 100 500 300 µV/°C CMRR 60 80 70 90 60 80 70 90 dB Offset Current 0.1 0. I 0.1 0.1 µA Differential Resistance 10 10 1 0 10 M Ω DIVIDER PERFORMANCE Transfer Function (X 1 > X2) 10V (Z2 − Z1) (X1 − X2 ) + Y1 10V (Z2 − Z1) (X1 − X2 ) + Y1 10V (Z2 − Z1) (X1 − X2 ) + Y1 10V (Z2 − Z1) (X1 − X2 ) + Y1 Total Error1 SQUARER PERFORMANCE Transfer Function (X1 − X2 )2 10V + Z2 (X1 − X2 )2 10V + Z2 (X1 − X2 )2 10V + Z2 (X1 − X2 )2 10V + Z2 Total Error (–10 V ≤ X ≤ 10 V) ± 0.6 ± 0.3 ± 0.6 ± 0.3 % SQUARE-ROOTER PERFORMANCE Transfer Function, (Z 1 ≤ Z2) 10V(Z2 − Z1) + X2 10V(Z2 − Z1) + X2 10V(Z2 − Z1) + X2 10V(Z2 − Z1) + X2 Total Error1 (1 V ≤ Z ≤ 10 V) ± 1.0 ± 0.5 ± 1.0 ± 0.5 %

–3–REV. A AD632 AD632A AD632B AD632S AD632T Model Min Typ Max Min Typ Max Min Typ Max Min Typ Max Units POWER SUPPLY SPECIFICATIONS Supply Voltage Rated Performance ± 15 ± 15 ± 15 ± 15 V Operating ± 8 618 ± 8 618 ± 8 622 ± 8 622 V Supply Current Quiescent 4 6 46 4 6 46 m A NOTES 1Figures given are percent of full-scale, ± l0 V (i.e., 0.01% = 1 mV). 2May be reduced to 3 V using external resistor between –V S and SF. 3Irreducible component due to nonlinearity: excludes effect of offsets. 4Using external resistor adjusted to give SF = 3 V. 5See functional block diagram for definition of sections. All min and max specifications are guaranteed. Specifications shown in boldface are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality l evels. Specifications subject to change without notice. CHIP DIMENSIONS AND PAD LAYOUT Dimensions shown in inches and (mm). (Contact factory for latest dimensions.) For further information, consult factory. ORDERING GUIDE Temperature Package Package Model Range Description Option* AD632AD –25 °C to +85°C Side Brazed Ceramic DIP D-14 AD632BD –25 °C to +85°C Side Brazed Ceramic DIP D-14 AD632AH –25 °C to +85°C Header H-10A AD632BH –25 °C to +85°C Header H-10A AD632SD –55 °C to +125°C Side Brazed Ceramic DIP D-14 AD632SD/833B –55 °C to +125°C Side Brazed Ceramic DIP D-14 AD632TD –55 °C to +125°C Side Brazed Ceramic DIP D-14 AD632TD/883B –55 °C to +125°C Side Brazed Ceramic DIP D-14 AD632SH –55 °C to +125°C Header H-10A AD632SH/883B –55 °C to +125°C Header H-10A AD632TH –55 °C to +125°C Header H-10A AD632TH/883B –55 °C to +125°C Header H-10A *For outline information see Package Information section. Thermal Characteristics Thermal Resistance θJC = 25°C/W for H-10A θJA = 150°C/W for H-10A θJC = 25°C/W for D-14 θJA = 95°C/W for D-14

–6– REV. A OUTLINE DIMENSIONS Dimensions shown in inches and (mm). C526a–1–6/97PRINTED IN U.S.A. H-Package TO-100 D-Package TO-116