AD632

AD632 (Rev. D)

Document overview

• Manufacturer or author: Analog Devices, Inc.
• PDF pages: 12

Technical content

Rev. D Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Tel: 781.329.4700 ©1979–2013 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com

FEATURES

Pretrimmed to ±0.5% maximum 4-quadrant error All inputs (X, Y, and Z) differential, high impedance for [(X1 − X2)(Y1 − Y2)/10] + Z2 transfer function Scale-factor adjustable to provide up to ×10 gain Low noise design: 90 mV rms, 10 Hz to 10 kHz Low cost, monolithic construction Excellent long-term stability

APPLICATIONS

High quality analog signal processing Differential ratio and percentage computations Algebraic and trigonometric function synthesis Accurate voltage controlled oscillators and filters FUNCTIONAL BLOCK DIAGRAM Figure 1. GENERAL DESCRIPTION The AD632 is an internally trimmed monolithic four-quadrant multiplier/divider. The AD632B has a maximum multiplying error of ±0.5% without external trims. Excellent supply rejection, low temperature coefficients, and long-term stability of the on-chip thin film resistors and buried zener reference preserve accuracy even under adverse conditions. The simplicity and flexibility of use provide an attractive alternative approach to the solution of complex control functions. The AD632 is pin-for-pin compatible with the industry standard AD532 but with improved specifications and a fully differential high impedance Z input. The AD632 is capable of providing gains of up to ×10, frequently eliminating the need for separate instrumentation amplifiers to precondition the inputs. The AD632 can be effectively employed as a variable gain differential input amplifier with high common-mode rejection. The effectiveness of the variable gain capability is enhanced by the inherent low noise of the AD632 at 90 µV rms. PRODUCT HIGHLIGHTS 1. Guaranteed performance over temperature. 2. The AD632A and AD632B are specified for maximum multiplying errors of ±1.0% and ±0.5% of full scale, respectively, at +25°C and are rated for operation from −25°C to +85°C. 3. Maximum multiplying errors of ±2.0% (AD632S) and ±1.0% (AD632T) are guaranteed over the extended temperature range of −55°C to +125°C. 4. High reliability. 5. The AD632S and AD632T series are available with MIL- STD-883 Level B screening. 6. All devices are available in either the hermetically sealed TO-100 metal can or ceramic DIP package. STABLE REFERENCE AND BIAS +VS –VS TRANSFER FUNCTION HIGH GAIN OUTPUT AMPLIFIER OUT TRANSLINEAR MULTIPLIER ELEMENT

0.75 ATTEN

A V-I V-I V-I VOS 2.7kΩ 25kΩ 09040-007

Rev. D | Page 2 of 12 TABLE OF CONTENTS

REVISION HISTORY

5/13—Rev. C to Rev. D 12/11—Rev. B to Rev. C 4/10—Rev. A to Rev. B Changes to Pin Configurations and Product Highlights

Rev. D | Page 3 of 12 SPECIFICATIONS @ +25°C, VS = ±15 V , R ≥ 2 kΩ, unless otherwise noted. Specifications shown in boldface are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. Table 1. AD632A AD632B AD632S AD632T Parameter Min Typ Max Min Typ Max Min Typ Max Min Typ Max Units MULTIPLIER PERFORMANCE Transfer Function

2121 ZYYXX +−−

)()( )()( )()( )()( Total Error1 (−10 V ≤ X, Y ≤ +10 TA = Min to Max ±1.5 ±1.0 ±2.0 ±1.0 % Scale Factor Error Temperature Coefficient of Scaling Voltage Supply Rejection (±15 V ± 1 V) ±0.01 ±0.01 ±0.01 ±0.01 % Nonlinearity Feedthrough3 Output Offset Voltage ±5 ±30 ±2 ±15 ±5 ±30 ±2 ±15 mV Output Offset Voltage Drift 200 100 500 300 µV/°C DYNAMICS Small Signal BW, (VOUT = 0.1 rms) 1 1 1 1 MHz 1% Amplitude Error (CLOAD = 1000 pF) 50 50 50 50 kHz Slew Rate (VOUT 20 p-p) 20 20 20 20 V/µs Settling Time (to 1%, ΔVOUT = 20 V) 2 2 2 2 µs NOISE Noise Spectral Density SF = 10 V 0.8 0.8 0.8 0.8 µV/√Hz SF = 3 V4 0.4 0.4 0.4 0.4 µV/√Hz Wideband Noise A = 10 Hz to 5 MHz 1.0 1.0 1.0 1.0 mV/rms P = 10 Hz to 10 kHz 90 90 90 90 µV/rms OUTPUT Output Voltage Swing ±11 ±11 ±11 ±11 V Output Impedance (f ≤ 1 kHz) 0.1 0.1 0.1 0.1 Ω Output Short-Circuit Current (RL = 0, TA = Min to Max) 30 30 30 30 mA Amplifier Open-Loop Gain (f = 50 Hz) 70 70 70 70 dB INPUT AMPLIFIERS (X, Y, and Z)5 Signal Voltage Range (Differential or Common- Mode Operating Diff.) Offset Voltage X, Y ±5 ±20 ±2 ±10 ±5 ±20 ±2 ±10 mV Offset Voltage Drift X, Y 100 50 100 150 µV/°C Offset Voltage Z ±5 ±30 ±2 ±15 ±5 ±30 ±2 ±15 mV Offset Voltage Drift Z 200 100 500 300 µV/°C CMRR 60 80 70 90 60 80 70 90 dM Offset Current 0.1 0.1 0.1 0.1 µA Differential Resistance 10 10 10 10 MΩ

Rev. D | Page 4 of 12 AD632A AD632B AD632S AD632T Parameter Min Typ Max Min Typ Max Min Typ Max Min Typ Max Units DIVIDER PERFORMANCE Transfer Function(X1 > X2) 12 Y XX ZZ + )(V10 1 12 Y XX ZZ + )(V10 1 12 Y XX ZZ + )(V10 1 12 Y XX ZZ + )(V10 Total Error1 10 V) SQUARER PERFORMANCE Transfer Function

21 ZXX +−

)( 2 )( 2 )( 2 )( 2 Total Error (−10 V ≤ X ≤ 10 V) ±0.6 ±0.3 ±0.6 ±0.3 % SQUARE-ROOTER PERFORMANCE Transfer Function, (Z1 ≤ Z2)

212 XZZ +− )(V10 212 XZZ +− )(V10 212 XZZ +− )(V10 212 XZZ +− )(V10

Total Error1 (1 V ≤ Z ≤ 10 V) ±1.0 ±0.5 ±1.0 ±0.5 % POWER SUPPLY SPECIFICATIONS Supply Voltage Rated Performance ±15 ±15 ±15 ±15 V Supply Current Quiescent 4 6 4 6 4 6 4 6 mA 1 Figures given are percent of full-scale, ±10 V (that is, 0.01% = 1 mV). 2 Can be reduced to 3 V using an external resistor between –VS and SF. 3 Irreducible component due to nonlinearity: excludes effect of offsets. 4 Using an external resistor adjusted to give a value of SF = 3 V. 5 See the functional block diagram (Figure 1) for definition of sections.

soldered in a circuit board for surface-mount packages. Table 2. Thermal Resistance

Figure 2. Pin Configuration, H-Package, TO-100 Figure 3. Pin Configuration, D-Package, SBDIP Table 3. Pin Function Descriptions, 10-Pin TO-100 1 Y1 Y Multiplicand Noninverting Input. 2 +V S Positive Supply Voltage. 3 Z1 Summing Node Noninverting Input. 5 −V S Negative Supply Voltage. 6 X1 X Multiplicand Noninverting Input. 7 X2 X Multiplicand Inverting Input. 8 Z2 Summing Node Inverting Input. 9 V OS Offset Voltage Adjustment. 10 Y2 Y Multiplicand Inverting Input. Table 4. Pin Function Descriptions, 14-Lead SBDIP 1 Z1 Summing Node Noninverting Input. 3 −V S Negative Supply Voltage. 7 X1 X Multiplicand Noninverting Input. 9 X2 X Multiplicand Noninverting Input. 10 Z2 Summing Node Inverting Input. 11 V OS Offset Voltage Adjustment. 12 Y2 Y Multiplicand Inverting Input. 13 Y1 Y Multiplicand Noninverting Input. 14 +V S Positive Supply Voltage.

5 Z210

6 X29

7 NC8

Rev. D | Page 11 of 12 ORDERING GUIDE Model1 Temperature Range Package Description Package Option AD632AD −25°C to +85°C 14-Lead Side-Brazed Ceramic Dual In-Line Package [SBDIP] D-14 AD632ADZ −25°C to +85°C 14-Lead Side-Brazed Ceramic Dual In-Line Package [SBDIP] D-14 AD632AHZ −25°C to +85°C 10-Pin Metal Header Package [TO-100] H-10 AD632BD −25°C to +85°C 14-Lead Side-Brazed Ceramic Dual In-Line Package [SBDIP] D-14 AD632BDZ −25°C to +85°C 14-Lead Side-Brazed Ceramic Dual In-Line Package [SBDIP] D-14 AD632BHZ −25°C to +85°C 10-Pin Metal Header Package [TO-100] H-10 AD632SD −55°C to +125°C 14-Lead Side-Brazed Ceramic Dual In-Line Package [SBDIP] D-14 AD632SH −55°C to +125°C 10-Pin Metal Header Package [TO-100] H-10 AD632SH/883B −55°C to +125°C 10-Pin Metal Header Package [TO-100] H-10 AD632TD −55°C to +125°C 14-Lead Side-Brazed Ceramic Dual In-Line Package [SBDIP] D-14 AD632TD/883B −55°C to +125°C 14-Lead Side-Brazed Ceramic Dual In-Line Package [SBDIP] D-14 AD632TH −55°C to +125°C 10-Pin Metal Header Package [TO-100] H-10 AD632TH/883B −55°C to +125°C 10-Pin Metal Header Package [TO-100] H-10 1 Z = RoHS Compliant Part.

Rev. D | Page 12 of 12 NOTES ©1979–2013 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D09040-0-5/13(D)