AD630SD

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a AD630 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © 2004 Analog Devices, Inc. All rights reserved. REV. E Balanced Modulator/Demodulator FUNCTIONAL BLOCK DIAGRAM CM OFF ADJ CM OFF ADJ DIFF OFF ADJ DIFF OFF ADJ 6 345 2.5k/H9024 AMP A 2.5k/H9024 AMP B 10k/H9024 10k/H9024 5k/H9024 COMP RINA CH A+ CH A– RINB CH B+ CH B– SEL B SEL A COMP +VS VOUT RB RF RA CHANNEL STATUS B/A–VS AD630 A B PRODUCT DESCRIPTION The AD630 is a high precision balanced modulator that combines a flexible commutating architecture with the accuracy and tem- perature stability afforded by laser wafer trimmed thin film resistors. Its signal processing applications include balanced modulation and demodulation, synchronous detection, phase detection, quadrature detection, phase-sensitive detection, lock-in amplification, and square wave multiplication. A network of on-board applications resistors provides precision closed-loop gains of ± 1 and ± 2 with 0.05% accuracy (AD630B). These resistors may also be used to accurately configure multiplexer gains of +1, +2, +3, or +4. Alternatively, external feedback may be employed, allowing the designer to implement high gain or complex switched feedback topologies. The AD630 can be thought of as a precision op amp with two independent differential input stages and a precision comparator that is used to select the active front end. The rapid response time of this comparator coupled with the high slew rate and fast settling of the linear amplifiers minimize switching distortion. In addition, the AD630 has extremely low crosstalk between chan- nels of –100 dB @ 10 kHz. The AD630 is used in precision signal processing and instru- mentation applications that require wide dynamic range. When used as a synchronous demodulator in a lock-in amplifier configuration, it can recover a small signal from 100 dB of inter- fering noise (see Lock-In Amplifier Applications section). Although optimized for operation up to 1 kHz, the circuit is useful at frequencies up to several hundred kilohertz. Other features of the AD630 include pin programmable frequency compensation, optional input bias current compensation resis- tors, common-mode and differential-offset voltage adjustment, and a channel status output that indicates which of the two differential inputs is active. This device is now available to Standard Military Drawing (DESC) numbers 5962-8980701RA and 5962-89807012A. PRODUCT HIGHLIGHTS 1. The configuration of the AD630 makes it ideal for signal processing applications, such as balanced modulation and demodulation, lock-in amplification, phase detection, and square wave multiplication. 2. The application flexibility of the AD630 makes it the best choice for applications that require precisely fixed gain, switched gain, multiplexing, integrating-switching functions, and high speed precision amplification. 3. The 100 dB dynamic range of the AD630 exceeds that of any hybrid or IC balanced modulator/demodulator and is compa- rable to that of costly signal processing instruments. 4. The op amp format of the AD630 ensures easy implementa- tion of high gain or complex switched feedback functions. The application resistors facilitate the implementation of most common applications with no additional parts. 5. The AD630 can be used as a 2-channel multiplexer with gains of +1, +2, +3, or +4. The channel separation of 100 dB @ 10 kHz approaches the limit achievable with an empty IC package. 6. The AD630 has pin strappable frequency compensation (no external capacitor required) for stable operation at unity gain without sacrificing dynamic performance at higher gains. 7. Laser trimming of comparator and amplifying channel offsets eliminates the need for external nulling in most cases.

FEATURES

Recovers Signal from 100 dB Noise

2 MHz Channel Bandwidth

45 V/ /H9262s Slew Rate

–120 dB Crosstalk @ 1 kHz Pin Programmable, Closed-Loop Gains of /H115501 and /H115502 0.05% Closed-Loop Gain Accuracy and Match 100 /H9262V Channel Offset Voltage (AD630BD) 350 kHz Full Power Bandwidth Chips Available

IMPORTANT LINKS for the AD630* Last content update 05/03/2013 01:15 pm PARAMETRIC SELECTION TABLES Find Similar Products By Operating Parameters DOCUMENTATION AD630: Military Data Sheet AN-924: Digital Quadrature Modulator Gain AN-683: Strain Gage Measurement Using an AC Excitation AN-307: Modem-Circuit Techniques Simplify Instrumentation Designs AN-306: Synchronous System Measures micro-Ohms AN-214: Ground Rules for High Speed Circuits AN-349: Keys to Longer Life for CMOS AN-308: Commutating Amp Multiplies Precisely ADI Warns Against Misuse of COTS Integrated Circuits Space Qualified Parts List Leading Inside Advertorials: Broadband I/Q Modulator Eases Radio Design ADL5375 Modulator / ADL5382 Demodulator EVALUATION KITS & SYMBOLS & FOOTPRINTS Symbols and Footprints DESIGN COLLABORATION COMMUNITY Collaborate Online with the ADI support team and other designers about select ADI products. Follow us on Twitter: www.twitter.com/ADI_News Like us on Facebook: www.facebook.com/AnalogDevicesInc DESIGN SUPPORT Submit your support request here: Linear and Data Converters Embedded Processing and DSP Telephone our Customer Interaction Centers toll free: Americas: 1-800-262-5643 Europe: 00800-266-822-82 China: 4006-100-006 India: 1800-419-0108 Russia: 8-800-555-45-90 Quality and Reliability Lead(Pb)-Free Data SAMPLE & BUY AD630 View Price & Packaging Request Evaluation Board Request Samples Check Inventory & Purchase Find Local Distributors * This page was dynamically generated by Analog Devices, Inc. and inserted into this data sheet. Note: Dynamic changes to the content on this page (labeled 'Important Links') does not constitute a change to the revision number of the product data sheet. This content may be frequently modified. Powered by TCPDF (www.tcpdf.org)

REV. E–2– AD630–SPECIFICATIONS(@ 25/H11543C and /H11550VS = /H1155015 V, unless otherwise noted.) AD630J/AD630A AD630K/AD630B AD630S Model Min Typ Max Min Typ Max Min Typ Max Unit GAIN Open-Loop Gain 90 110 100 120 90 110 dB ± 1, ± 2 Closed-Loop Gain Error 0.1 0.05 0.1 % Closed-Loop Gain Match 0.1 0.05 0.1 % Closed-Loop Gain Drift 2 2 2 ppm/ °C CHANNEL INPUTS VIN Operational Limit 1 (–VS + 4 V) to (+V S – 1 V) (–V S + 4 V) to (+V S – 1 V) (–V S + 4 V) to (+V S – 1 V) V Input Offset Voltage 500 100 500 µV Input Offset Voltage TMIN to TMAX 800 160 1000 µV Input Bias Current 100 300 100 300 100 300 nA Input Offset Current 10 50 10 50 10 50 nA Channel Separation @ 10 kHz 100 100 100 dB COMPARATOR VIN Operational Limit 1 (–VS + 3 V) to (+V S – 1.5 V) (–V S + 3 V) to (+V S – 1.5 V) (–V S + 3 V) to (+V S – 1.3 V) V Switching Window ± 1.5 ± 1.5 ± 1.5 mV Switching Window TMIN to TMAX ± 2.0 ± 2.0 ± 2.5 mV Input Bias Current 100 300 100 300 100 300 nA Response Time (–5 mV to +5 mV Step) 200 200 200 ns Channel Status ISINK @ VOL = –VS + 0.4 V2 1.6 1.6 1.6 mA Pull-Up Voltage (–V S + 33 V) (–V S + 33 V) (–V S + 33 V) V DYNAMIC PERFORMANCE Unity Gain Bandwidth 2 2 2 MHz Slew Rate3 45 45 45 V/ µs Settling Time to 0.1% (20 V Step) 3 3 3 µs OPERATING CHARACTERISTICS Common-Mode Rejection 85 105 90 110 90 110 dB Power Supply Rejection 90 110 90 110 90 110 dB Supply Voltage Range ± 5 ± 16.5 ± 5 ± 16.5 ± 5 ± 16.5 V Supply Current 4 5 4 5 4 5 mA OUTPUT VOLTAGE, @ R L = 2 kΩ TMIN to TMAX ± 10 ± 10 ± 10 V Output Short-Circuit Current 25 25 25 mA TEMPERATURE RANGES Rated Performance–N Package 0 70 0 70 N/A °C Rated Performance– D Package –25 +85 –25 +85 –55 +125 °C NOTES 1If one terminal of each differential channel or comparator input is kept within these limits the other terminal may be taken to the positive supply. 2ISINK @ VOL = (–VS + 1); V is typically 4 mA. 3Pin 12 Open. Slew rate with Pin 12 and Pin 13 shorted is typically 35 V/ µs. Specifications subject to change without notice.

REV. E AD630 –3– THERMAL CHARACTERISTICS /H9258JC /H9258JA 20-Lead PDIP (N) 24 °C/W 61 °C/W 20-Lead Ceramic DIP (D) 35 °C/W 120 °C/W 20-Lead Leadless Chip Carrier LCC (E) 35 °C/W 120 °C/W 20-Lead SOIC (R-20) 38 °C/W 75 °C/W ABSOLUTE MAXIMUM RATINGS Storage Temperature, Ceramic Package . . . –65 °C to +150°C PIN CONFIGURATIONS 20-Lead SOIC, PDIP, and CERDIP TOP VIEW (Not to Scale) AD630 RINA RINB CH B+ CH B– CH A– CH A+ DIFF OFF ADJ DIFF OFF ADJ RB RF RACM OFF ADJ CM OFF ADJ –VS SEL B SEL A +VS COMP VOUT CHANNEL STATUS B/A 20-Terminal CLCC 20 19123 91 0 1 1 1 2 1 3 TOP VIEW (Not to Scale) AD630 DIFF OFF ADJ CM OFF ADJ CM OFF ADJ CHANNEL STATUS B/A –VS CH B+ RINB RA RF RB DIFF OFF ADJ CH A+ RIN A CH A– CH B– SEL B SEL A +VS COMP VOUT ORDERING GUIDE Model Temperature Ranges Package Description Package Option AD630JN 0 °C to 70°C PDIP N-20 AD630KN 0 °C to 70°C PDIP N-20 AD630AR –25 °C to +85°C SOIC R-20 AD630AR-REEL –25 °C to +85°CS OIC 13" Tape and Reel R-20 AD630AD –25 °C to +85°C SBDIP D-20 AD630BD –25 °C to +85°C SBDIP D-20 AD630SD –55 °C to +125°C SBDIP D-20 AD630SD/883B –55 °C to +125°C SBDIP D-20 5962-8980701RA –55 °C to +125°C SBDIP D-20 AD630SE/883B –55 °C to +125°C CLCC E-20A 5962-89807012A –55 °C to +125°C CLCC E-20A AD630JCHIPS 0 °C to 70°C Chip AD630SCHIPS –55 °C to +125°C Chip CHIP METALLIZATION AND PINOUT Dimensions shown in inches and (millimeters). Contact factory for latest dimensions. CHIP AVAILABILITY The AD630 is available in laser trimmed, passivated chip form. The figure above shows the AD630 metallization pattern, bonding pads and dimensions. AD630 chips are available; con- sult factory for details. CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD630 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.

REV. E AD630 –4– REV. E 1 10 100 1k 10k 100k 1M RESISTIVE LOAD (/H9024) CL = 100pF f = 1kHz CAP IN 5k/H9024 VO 100pF RL Vi 5k/H9024 OUTPUT VOLTAGE (/H11550V) TPC 2. Output Voltage vs. Resistive Load INPUT VOLTAGE (V) dVO dt (V//H9262s) –60 –5 –3 4–2 –1 1 –40 –20 –4 02 3 5 UNCOMPENSATED COMPENSATED TPC 5. dV dt O vs. Input Voltage 05 1 0 15 SUPPLY VOLTAGE (/H11550V) OUTPUT VOLTAGE (/H11550V) 5k/H9024 100pF Vi 5k/H9024 2k/H9024 VO f = 1kHz CL = 100pF TPC 3. Output Voltage Swing vs. Supply Voltage FREQUENCY (Hz) 120 1M100 100 10 1k 100k 10k UNCOMPENSATED 10M OPEN LOOP GAIN (dB) 135 180 COMPENSATED OPEN LOOP PHASE (/H11543C) TPC 6. Gain and Phase vs. Frequency FREQUENCY (Hz) 1k 10k 1M 100k RL= 2k/H9024 CL = 100pF 2k/H9024 5k/H90245k/H9024 Vi VO 100pF OUTPUT VOLTAGE (/H11550V) TPC 1. Output Voltage vs. Frequency FREQUENCY (Hz) COMMON-MODE REJECTION (dB) 120 11 0 100k100 1k 10k 100 TPC 4. Common-Mode Rejection vs. Frequency AD630–Typical Performance Characteristics –4–

REV. E AD630 –5– 20mV 500ns 20mV 100 20mV/DIV (Vo) 20mV/DIV (Vi) TOP TRACE: Vo BOTTOM TRACE: Vi 5k/H9024 10k/H9024 10k/H9024 Vi CH A CH B 12 VO 16 15 TPC 7. Channel-to-Channel Switch-Settling Characteristic 100 100mV 500ns 50mV 1mV 50mV/DIV (Vi) 1mV/DIV (A) TOP TRACE: Vi MIDDLE TRACE: SETTLING ERROR (A) BOTTOM TRACE: Vo 100mV/DIV CH A MIDDLE TRACE (A) 10k/H9024 10k/H9024 VO BOTTOM TRACE TEKTRONIX 7A13 10k/H9024 1k/H9024 30pF 10k/H9024 Vi TOP TRACE 14 15 TPC 8. Small Signal Noninverting Step Response 100 10V 10V 1mV TOP TRACE: Vi MIDDLE TRACE: SETTLING ERROR (B) BOTTOM TRACE: Vo 5/H9262s /H1155010V 20kHz (Vi) 1mV/DIV (B) 10V/DIV (Vo) CH A 10k/H9024 10k/H9024 VO BOTTOM TRACE 10k/H9024 Vi TOP TRACE (B) MIDDLE TRACE 10k/H9024 HP5082-2811 14 15 TPC 9. Large Signal Inverting Step Response

and i23 to the input stage it controls, causing it to become active. inverting and noninverting closed loop configurations. to produce a low impedance output. combination of RB and RF to match positive and negative gain. and has a minor effect on the pole-zero locations. signal and interference superimposed at unity gain. Figure 6. AD630 with External Feedback frequencies. Generally, this will be a wideband buffer amplifier. means of an optional self-contained compensation capacitor. bandwidth and slew rate for closed loop gains of |2| and above. feedback, the phase margin will be reduced to less than 20 °. first priority, but the transient response will not be optimum. by whether bandwidth or settling response must be optimized.

REV. E AD630 –11– OUTLINE DIMENSIONS 20-Lead Side-Brazed Ceramic Dual In-Line Package [SBDIP] (D-20) Dimensions shown in inches and (millimeters) 1 10 0.300 (7.62) 0.280 (7.11)PIN 1 0.080 (2.03) MAX0.005 (0.13) MIN SEATING PLANE0.023 (0.58) 0.014 (0.36) 0.060 (1.52) 0.015 (0.38) 0.200 (5.08) MAX 0.200 (5.08) 0.125 (3.18) 0.070 (1.78) 0.030 (0.76) 0.100 (2.54) BSC 0.150 (3.81) MIN 0.320 (8.13) 0.300 (7.62) 0.015 (0.38) 0.008 (0.20) CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN 1.060 (28.92) 0.990 (25.15) 20-Lead Plastic Dual In-Line Package [PDIP] (N-20) Dimensions shown in inches and (millimeters) 1 10 0.985 (25.02) 0.965 (24.51) 0.945 (24.00) 0.295 (7.49) 0.285 (7.24) 0.275 (6.99) 0.150 (3.81) 0.135 (3.43) 0.120 (3.05) 0.015 (0.38) 0.010 (0.25) 0.008 (0.20) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) SEATING PLANE MAX 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) 0.150 (3.81) 0.130 (3.30) 0.110 (2.79) 0.100 (2.54) BSC 0.060 (1.52) 0.050 (1.27) 0.045 (1.14) CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN COMPLIANT TO JEDEC STANDARDS MO-095-AE 20-Terminal Ceramic Leadless Chip Carrier [LCC] (E-20A) Dimensions shown in inches and (millimeters) 20 4 BOTTOM VIEW 0.028 (0.71) 0.022 (0.56)

45 TYP

0.015 (0.38) MIN 0.055 (1.40) 0.045 (1.14) 0.050 (1.27) BSC0.075 (1.91) REF 0.011 (0.28) 0.007 (0.18) R TYP 0.095 (2.41) 0.075 (1.90) 0.100 (2.54) REF 0.200 (5.08) REF 0.150 (3.81) BSC 0.075 (1.91) REF 0.358 (9.09) 0.342 (8.69) SQ 0.358 (9.09) MAX SQ 0.100 (2.54) 0.064 (1.63) 0.088 (2.24) 0.054 (1.37) CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETERS DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN

REV. E–12– C00784–0–6/04(E)

Revision History

6/04—Data Sheet changed from REV. D to REV. E. 6/01—Data Sheet changed from REV. C to REV. D. 20-Lead Standard Small Outline Package [SOIC] Wide Body (R-20) Dimensions shown in millimeters and (inches) CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN COMPLIANT TO JEDEC STANDARDS MS-013AC 0.75 (0.0295) 0.25 (0.0098) 20 11 101 8/H11543 0/H11543 /H11547 45/H11543 1.27 (0.0500) 0.40 (0.0157) SEATING PLANE 0.30 (0.0118) 0.10 (0.0039) 2.65 (0.1043) 2.35 (0.0925) 1.27 (0.0500) BSC 10.65 (0.4193) 10.00 (0.3937) 7.60 (0.2992) 7.40 (0.2913) 13.00 (0.5118) 12.60 (0.4961) COPLANARITY 0.10 0.33 (0.0130) 0.20 (0.0079) 0.51 (0.0201) 0.31 (0.0122) AD630