AD624 AD | Alldatasheet

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REV. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. a AD624 Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 1999 Precision Instrumentation Amplifier PRODUCT DESCRIPTION The AD624 is a high precision, low noise, instrumentation amplifier designed primarily for use with low level transducers, including load cells, strain gauges and pressure transducers. An outstanding combination of low noise, high gain accuracy, low gain temperature coefficient and high linearity make the AD624 ideal for use in high resolution data acquisition systems. The AD624C has an input offset voltage drift of less than 0.25 mV/°C, output offset voltage drift of less than 10 mV/°C, CMRR above 80 dB at unity gain (130 dB at G = 500) and a maximum nonlinearity of 0.001% at G = 1. In addition to these outstanding dc specifications, the AD624 exhibits superior ac performance as well. A 25 MHz gain bandwidth product, 5 V/ ms slew rate and 15 ms settling time permit the use of the AD624 in high speed data acquisition applications. The AD624 does not need any external components for pre- trimmed gains of 1, 100, 200, 500 and 1000. Additional gains such as 250 and 333 can be programmed within one percent accuracy with external jumpers. A single external resistor can also be used to set the 624’s gain to any value in the range of 1 to 10,000. PRODUCT HIGHLIGHTS 1. The AD624 offers outstanding noise performance. Input noise is typically less than 4 nV/ ÖHz at 1 kHz. 2. The AD624 is a functionally complete instrumentation am- plifier. Pin programmable gains of 1, 100, 200, 500 and 1000 are provided on the chip. Other gains are achieved through the use of a single external resistor. 3. The offset voltage, offset voltage drift, gain accuracy and gain temperature coefficients are guaranteed for all pretrimmed gains. 4. The AD624 provides totally independent input and output offset nulling terminals for high precision applications. This minimizes the effect of offset voltage in gain ranging applications. 5. A sense terminal is provided to enable the user to minimize the errors induced through long leads. A reference terminal is also provided to permit level shifting at the output.

FEATURES

Low Noise: 0.2 mV p-p 0.1 Hz to 10 Hz Low Gain TC: 5 ppm max (G = 1) Low Nonlinearity: 0.001% max (G = 1 to 200) High CMRR: 130 dB min (G = 500 to 1000) Low Input Offset Voltage: 25 mV, max Low Input Offset Voltage Drift: 0.25 mV/8C max Gain Bandwidth Product: 25 MHz Pin Programmable Gains of 1, 100, 200, 500, 1000 No External Components Required Internally Compensated FUNCTIONAL BLOCK DIAGRAM 225.3V 124V 4445.7V 80.2V 50V VB 50V 20kV 10kV 10kV 10kV AD624 –INPUT G = 100 G = 200 G = 500 RG 1 RG 2 +INPUT SENSE OUTPUT REF 20kV 10kV

REV. C–2– AD624–SPECIFICATIONS Model AD624A AD624B AD624C AD624S Min Typ Max Min Typ Max Min Typ Max Min Typ Max Units GAIN Gain Equation (External Resistor Gain Programming) 40, 000 RG + 1 Ø ºŒ ø ßœ– 20% 40, 000 RG + 1 Ø ºŒ ø ßœ– 20% 40, 000 RG + 1 Ø ºŒ ø ßœ– 20% 40, 000 RG + 1 Ø ºŒ ø ßœ– 20% Gain Range (Pin Programmable) 1 to 1000 1 to 1000 1 to 1000 1 to 1000 Gain Error Nonlinearity G = 100, 200 – 0.005 – 0.003 – 0.001 – 0.005 % G = 500 – 0.005 – 0.005 – 0.005 – 0.005 % Gain vs. Temperature G = 1 555 5 p p m / °C G = 100, 200 10 10 10 10 ppm/ °C G = 500 25 15 15 15 ppm/ °C VOLTAGE OFFSET (May be Nulled) Input Offset Voltage 200 75 25 75 mV vs. Temperature 2 0.5 0.25 2.0 mV/°C Output Offset Voltage 532 3 mV vs. Temperature 50 25 10 50 mV/°C Offset Referred to the Input vs. Supply G = 1 70 75 80 75 dB G = 100, 200 95 105 110 105 dB G = 500 100 110 115 110 dB INPUT CURRENT Input Bias Current –50 –25 –15 –50 nA vs. Temperature – 50 – 50 – 50 – 50 pA/ °C Input Offset Current –35 –15 –10 –35 nA vs. Temperature – 20 – 20 – 20 – 20 pA/ °C INPUT Input Impedance Differential Resistance 10 9 109 109 109 W Differential Capacitance 10 10 10 10 pF Common-Mode Resistance 10 9 109 109 109 W Common-Mode Capacitance 10 10 10 10 pF Input Voltage Range 1 Max Differ. Input Linear (V DL) – 10 – 10 – 10 – 10 V Max Common-Mode Linear (V CM)

12 V -

G 2 · VD æ Łç ö G 2 · VD æ Łç ö G 2 · VD æ Łç ö G 2 · VD æ Łç ö ł÷ V Common-Mode Rejection dc to 60 Hz with 1 k W Source Imbalance G = 1 70 75 80 70 dB G = 100, 200 100 105 110 100 dB G = 500 110 120 130 110 dB OUTPUT RATING V OUT , RL = 2 kW– 10 – 10 – 10 – 10 V DYNAMIC RESPONSE Small Signal –3 dB G = 1 111 1 M H z G = 100 150 150 150 150 kHz G = 200 100 100 100 100 kHz G = 500 50 50 50 50 kHz G = 1000 25 25 25 25 kHz Slew Rate 5.0 5.0 5.0 5.0 V/ ms Settling Time to 0.01%, 20 V Step G = 1 to 200 15 15 15 15 ms G = 500 35 35 35 35 ms G = 1000 75 75 75 75 ms NOISE Voltage Noise, 1 kHz R.T.I. 4 4 4 4 nV/ ÖHz R.T.O. 75 75 75 75 nV/ ÖHz R.T.I., 0.1 Hz to 10 Hz G = 1 1 01 01 0 1 0 mV p-p G = 100 0.3 0.3 0.3 0.3 mV p-p G = 200, 500, 1000 0.2 0.2 0.2 0.2 mV p-p Current Noise

0.1 Hz to 10 Hz 60 60 60 60 pA p-p

RIN 8 10 12 8 10 12 8 10 12 8 10 12 k W IIN 30 30 30 30 mA Voltage Range – 10 – 10 – 10 – 10 V Gain to Output 1 1 1 1 % (@ VS = 615 V, RL = 2 kV and TA = +258C, unless otherwise noted)

REV. C –3– AD624 Model AD624A AD624B AD624C AD624S Min Typ Max Min Typ Max Min Typ Max Min Typ Max Units REFERENCE INPUT RIN 16 20 24 16 20 24 16 20 24 16 20 24 k W IIN 30 30 30 30 mA Voltage Range – 10 – 10 – 10 – 10 V Gain to Output 1 1 1 1 % TEMPERATURE RANGE Specified Performance –25 +85 –25 +85 –25 +85 –55 +125 °C Storage –65 +150 –65 +150 –65 +150 –65 +150 °C POWER SUPPLY Power Supply Range 66 615 618 66 615 618 66 615 618 66 615 618 V Quiescent Current 3.5 5 3.5 5 3.5 5 3.5 5 mA NOTES 1VDL is the maximum differential input voltage at G = 1 for specified nonlinearity, V DL at other gains = 10 V/G. V D = actual differential input voltage. Specifications subject to change without notice. Specifications shown in boldface are tested on all production unit at final electrical test. Results from those tests are used to calculate outgoing quality le vels. All min and max specifications are guaranteed, although only those shown in boldface are tested on all production units. ABSOLUTE MAXIMUM RATINGS* Operating Temperature Range *Stresses above those listed under Absolute Maximum Ratings may cause perma- nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. CONNECTION DIAGRAM –INPUT +INPUT RG 1 OUTPUT NULL INPUT NULL REF –VS G = 200 G = 500 SENSE RG INPUT NULL OUTPUT NULL G = 100 +VS OUTPUT TOP VIEW (Not to Scale) AD624 SHORT TO RG 2 FOR DESIRED GAIN FOR GAINS OF 1000 SHORT RG 1 TO PIN 12 AND PINS 11 AND 13 TO RG2 METALIZATION PHOTOGRAPH Contact factory for latest dimensions Dimensions shown in inches and (mm). ORDERING GUIDE Temperature Package Package Model Range Description Option AD624AD –25 °C to +85°C 16-Lead Ceramic DIP D-16 AD624BD –25 °C to +85°C 16-Lead Ceramic DIP D-16 AD624CD –25 °C to +85°C 16-Lead Ceramic DIP D-16 AD624SD –55 °C to +125°C 16-Lead Ceramic DIP D-16 AD624SD/883B* –55 °C to +125°C 16-Lead Ceramic DIP D-16 AD624AChips –25 °C to +85°CD i e AD624SChips –25 °C to +85°CD i e *See Analog Devices’ military data sheet for 883B specifications.

Figure 10. CMRR vs. Frequency RTI, Figure 13. Negative PSRR vs. Figure 16. Low Frequency Voltage Figure 11. Large Signal Frequency Figure 14. RTI Noise Spectral Figure 17. Low Frequency Voltage Figure 12. Positive PSRR vs. Figure 15. Input Current Noise

8 TO –8

12 TO –12

4 TO –4

Figure 18. Settling Time, Gain = 1

Figure 19. Large Signal Pulse Figure 22. Range Signal Pulse Figure 20. Settling Time Gain = 100 Figure 23. Settling Time Gain = 1000 Figure 21. Large Signal Pulse Figure 24. Large Signal Pulse

0 TO 2V

Figure 47. Typical Bridge Application 1Output offset voltage and output offset voltage drift are given as RTI figures. Guide, available free from Analog Devices. required to amplify the output of an unbalanced transducer. age range. The operating temperature range is –25 °C to +85°C.

REV. C AD624 –15– OUTLINE DIMENSIONS Dimensions shown in inches and (mm). Side-Brazed Solder Lid Ceramic DIP (D-16) 1 8 0.080 (2.03) MAX 0.310 (7.87) 0.220 (5.59) PIN 1 0.005 (0.13) MIN 0.100 (2.54) BSC SEATING PLANE 0.023 (0.58) 0.014 (0.36) 0.060 (1.52) 0.015 (0.38) 0.200 (5.08) MAX 0.200 (5.08) 0.125 (3.18) 0.070 (1.78) 0.030 (0.76) 0.150 (3.81) MAX 0.840 (21.34) MAX 0.320 (8.13) 0.290 (7.37) 0.015 (0.38) 0.008 (0.20) C805d–0–7/99PRINTED IN U.S.A.