AD606 AD | Alldatasheet
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REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. a 50 MHz, 80 dB Demodulating Logarithmic Amplifier with Limiter Output AD606 Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 1999
FEATURES
Logarithmic Amplifier Performance –75 dBm to +5 dBm Dynamic Range £1.5 nV/ ÖHz Input Noise Usable to >50 MHz 37.5 mV/dB Voltage Output On-Chip Low-Pass Output Filter Limiter Performance 61 dB Output Flatness over 80 dB Range 638 Phase Stability at 10.7 MHz over 80 dB Range Adjustable Output Amplitude Low Power +5 V Single Supply Operation 65 mW Typical Power Consumption CMOS-Compatible Power-Down to 325 mW typ <5 ms Enable/Disable Time
APPLICATIONS
Ultrasound and Sonar Processing Phase-Stable Limiting Amplifier to 100 MHz Received Signal Strength Indicator (RSSI) Wide Range Signal and Power Measurement PRODUCT DESCRIPTION The AD606 is a complete, monolithic logarithmic amplifier using a 9-stage “successive-detection” technique. It provides both logarithmic and limited outputs. The logarithmic output is from a three-pole post-demodulation low-pass filter and provides a loadable output voltage of +0.1 V dc to +4 V dc. The logarith- mic scaling is such that the output is +0.5 V for a sinusoidal input of –75 dBm and +3.5 V at an input of +5 dBm; over this range the logarithmic linearity is typically within – 0.4 dB. All scaling parameters are proportional to the supply voltage. The AD606 can operate above and below these limits, with reduced linearity, to provide as much as 90 dB of conversion range. A second low-pass filter automatically nulls the input offset of the first stage down to the submicrovolt level. Adding external capacitors to both filters allows operation at input fre- quencies as low as a few hertz. The AD606’s limiter output provides a hard-limited signal output as a differential current of – 1.2 mA from open-collector outputs. In a typical application, both of these outputs are loaded by 200 W resistors to provide a voltage gain of more than 90 dB from the input. Transition times are 1.5 ns, and the phase is stable to within – 3° at 10.7 MHz for signals from –75 dBm to +5 dBm. The logarithmic amplifier operates from a single +5 V supply and typically consumes 65 mW. It is enabled by a CMOS logic level voltage input, with a response time of <5 ms. When dis- abled, the standby power is reduced to <1 mW within 5 ms. The AD606J is specified for the commercial temperature range of 0°C to +70°C and is available in 16-lead plastic DIPs or SOICs. Consult the factory for other packages and temperature ranges. FUNCTIONAL BLOCK DIAGRAM REFERENCE AND POWER-UP ONE-POLE FILTER FINAL LIMITERMAIN SIGNAL PATH 11.15dB/STAGE OFFSET-NULL LOW-PASS FILTER 30pF 30pF 360kV 360kV 2pF9.375kV 9.375kV 2pF TWO-POLE SALLEN-KEY FILTER 12mA/dB 2mA/dB HIGH-END DETECTORS AD606 1.5kV 1.5kV 250V 30kV 30kV 910111213141516 1234567 8 INLO COMM ISUM ILOG BFIN VLOG OPCM LMLO LMHILADJFIL2FIL1VPOSPRUPCOMMINHI
AD606–SPECIFICATIONS(@ TA = +258C and supply = +5 V unless otherwise noted; dBm assumes 50 V) REV. B–2– Model AD606J Parameter Conditions Min Typ Max Units SIGNAL INPUT Log Amp fMAX AC Coupled; Sinusoidal Input 50 MHz Limiter fMAX AC Coupled; Sinusoidal Input 100 MHz Dynamic Range 80 dB Input Resistance Differential Input 500 2,500 W Input Capacitance Differential Input 2 pF SIGNAL OUTPUT Limiter Flatness –75 dBm to +5 dBm Input Signal at 10.7 MHz –1.5 +1.5 dB With Pin 9 to VPOS via a 200 W Resistor and Pin 8 to VPOS via a 200 W Resistor Output Current At Pins 8 or 9, Proportional to V POS, LADJ Grounded 1.2 mA LADJ Open Circuited 0.48 mA Phase Variation with Input Level –75 dBm to +5 dBm Input Signal at 10.7 MHz – 3 Degrees LOG (RSSI) OUTPUT Nominal Slope At 10.7 MHz; (0.0075 · VPOS)/dB 37.5 mV/dB At 45 MHz 35 mV/dB Slope Accuracy Untrimmed at 10.7 MHz –15 – 5 +15 % Intercept Sinusoidal Input; Independent of V POS –88.33 dBm Logarithmic Conformance –75 dBm to +5 dBm Input Signal at 10.7 MHz –1.5 0.4 +1.5 dB Nominal Output Input Level = –75 dBm 0.5 V Input Level = –35 dBm 2 V Input Level = +5 dBm 3.5 V Accuracy over Temperature After Calibration at –35 dBm at 10.7 MHz –3 +3 dB T MIN to TMAX Video Response Time From Onset of Input Signal Until Output Reaches 400 ns 95% of Final Value POWER-DOWN INTERFACE Power-Up Response Time Time Delay Following HI Transition Until 3.5 ms Device Meets Full Specifications AC Coupled with 100 pF Coupling Capacitors Input Bias Current Logical HI Input (See Figure 12) 1 nA Logical LO Input 4 mA POWER SUPPLY Operating Range 4.5 5.5 V Powered-Up Current Zero Signal Input 13 mA TMIN to TMAX 13 20 mA Powered-Down Current T MIN to TMAX 65 200 mA Specifications subject to change without notice.
REV. B –3– ORDERING GUIDE Temperature Package Package Model Range Description Option AD606JN 0 °C to +70°C 16-Lead Plastic DIP N-16 AD606JR 0 °C to +70°C 16-Lead Narrow-Body R-16A SOIC AD606JR-REEL 0 °C to +70°C 13" Tape and Reel R-16A AD606JR-REEL7 0 °C to +70°C 7" Tape and Reel R-16A AD606-EB Evaluation Board AD606JCHIPS 0 °C to +70°C Die PIN DESCRIPTION Plastic DIP (N) and Small Outline (R) Packages TOP VIEW (Not to Scale) INLO INHI AD606 COMM COMM ISUM PRUP ILOG VPOS BFIN FIL1 VLOG FIL2 OPCM LADJ LMLO LMHI ABSOLUTE MAXIMUM RATINGS 1 NOTES 1Stresses above those listed under Absolute Maximum Ratings may cause perma- nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2Specification is for device in free air: 16-Lead Plastic DIP Package: qJA = 85°C/W 16-Lead SOIC Package: qJA = 100°C/W CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD606 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. PIN FUNCTION DESCRIPTIONS Pin Mnemonic Function
1 INLO DIFFERENTIAL RF INPUT
–75 dBm to +5 dBm, Inverting, AC Coupled.
2 COMM POWER SUPPLY COMMON
Connect to Ground.
3 ISUM LOG DETECTOR SUMMING NODE
4 ILOG LOG CURRENT OUTPUT
Normally No Connection; 2 mA/dB Output Current.
5 BFIN BUFFER INPUT
Optionally Used to Realize Low Frequency Post-Demodulation Filters.
6 VLOG BUFFERED LOG OUTPUT
37.5 mV/dB (100 mV to 4.5 V).
7 OPCM OUTPUT COMMON
Connect to Ground.
8 LMLO DIFFERENTIAL LIMITER OUTPUT
1.2 mA Full-Scale Output Current. Open Collector Output Must Be “Pulled” Up to VPOS with R £ 400 W .
9 LMHI DIFFERENTIAL LIMITER OUTPUT
1.2 mA Full-Scale Output Current. Open Collector Output Must Be “Pulled” Up to VPOS with R £ 400 W .
10 LADJ LIMITER LEVEL ADJUSTMENT
Optionally Used to Adjust Limiter Output Current.
11 FIL1 OFFSET LOOP LOW-PASS FILTER
Normally No Connection; a Capacitor Between FIL1 and FIL2 May Be Added to Lower the Filter Cutoff Frequency.
12 FIL2 OFFSET LOOP LOW-PASS FILTER
Normally No Connection; See Above.
13 VPOS POSITIVE SUPPLY
Connect to +5 V at 13 mA.
14 PRUP POWER UP
CMOS (5 V) Logical High = Device On (» 65 mW). CMOS (0 V) Logical Low = Device Off (» 325 mW).
15 COMM POWER SUPPLY COMMON
Connect to Ground.
16 INHI DIFFERENTIAL RF INPUT
–75 dBm to +5 dBm, Noninverting, AC-Coupled. WARNING! ESD SENSITIVE DEVICE
nately, this is not precise for several reasons.
- Log amps respond not to power but to voltage. In this re-
amps are not inherently rms responding.
- The response of a demodulating log amp depends on the
waveform. Convention assumes that the input is sinusoidal.
- The impedance in which the specified power is measured is
sinusoidal input of the same rms value. using base-10 logarithms as shown here. voltage; the second is a pin designation. quasi-dc (rectified and filtered) output voltage. would be the case if transformer coupling were used for the signal. usually specified as so many millivolts per decibel, or mV/dB. Figure 1. Nominal Transfer Function
ILOG and OPCM (output common, which is usually grounded). cade) to 41.25 mV/dB (825 mV/decade). overall filter is 2 MHz, and the 10%–90% rise time is 150 ns. BFIN is used in these cases. VPOS; typically, a 200 W resistor is used on just one output.
50 MHz, the phase typically remains within – 4° from –70 dBm
The slope is essentially independent of temperature. able at the upper end of the frequency range (Figure 15). Figure 2. Simplified Block Diagram
Figure 11. Normalized Limiter
10.7 MHz, 45 MHz, and 70 MHz
Figure 14. Logarithmic Conform-
10.7 MHz at –25°C, +25°C, and
Figure 17. V LOG Response to a
10.7 MHz CW Signal Modulated by
Figure 10. Normalized Limiter Figure 13. V LOG Plotted vs. Input Figure 16. Limiter Response at Figure 12. Supply Current vs. PRUP Figure 15. Logarithmic Conform-
45 MHz at –25°C, +25°C, and +70°C
Figure 18. Limiter Response at
Figure 22. Test Setup for Characterization Data Figure 19. V LOG Output for a Pulsed
10.7 MHz Input; Top Trace: –35 dBm
Figure 20. Example of Test Signal Figure 21. V LOG Output for 10.7 MHz
REV. B–12– OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 16-Lead Plastic DIP (N-16) PIN 1 0.87 (22.1) MAX SEATING PLANE 0.100 (2.54) BSC 0.125 (3.18) MIN 0.35 (0.89) 0.18 (4.57) 0.033 (0.84) 0.018 (0.46) 0.18 (4.57) MAX 0.300 (7.62) 0.011 (0.28) 16-Lead Narrow-Body SOIC (R-16A) 16 9 0.2440 (6.20) 0.2284 (5.80) 0.1574 (4.00) 0.1497 (3.80) PIN 1 0.3937 (10.00) 0.3859 (9.80) 0.050 (1.27) BSC SEATING PLANE 0.0098 (0.25) 0.0040 (0.10) 0.0192 (0.49) 0.0138 (0.35) 0.0688 (1.75) 0.0532 (1.35) 0.0196 (0.50) 0.0099 (0.25)3 458 0.0500 (1.27) 0.0160 (0.41) 0.0099 (0.25) 0.0075 (0.19) PRINTED IN U.S.A. C1698b–0–8/99