AD603 (Rev. K)

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Low Noise, 90 MHz Variable Gain Amplifier Data Sheet AD603 Rev. K Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 © 1993–2012 Analog Devices, Inc. All rights reserved.

FEATURES

Pin-programmable gain ranges −11 dB to +31 dB with 90 MHz bandwidth 9 dB to 51 dB with 9 MHz bandwidth Any intermediate range, for example −1 dB to +41 dB with 30 MHz bandwidth Bandwidth independent of variable gain 1.3 nV/√Hz input noise spectral density ±0.5 dB typical gain accuracy

APPLICATIONS

The AD603 is a low noise, voltage-controlled amplifier for use in RF and IF AGC systems. It provides accurate, pin-selectable gains of −11 dB to +31 dB with a bandwidth of 90 MHz or +9 dB to 51+ dB with a bandwidth of 9 MHz. Any intermediate gain range may be arranged using one external resistor. The input referred noise spectral density is only 1.3 nV/√Hz, and power consumption is 125 mW at the recommended ±5 V supplies. The decibel gain is linear in dB, accurately calibrated, and stable over temperature and supply. The gain is controlled at a high impedance (50 MΩ), low bias (200 nA) differential input; the scaling is 25 mV/dB, requiring a gain control voltage of only 1 V to span the central 40 dB of the gain range. An overrange and underrange of 1 dB is provided whatever the selected range. The gain control response time is less than 1 μs for a 40 dB change. The differential gain control interface allows the use of either differential or single-ended positive or negative control voltages. Several of these amplifiers may be cascaded and their gain control gains offset to optimize the system SNR. The AD603 can drive a load impedance as low as 100 Ω with low distortion. For a 500 Ω load in shunt with 5 pF, the total harmonic distortion for a ±1 V sinusoidal output at 10 MHz is typically −60 dBc. The peak specified output is ±2.5 V minimum into a 500 Ω load. The AD603 uses a patented proprietary circuit topology—the X-AMP®. The X-AMP comprises a variable attenuator of 0 dB to −42.14 dB followed by a fixed-gain amplifier. Because of the attenuator, the amplifier never has to cope with large inputs and can use negative feedback to define its (fixed) gain and dynamic performance. The attenuator has an input resistance of 100 Ω, laser trimmed to ±3%, and comprises a 7-stage R-2R ladder network, resulting in an attenuation between tap points of 6.021 dB. A proprietary interpolation technique provides a continuous gain control function that is linear in dB. The AD603 is specified for operation from −40°C to +85°C. FUNCTIONAL BLOCK DIAGRAM SCALING REFERENCE VG GAIN- CONTROL INTERFACE AD603 PRECISION PASSIVE INPUT ATTENUATOR FIXED-GAIN AMPLIFIER *NOMINAL VALUES. R-2R LADDER NETWORK GPOS GNEG VINP COMM RR R R R R R 2R 2R 2R 2R 2R 2R R 20Ω* 694Ω* 6.44kΩ* VOUT FDBK 00539-001 Figure 1.

Rev. K | Page 2 of 24 TABLE OF CONTENTS Programming the Fixed-Gain Amplifier Using Pin

REVISION HISTORY

4/12—Rev. J to Rev. K 12/11—Rev. I to Rev. J 5/07—Rev. G to Rev. H Inserted Evaluation Board Section, and Figure 48 to 3/05—Rev. F to Rev. G 4/04—Rev. E to Rev. F 8/03—Rev. D to Rev E

Rev. K | Page 3 of 24 SPECIFICATIONS @ TA = 25°C, VS = ±5 V , –500 mV ≤ VG ≤ +500 mV , GNEG = 0 V , –10 dB to +30 dB gain range, RL = 500 Ω, and CL = 5 pF , unless otherwise noted. Table 1. Parameter Conditions Min Typ Max Unit INPUT CHARACTERISTICS Input Resistance Pin 3 to Pin 4 97 100 103 Ω Input Capacitance 2 pF Input Noise Spectral Density1 Input short-circuited 1.3 nV/√Hz Noise Figure f = 10 MHz, gain = maximum, RS = 10 Ω 8.8 dB 1 dB Compression Point f = 10 MHz, gain = maximum, RS = 10 Ω −11 dBm Peak Input Voltage ±1.4 ±2 V OUTPUT CHARACTERISTICS −3 dB Bandwidth VOUT = 100 mV rms 90 MHz Slew Rate RL ≥ 500 Ω 275 V/µs Peak Output2 RL ≥ 500 Ω ±2.5 ±3.0 V Output Impedance f ≤ 10 MHz 2 Ω Output Short-Circuit Current 50 mA Group Delay Change vs. Gain f = 3 MHz; full gain range ±2 ns Group Delay Change vs. Frequency VG = 0 V; f = 1 MHz to 10 MHz ±2 ns Differential Gain 0.2 % Differential Phase 0.2 Degree Total Harmonic Distortion f = 10 MHz, VOUT = 1 V rms −60 dBc Third-Order Intercept f = 40 MHz, gain = maximum, RS = 50 Ω 15 dBm ACCURACY Gain Accuracy, f = 100 kHz; Gain (dB) = (40 VG + 10) dB −500 mV ≤ VG ≤ +500 mV −1 ±0.5 +1 dB TMIN to TMAX −1.5 +1.5 dB Output Offset Voltage3 VG = 0 V 20 mV TMIN to TMAX 30 mV Output Offset Variation vs. VG −500 mV ≤ VG ≤ +500 mV 20 mV TMIN to TMAX 30 mV GAIN CONTROL INTERFACE Gain Scaling Factor 100 kHz 39.4 40 40.6 dB/V TMIN to TMAX 38 42 dB/V 10.7 MHz 38.7 39.3 39.9 dB/V GNEG, GPOS Voltage Range4 −1.2 +2.0 V Input Bias Current 50 100 250 nA Input Offset Current 10 nA Differential Input Resistance Pin 1 to Pin 2 50 MΩ Response Rate Full 40 dB gain change 80 dB/µs POWER SUPPLY Specified Operating Range ±4.75 ±6.3 V Quiescent Current 12.5 17 mA TMIN to TMAX 20 mA 1 Typical open or short-circuited input; noise is lower when system is set to maximum gain and input is short-circuited. This figure includes the effects of both voltage and current noise sources. 2 Using resistive loads of 500 Ω or greater or with the addition of a 1 kΩ pull-down resistor when driving lower loads. 3 The dc gain of the main amplifier in the AD603 is ×35.7; therefore, an input offset of 100 µV becomes a 3.57 mV output offset. 4 GNEG and GPOS, gain control, and voltage range are guaranteed to be within the range of −VS + 4.2 V to +VS − 3.4 V over the full temperature range of −40°C to +85°C.

Table 3. Thermal Characteristics

Figure 4. Gain vs. VG at 100 kHz and 10.7 MHz Figure 5. Gain Error vs. Gain Control Voltage at 455 kHz,

10.7 MHz, 45 MHz, 70 MHz

Figure 6. Frequency and Phase Response vs. Gain Figure 7. Frequency and Phase Response vs. Gain Figure 8. Frequency and Phase Response vs. Gain Figure 9. Group Delay vs. Gain Control Voltage

553 PIECE SAMPLE SIZE

Figure 10. Histogram of VOS at 10 dB Gain and VOS vs. VGAIN Figure 11. Histogram of GPOS and GNEG Bias Current Figure 12. Third-Order Intermodulation Distortion at 455 kHz Figure 13. Third-Order Intermodulation Distortion at 10.7 MHz Figure 14. Typical Output Voltage Swing vs. Load Resistance Figure 15. Input Impedance vs. Frequency (Gain = −10 dB)

Figure 28. Third-Order Intercept −10 dB/+30 dB Mode, Gain = 30 dB

Rev. K | Page 12 of 24 THEORY OF OPERATION The AD603 comprises a fixed-gain amplifier, preceded by a broadband passive attenuator of 0 dB to 42.14 dB, having a gain control scaling factor of 40 dB per volt. The fixed gain is laser- trimmed in two ranges, to either 31.07 dB (×35.8) or 50 dB (×358), or it may be set to any range in between using one external resistor between Pin 5 and Pin 7. Somewhat higher gain can be obtained by connecting the resistor from Pin 5 to common, but the increase in output offset voltage limits the maximum gain to about 60 dB. For any given range, the bandwidth is independent of the voltage-controlled gain. This system provides an underrange and overrange of 1.07 dB in all cases; for example, the overall gain is −11.07 dB to +31.07 dB in the maximum bandwidth mode (Pin 5 and Pin 7 strapped). This X-AMP structure has many advantages over former methods of gain control based on nonlinear elements. Most importantly, the fixed-gain amplifier can use negative feedback to increase its accuracy. Because large inputs are first attenuated, the amplifier input is always small. For example, to deliver a ±1 V output in the −1 dB/+41 dB mode (that is, using a fixed amplifier gain of 41.07 dB), its input is only 8.84 mV; therefore, the distortion can be very low. Equally important, the small- signal gain and phase response, and thus the pulse response, are essentially independent of gain. Figure 31 is a simplified schematic. The input attenuator is a 7-section R-2R ladder network, using untrimmed resistors of nominally R = 62.5 Ω, which results in a characteristic resistance of 125 Ω ± 20%. A shunt resistor is included at the input and laser trimmed to establish a more exact input resistance of 100 Ω ± 3%, which ensures accurate operation (gain and HP corner frequency) when used in conjunction with external resistors or capacitors. The nominal maximum signal at input VINP is 1 V rms (±1.4 V peak) when using the recommended ±5 V supplies, although operation to ±2 V peak is permissible with some increase in HF distortion and feedthrough. Pin 4 (COMM) must be connected directly to the input ground; significant impedance in this connection reduces the gain accuracy. The signal applied at the input of the ladder network is attenuated by 6.02 dB by each section; therefore, the attenuation to each of the taps is progressively 0 dB, 6.02 dB, 12.04 dB, 18.06 dB, technique is employed to interpolate between these tap points, indicated by the slider in Figure 31, thus providing continuous attenuation from 0 dB to 42.14 dB. It helps in understanding the AD603 to think in terms of a mechanical means for moving this slider from left to right; in fact, its position is controlled by the voltage between Pin 1 and Pin 2. The details of the gain control interface are in the The Gain Control Interface section. The gain is at all times very exactly determined, and a linear-in- dB relationship is automatically guaranteed by the exponential nature of the attenuation in the ladder network (the X-AMP principle). In practice, the gain deviates slightly from the ideal law, by about ±0.2 dB peak (see, for example, Figure 5). NOISE PERFORMANCE An important advantage of the X-AMP is its superior noise performance. The nominal resistance seen at inner tap points is 41.7 Ω (one third of 125 Ω), which exhibits a Johnson noise spectral density (NSD) of 0.83 nV/√Hz (that is, √4kTR) at 27°C, which is a large fraction of the total input noise. The first stage of the amplifier contributes a further 1 nV/√Hz, for a total input noise of 1.3 nV/√Hz. It is apparent that it is essential to use a low resistance in the ladder network to achieve the very low specified noise level. The source impedance of the signal forms a voltage divider with the 100 Ω input resistance of the AD603. In some applications, the resulting attenuation may be unacceptable, requiring the use of an external buffer or preamplifier to match a high impedance source to the low impedance AD603. The noise at maximum gain (that is, at the 0 dB tap) depends on whether the input is short-circuited or open-circuited. When short-circuited, the minimum NSD of slightly over 1 nV/√Hz is achieved. When open-circuited, the resistance of 100 Ω looking into the first tap generates 1.29 nV/√Hz, so the noise increases to 1.63 nV/√Hz. (This last calculation would be important if the AD603 were preceded by, for example, a 900 Ω resistor to allow operation from inputs up to 10 V rms.) As the selected tap moves away from the input, the dependence of the noise on source impedance quickly diminishes. Apart from the small variations just discussed, the signal-to- noise (SNR) at the output is essentially independent of the attenuator setting. For example, on the −11 dB/+31 dB range, the fixed gain of ×35.8 raises the output NSD to 46.5 nV/√Hz. Therefore, for the maximum undistorted output of 1 V rms and a 1 MHz bandwidth, the output SNR would be 86.6 dB, that is, 20 log(1 V/46.5 µV).

0.500 V , in which case G

decreases linearly as the gain increases, as shown in Figure 46. Figure 45. Gain Error for Cascaded Stages—Parallel Control Figure 46. ISNR for Cascaded Stages—Parallel Control function of gain; it is very similar to that in the parallel mode. Figure 47. Gain Error for Cascaded Stages—Low Ripple Mode Figure 48. ISNR vs. Control Voltage—Low Ripple Mode

Rev. K | Page 19 of 24 During the time VOUT is negative with respect to the base voltage of Q1, Q1 conducts; when VOUT is positive, it is cut off. Because the average collector current of Q1 is forced to be 300 µA, and the square wave has a duty cycle of 1:1, Q1’s collector current when conducting must be 600 µA. With R8 omitted, the peak amplitude of VOUT is forced to be just the VBE of Q1 at 600 µA, typically about 700 mV , or 2 VBE peak-to-peak. This voltage, the amplitude at which the output stabilizes, has a strong negative temperature coefficient (TC), typically −1.7 mV/°C. Although this may not be troublesome in some applications, the correct value of R8 renders the output stable with temperature. To understand this, note that the current in Q2 is made to be proportional to absolute temperature (PTAT). For the moment, continue to assume that the signal is a square wave. When Q1 is conducting, V OUT is now the sum of VBE and a voltage that is PTAT and that can be chosen to have an equal but opposite TC to that of the V BE. This is actually nothing more than an application of the band gap voltage reference principle. When R8 is chosen such that the sum of the voltage across it and the V BE of Q1 is close to the band gap voltage of about 1.2 V , VOUT is stable over a wide range of temperatures, provided, of course, that Q1 and Q2 share the same thermal environment. Because the average emitter current is 600 µA during each half cycle of the square wave, a resistor of 833 Ω adds a PTAT voltage of 500 mV at 300 K, increasing by 1.66 mV/°C. In practice, the optimum value depends on the type of transistor used and, to a lesser extent, on the waveform for which the temperature stability is to be optimized; for the inexpensive 2N3904/2N3906 pair and sine wave signals, the recommended value is 806 Ω. This resistor also serves to lower the peak current in Q1 when more typical signals (usually sinusoidal) are involved, and the 1.8 kHz LP filter it forms with C AV helps to minimize distortion due to ripple in VAGC. Note that the output amplitude under sine wave conditions is higher than for a square wave because the average value of the current for an ideal rectifier is 0.637 times as large, causing the output amplitude to be 1.88 (= 1.2/0.637) V , or 1.33 V rms. In practice, the somewhat nonideal rectifier results in the sine-wave output being regulated to about 1.4 V rms, or 3.6 V p-p. The bandwidth of the circuit exceeds 40 MHz. At 10.7 MHz, the AGC threshold is 100 µV (−67 dBm) and its maximum gain is 83 dB (20 log 1.4 V/100 µV). The circuit holds its output at

1.4 V rms for inputs as low as −67 dBm to +15 dBm (82 dB),

where the input signal exceeds the maximum input rating of the AD603. For a 30 dBm input at 10.7 MHz, the second harmonic is 34 dB down from the fundamental, and the third harmonic is 35 dB down from the fundamental. CAUTION Careful component selection, circuit layout, power supply decoupling, and shielding are needed to minimize the susceptibility of the AD603 to interference from signals such as those from radio and TV stations. In bench evaluation, it is recommended to place all of the components into a shielded box and use feedthrough decoupling networks for the supply voltage. Circuit layout and construction are also critical because stray capacitances and lead inductances can form resonant circuits and are a potential source of circuit peaking, oscillation, or both.

Figure 59. 9-Pad Bare Die [CHIP] 2 For AD603SQ/883B, refer to AD603 Military data sheet. Also available as 5962-9457203MPA.

Rev. K | Page 24 of 24 NOTES ©1993–2012 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D00539-0-4/12(K)