AD600JR-REEL7

AD600_06 AD | Alldatasheet

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Dual, Low Noise, Wideband Variable Gain Amplifiers AD600/AD602 Rev. E Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2006 Analog Devices, Inc. All rights reserved.

FEATURES

2 channels with independent gain control Linear in dB gain response 2 gain ranges AD600: 0 dB to 40 dB AD602: –10 dB to +30 dB Accurate absolute gain: ±0.3 dB Low input noise: 1.4 nV/√Hz Low distortion: −60 dBc THD at ±1 V output High bandwidth: dc to 35 MHz (−3 dB) Stable group delay: ±2 ns Low power: 125 mW (maximum) per amplifier Signal gating function for each amplifier Drives high speed ADCs MIL-STD-883-compliant and DESC versions available

APPLICATIONS

Ultrasound and sonar time-gain controls High performance audio and RF AGC systems Signal measurement GENERAL DESCRIPTION The AD600/AD6021 dual channel, low noise, variable gain amplifiers are optimized for use in ultrasound imaging systems but are applicable to any application requiring precise gain, low noise and distortion, and wide bandwidth. Each independent channel provides a gain of 0 dB to +40 dB in the AD600 and −10 dB to +30 dB in the AD602. The lower gain of the AD602 results in an improved signal-to-noise ratio (SNR) at the output. However, both products have the same 1.4 nV/√Hz input noise spectral density. The decibel gain is directly proportional to the control voltage, accurately calibrated, and supply and temperature stable. To achieve the difficult performance objectives, a proprietary circuit form, the X-AMP®, was developed. Each channel of the X-AMP comprises a variable attenuator of 0 dB to −42.14 dB followed by a high speed fixed gain amplifier. In this way, the amplifier never has to cope with large inputs and can benefit from the use of negative feedback to precisely define the gain and dynamics. The attenuator is realized as a 7-stage R-2R ladder network having an input resistance of 100 Ω, laser trimmed to ±2%. The attenuation between tap points is 6.02 dB; the gain-control circuit provides continuous interpolation between these taps. The resulting control function is linear in dB. FUNCTIONAL BLOCK DIAGRAM PRECISION P ASSIVE INPUT A TTENUA TOR GATING INTERF ACE SCALING REFERENCE GAT1 A1OP A1CM C1HI C1LO A1HI A1LO VG R-2R LADDER NETWORK GAIN CONTROL INTERFACE RF2 2.24kΩ(AD600) 694Ω(AD602) RF1 20Ω FIXED-GAIN AMPLIFIER 41.07dB (AD600) 31.07dB (AD602) 500Ω 0dB –6.02dB –12.04dB –18.06dB –22.08dB –30.1dB –36.12dB –42.14dB 62.5Ω 00538-001 Figure 1. The gain-control interfaces are fully differential, providing an input resistance of ~15 MΩ and a scale factor of 32 dB/V (that is, 31.25 mV/dB) defined by an internal voltage reference. The response time of this interface is less than 1 μs. Each channel also has an independent gating facility that optionally blocks signal transmission and sets the dc output level to within a few millivolts of the output ground. The gating control input is TTL- and CMOS-compatible. The maximum gain of the AD600 is 41.07 dB, and the maximum gain of the AD602 is 31.07 dB; the −3 dB bandwidth of both models is nominally 35 MHz, essentially independent of the gain. The SNR for a 1 V rms output and a 1 MHz noise bandwidth is typically 76 dB for the AD600 and 86 dB for the AD602. The amplitude response is flat within ±0.5 dB from 100 kHz to 10 MHz; over this frequency range, the group delay varies by less than ±2 ns at all gain settings. Each amplifier channel can drive 100 Ω load impedances with low distortion. For example, the peak specified output is ±2.5 V minimum into a 500 Ω load or ±1 V into a 100 Ω load. For a 200 Ω load in shunt with 5 pF, the total harmonic distortion for a ±1 V sinusoidal output at 10 MHz is typically −60 dBc. The AD600J/AD602J are specified for operation from 0°C to 70°C and are available in 16-lead PDIP (N) and 16-lead SOIC_W packages. The AD600A/AD602A are specified for operation from −40°C to +85°C and are available in 16-lead CERDIP (Q) and 16-lead SOIC_W packages. The AD600S/ AD602S are specified for operation from −55°C to +125°C, are available in a 16-lead CERDIP (Q) package, and are MIL-STD-883-compliant. The AD600S/AD602S are also available under DESC SMD 5962-94572. 1 Patented.

Rev. E | Page 2 of 28 TABLE OF CONTENTS Time-Gain Control (TGC) and Time-Variable A Wide Range, RMS-Linear dB Measurement System (2 MHz 100 dB to 120 dB RMS Responding Constant Bandwidth A 100 dB RMS/AGC System with Minimal Gain Error A 120 dB RMS/AGC System with Optimal SNR

REVISION HISTORY

1/06—Rev. D to Rev. E 3/04—Rev. C to Rev. D 5/02—Rev. B to Rev. C 8/01—Rev. A to Rev. B

Rev. E | Page 3 of 28 SPECIFICATIONS Each amplifier section at TA = 25°C, VS = ±5 V , −625 mV ≤ VG ≤ +625 mV , RL = 500 Ω, and CL = 5 pF, unless otherwise noted. Specifications for the AD600/AD602 are identical, unless otherwise noted. Table 1. AD600J/AD602J1 AD600A/AD602A1 Parameter Conditions Min Typ Max Min Typ Max Unit INPUT CHARACTERISTICS Input Resistance Pin 2 to Pin 3; Pin 6 to Pin 7 98 100 102 95 100 105 Ω Input Capacitance 2 2 pF Input Noise Spectral Density2 1.4 1.4 nV/√Hz Noise Figure RS = 50 Ω, maximum gain 5.3 5.3 dB RS = 200 Ω, maximum gain 2 2 dB Common-Mode Rejection Ratio f = 100 kHz 30 30 dB OUTPUT CHARACTERISTICS −3 dB Bandwidth VOUT = 100 mV rms 35 35 MHz Slew Rate 275 275 V/μs Peak Output3 RL ≥ 500 Ω ±2.5 ±3 ±2.5 ±3 V Output Impedance f ≤ 10 MHz 2 2 Ω Output Short-Circuit Current 50 50 mA Group Delay Change vs. Gain f = 3 MHz; full gain range ±2 ±2 ns Group Delay Change vs. Frequency VG = 0 V, f = 1 MHz to 10 MHz ±2 ±2 ns Total Harmonic Distortion RL= 200 Ω, VOUT = ±1 V peak, RPD = 1 kΩ −60 −60 dBc ACCURACY AD600 Gain Error 0 dB to 3 dB gain 0 +0.5 +1 −0.5 +0.5 +1.5 dB 37 dB to 40 dB gain −1 −0.5 0 −1.5 −0.5 +0.5 dB Maximum Output Offset Voltage4 VG = –625 mV to +625 mV 10 50 10 65 mV Output Offset Variation VG = –625 mV to +625 mV 10 50 10 65 mV AD602 Gain Error –10 dB to –7 dB gain 0 +0.5 +1 –0.5 +0.5 +1.5 dB 27 dB to 30 dB gain −1 −0.5 0 −1.5 −0.5 +0.5 dB Maximum Output Offset Voltage4 VG = −625 mV to +625 mV 5 30 10 45 mV Output Offset Variation VG = −625 mV to +625 mV 5 30 10 45 mV GAIN CONTROL INTERFACE Gain Scaling Factor +3 dB to +37 dB (AD600); −7 dB to +27 dB (AD602) 31.7 32 32.3 30.5 32 33.5 dB/V Common-Mode Range −0.75 +2.5 −0.75 +2.5 V Input Bias Current 0.35 1 0.35 1 μA Input Offset Current 10 50 10 50 nA Differential Input Resistance Pin 1 to Pin 16; Pin 8 to Pin 9 15 15 MΩ Response Rate Full 40 dB gain change 40 40 dB/μs

Rev. E | Page 4 of 28 AD600J/AD602J 1 AD600A/AD602A1 Parameter Conditions Min Typ Max Min Typ Max Unit SIGNAL GATING INTERFACE Logic Input LO (Output On) 0.8 0.8 V Logic Input HI (Output Off) 2.4 2.4 V Response Time On to off, off to on 0.3 0.3 μs Input Resistance Pin 4 to Pin 3; Pin 5 to Pin 6 30 30 kΩ Output Gated Off Output Offset Voltage ±10 ±100 ±10 ±400 mV Output Noise Spectral Density 65 65 nV/√Hz Signal Feedthrough @ 1 MHz AD600 −80 −80 dB AD602 −70 −70 dB POWER SUPPLY Specified Operating Range ±4.75 ±5.25 ±4.75 ±5.25 V Quiescent Current 11 12.5 11 14 mA 1 Specifications shown in boldface are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. All minimum and maximum specifications guaranteed, although only those shown in boldface are tested on all production units. 2 Typical open- or short-circuited input; noise is lower when the system is set to maximum gain and the input is short-circuited. This figure includes the effects of both voltage and current noise sources. 3 With an additional 1 kΩ pull-down resistor, if RL < 500 Ω. 4 The dc gain of the main amplifier in the AD600 is × 113; therefore, an input offset of only 100 μV becomes an 11.3 mV output offset. In the AD602, the amplifier’s gain is × 35.7; therefore, an input offset of 100 μV becomes a 3.57 mV output offset.

Rev. E | Page 5 of 28 ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Rating Supply Voltage ±VS ±7.5 V Input Voltages Pin 1, Pin 8, Pin 9, Pin 16 ±VS Pin 2, Pin 3, Pin 6, Pin 7 ±2 V continuous ±VS for 10 ms Pin 4, Pin 5 ±VS Internal Power Dissipation 600 mW Operating Temperature Range J Grade 0°C to 70°C A Grade −40°C to +85°C S Grade −55°C to +125°C Storage Temperature Range −65°C to +150°C Lead Temperature (Soldering 60 sec) 300°C θJA 16-Lead PDIP 85°C/W 16-Lead SOIC_W 100°C/W 16-Lead CERDIP 120°C/W Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD CAUTION ESD (electrostatic discharge) sensitive device. Electros tatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge wi thout detection. Although this product features proprietary ESD protection circuitry, permanent dama ge may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD pr ecautions are recommended to avoid performance degradation or loss of functionality.

Figure 2. Pin Configuration Table 3. Pin Function Descriptions

1 C1LO CH1 Gain-Control Input LO (Positive Voltage Reduces CH1 Gain)

2 A1HI CH1 Signal Input HI (Positive Voltage Increases CH1 Output)

3 A1LO CH1 Signal Input LO (Usually Connected to CH1 Input Ground)

4 GAT1 CH1 Gating Input (A Logic HI Shuts Off CH1 Signal Path)

5 GAT2 CH2 Gating Input (A Logic HI Shuts Off CH2 Signal Path)

6 A2LO CH2 Signal Input LO (Usually Connected to CH2 Input Ground)

7 A2HI CH2 Signal Input HI (Positive Voltage Increases CH2 Output)

8 C2LO CH2 Gain-Control Input LO (Positive Voltage Reduces CH2 Gain)

9 C2HI CH2 Gain-Control Input HI (Positive Voltage Increases CH2 Gain)

10 A2CM CH2 Common (Usually Connected to CH2 Output Ground)

11 A2OP CH2 Output

12 VNEG Negative Supply for Both Amplifiers

13 VPOS Positive Supply for Both Amplifiers

14 A1OP CH1 Output

15 A1CM CH1 Common (Usually Connected to CH1 Output Ground)

16 C1HI CH1 Gain-Control Input HI (Positive Voltage Increases CH1 Gain)

Figure 3. Gain Error vs. Gain Control Voltage Figure 4. AD600 Frequency and Phase Response vs. Gain Figure 5. AD602 Frequency and Phase Response vs. Gain

8.4 GROUP DELA Y (ns)

Figure 6. AD600 and AD602 Typical Group Delay vs. VC Figure 7. Third-Order Intermodulation Distortion, VOUT = 2 V p-p, RL = 500 Ω Figure 8. Typical Output Voltage vs. Load Resistance

renders the output stable with temperature. provided Q1 and the AD590 share the same thermal environment.

200 Hz LP filter it forms with C2 helps to minimize distortion

at high gains when using a 5 V supply. gain of this AGC system actually runs from –6 dB to +74 dB.

1 V rms output at the minimum gain, which exceeds the 1 V rms

transistor can be used here to reduce HF peaking. Figure 38. AC Response at the Stabilized Output Level of 1.3 V rms

Figure 52. VLOG Is Linear over the Full 120 dB Range Figure 52 shows VLOG to be linear over a full 120 dB range. functions bounded by ±0.2 dB (dotted lines) from 6 μV to 2 V . the only sign that the gains are now sequential. rms over the full 120 dB range. Figure 55. The SNR degrades uniformly as the gain is increased. Figure 53. Error Ripple due to the Individual Gain Functions

250 GAIN ERROR (mV)

Figure 54. VAGC Remains Close to Its Setpoint of Figure 55. SNR vs. Control Voltage for Parallel Gain Control (See Figure 47) In contrast, the SNR for the sequential mode is shown in Figure 56. VCA section has its gain varied, the SNR remains constant. Figure 56. SNR vs. Control Voltage for Sequential Gain Control (See Figure 51)

Rev. E | Page 28 of 28 ORDERING GUIDE Model Gain Range Temperature Range Package Description Package Option AD600AQ 0 dB to 40 dB −40°C to +85°C 16-Lead CERDIP Q-16 AD600AR 0 dB to 40 dB −40°C to +85°C 16-Lead SOIC_W RW-16 AD600AR-REEL 0 dB to 40 dB −40°C to +85°C 16-Lead SOIC_W RW-16 AD600AR-REEL7 0 dB to 40 dB −40°C to +85°C 16-Lead SOIC_W RW-16 AD600ARZ1 0 dB to 40 dB −40°C to +85°C 16-Lead SOIC_W RW-16 AD600ARZ-R71 0 dB to 40 dB −40°C to +85°C 16-Lead SOIC_W RW-16 AD600ARZ-RL1 0 dB to 40 dB −40°C to +85°C 16-Lead SOIC_W RW-16 AD600JN 0 dB to 40 dB 0°C to 70°C 16-Lead PDIP N-16 AD600JNZ1 0 dB to 40 dB 0°C to 70°C 16-Lead PDIP N-16 AD600JR 0 dB to 40 dB 0°C to 70°C 16-Lead SOIC_W RW-16 AD600JR-REEL 0 dB to 40 dB 0°C to 70°C 16-Lead SOIC_W RW-16 AD600JR-REEL7 0 dB to 40 dB 0°C to 70°C 16-Lead SOIC_W RW-16 AD600JRZ1 0 dB to 40 dB 0°C to 70°C 16-Lead SOIC_W RW-16 AD600JRZ-R71 0 dB to 40 dB 0°C to 70°C 16-Lead SOIC_W RW-16 AD600JRZ-RL1 0 dB to 40 dB 0°C to 70°C 16-Lead SOIC_W RW-16 AD600SQ/883B2 0 dB to 40 dB −55°C to +125°C 16-Lead CERDIP Q-16 AD602AQ −10 dB to +30 dB −40°C to +85°C 16-Lead CERDIP Q-16 AD602AR −10 dB to +30 dB −40°C to +85°C 16-Lead SOIC_W RW-16 AD602AR-REEL −10 dB to +30 dB −40°C to +85°C 16-Lead SOIC_W RW-16 AD602AR-REEL7 −10 dB to +30 dB −40°C to +85°C 16-Lead SOIC_W RW-16 AD602ARZ1 −10 dB to +30 dB −40°C to +85°C 16-Lead SOIC_W RW-16 AD602ARZ-R71 −10 dB to +30 dB −40°C to +85°C 16-Lead SOIC_W RW-16 AD602ARZ-RL1 −10 dB to +30 dB −40°C to +85°C 16-Lead SOIC_W RW-16 AD602JCHIPS DIE AD602JN −10 dB to +30 dB 0°C to 70°C 16-Lead PDIP N-16 AD602JNZ1 −10 dB to +30 dB 0°C to 70°C 16-Lead PDIP N-16 AD602JR −10 dB to +30 dB 0°C to 70°C 16-Lead SOIC_W RW-16 AD602JR-REEL –10 dB to +30 dB 0°C to 70°C 16-Lead SOIC_W RW-16 AD602JR-REEL7 −10 dB to +30 dB 0°C to 70°C 16-Lead SOIC_W RW-16 AD602JRZ1 −10 dB to +30 dB 0°C to 70°C 16-Lead SOIC_W RW-16 AD602JRZ-R71 –10 dB to +30 dB 0°C to 70°C 16-Lead SOIC_W RW-16 AD602JRZ-RL1 −10 dB to +30 dB 0°C to 70°C 16-Lead SOIC_W RW-16 AD602SQ/883B3 −10 dB to +30 dB −55°C to +150°C 16-Lead CERDIP Q-16 1 Z = Pb-free part. 2 Refer to AD600/AD602 military data sheet. Also available as 5962-9457201MEA. 3 Refer to AD600/AD602 military data sheet. Also available as 5962-9457202MEA. ©2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C00538-0-1/06(E)