AD586BRZ

AD586_05 AD | Alldatasheet

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 16

Technical content

5 V Reference

Rev. G Information furn ished by An alog D evices is believed to be accurate and reliable. However, n o resp onsibility is assume d b y A nalog De vices fo r its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or p atent rights of Analog De vices. Trademarks an d registered trademarks are the property of their respective owners. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 © 2005 Analog Devices, Inc. All rights reserved.

FEATURES

Laser trimmed to high accuracy 5.000 V ±2.0 mV (M grade) Trimmed temperature coefficient 2 ppm/°C max, 0°C to 70°C (M grade) 5 ppm/°C max, −40°C to +85°C (B and L grades) 10 ppm/°C max, −55°C to +125°C (T grade) Low noise, 100 nV/√Hz Noise reduction capability Output trim capability MIL-STD-883-compliant versions available Industrial temperature range SOICs available Output capable of sourcing or sinking 10 mA GENERAL DESCRIPTION The AD586 represents a major advance in state-of-the-art monolithic voltage references. Using a proprietary ion-implanted buried Zener diode and laser wafer trimming of high stability thin-film resistors, the AD586 provides outstanding perform- ance at low cost. The AD586 offers much higher performance than most other 5 V references. Because the AD586 uses an industry-standard pinout, many systems can be upgraded instantly with the AD586. The buried Zener approach to reference design provides lower noise and drift than band gap voltage references. The AD586 offers a noise reduction pin that can be used to further reduce the noise level generated by the buried Zener. The AD586 is recommended for use as a reference for 8-, 10-, 12-, 14-, or 16-bit DACs that require an external precision reference. The device is also ideal for successive approximation or integrating ADCs with up to 14 bits of accuracy and, in general, can offer better performance than the standard on-chip references. The AD586J, AD586K, AD586L, and AD586M are specified for operation from 0°C to 70°C; the AD586A and AD586B are specified for −40°C to +85°C operation; and the AD586S and AD586T are specified for −55°C to +125°C operation. The AD586J, AD586K, AD586L, and AD586M are available in an 8-lead PDIP; the AD586J, AD586K, AD586L, AD586A, and AD586B are available in an 8-lead SOIC package; and the AD586J, AD586K, AD586L, AD586S, and AD586T are available in an 8-lead CERDIP package. RS RZ1 RZ2 RF RT RI AD586 GND VIN NOISE REDUCTION VOUT TRIM NOTES 1. PINS 1, 3, AND 7 ARE INTERNAL TEST POINTS. MAKE NO CONNECTIONS TO THESE POINTS. 00529-001 Figure 1. PRODUCT HIGHLIGHTS 1. Laser trimming of both initial accuracy and temperature coefficients results in very low errors over temperature without the use of external components. The AD586M has a maximum deviation from 5.000 V of ±2.45 mV between 0°C and 70°C, and the AD586T guarantees ±7.5 mV maximum total error between −55°C and +125°C. 2. For applications requiring higher precision, an optional fine-trim connection is provided. 3. Any system using an industry-standard pinout reference can be upgraded instantly with the AD586. 4. Output noise of the AD586 is very low, typically 4 µV p-p. A noise reduction pin is provided for additional noise filtering using an external capacitor. 5. The AD586 is available in versions compliant with MIL-STD-883. Refer to the Analog Devices Military Products Databook or the current AD586/883B data sheet for detailed specifications.

Rev. G | Page 2 of 16 TABLE OF CONTENTS

REVISION HISTORY

3/05—Rev. F to Rev. G 1/04—Rev. E to Rev. F 7/03—Rev. D to Rev. E 4/01—Rev. C to Rev. D Changed Figure 10 to Table 1 11/95—Revision 0: Initial Version

Rev. G | Page 3 of 16 SPECIFICATIONS AD586J, AD586K/AD586A, AD586L/AD586B @ TA = 25°C, VIN = 15 V , unless otherwise noted. Specifications in boldface are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. All minimum and maximum specifications are guaranteed, although only those shown in boldface are tested on all production units, unless otherwise specified. Table 1. AD586J AD586K/AD586A AD586L/AD586B Parameter Min Typ Max Min Typ Max Min Typ Max Unit OUTPUT VOLTAGE DRIFT1 0°C to 70°C 25 15 5 ppm/°C −55°C to +125°C ppm/°C GAIN ADJUSTMENT +6 +6 +6 % −2 −2 −2 % LINE REGULATION1

10.8 V < + VIN < 36 V

TMIN to TMAX ±100 ±100 ±100 µV/V

11.4 V < +VIN < 36 V

TMIN to TMAX µV/V LOAD REGULATION1 Sourcing 0 mA < IOUT < 10 mA 25°C 100 100 100 µV/mA TMIN to TMAX 100 100 100 µV/mA Sinking −10 mA < IOUT < 0 mA 25°C 400 400 400 µV/mA QUIESCENT CURRENT 2 3 2 3 2 3 mA POWER CONSUMPTION 30 30 30 mW OUTPUT NOISE

0.1 Hz to 10 Hz 4 4 4 µV p-p

Spectral Density, 100 Hz 100 100 100 nV/√Hz LONG-TERM STABILITY 15 15 15 ppm/1000 hr SHORT-CIRCUIT CURRENT-TO-GROUND 45 60 45 60 45 60 mA TEMPERATURE RANGE Specified Performance2 0 70 0 −40 (K grade) (A grade) +85 −40 (L grade) (B grade) +85 Operating Performance3 −40 +85 −40 +85 −40 +85 °C 1 Maximum output voltage drift is guaranteed for all packages and grades. CERDIP packaged parts are also 100°C production tested. 2 Lower row shows specified performance for A and B grades. 3 The operating temperature range is defined as the temperature extremes at which the device will still function. Parts may deviate from their specified performance outside their specified temperature range.

Rev. G | Page 4 of 16 AD586M, AD586S, AD586T @ TA = 25°C, VIN = 15 V , unless otherwise noted. Specifications in boldface are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. All minimum and maximum specifications are guaranteed, although only those shown in boldface are tested on all production units, unless otherwise specified. Table 2. AD586M AD586S AD586T Parameter Min Typ Max Min Typ Max Min Typ Max Unit OUTPUT VOLTAGE DRIFT1 0°C to 70°C 2 ppm/°C −55°C to +125°C 20 10 ppm/°C GAIN ADJUSTMENT +6 +6 +6 % −2 −2 −2 % LINE REGULATION1

10.8 V < +VIN < 36 V

TMIN to TMAX ±100 µV/V TMIN to TMAX ±150 ±150 µV/V LOAD REGULATION1 Sourcing 0 mA < IOUT < 10 mA 25°C 100 150 150 µV/mA TMIN to TMAX 100 150 150 µV/mA Sinking −10 mA < IOUT < 0 mA 25°C 400 400 400 µV/mA QUIESCENT CURRENT 2 3 2 3 2 3 mA POWER CONSUMPTION 30 30 30 mW OUTPUT NOISE Spectral Density, 100 Hz 100 100 100 nV/√Hz LONG-TERM STABILITY 15 15 15 ppm/1000 hr SHORT-CIRCUIT CURRENT-TO-GROUND 45 60 45 60 45 60 mA TEMPERATURE RANGE Specified Performance2 0 70 −55 +125 −55 +125 °C Operating Performance3 −40 +85 −55 +125 −55 +125 °C 1 Maximum output voltage drift is guaranteed for all packages and grades. CERDIP packaged parts are also 100°C production tested. 2 Lower row shows specified performance for A and B grades. 3 The operating temperature range is defined as the temperature extremes at which the device will still function. Parts may deviate from their specified performance outside their specified temperature range.

Rev. G | Page 5 of 16 ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Rating VIN to Ground 36 V Power Dissipation (25°C) 500 mW Storage Temperature −65°C to +150°C Lead Temperature (Soldering, 10 sec) 300°C Package Thermal Resistance θJC 22°C/W θJA 110°C/W Output Protection Output safe for indefinite short to ground or VIN. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and tes t eq uipment and can dis charge without detection. Although this product features proprietary ESD protection circ uitry, permanent dama ge may occur on dev ices subj ected to high energy electrostatic di scharges. T herefore, proper ESD precautions are recom mended to avoid performan ce degradation or loss of functionality.

thin-film resistors, as shown in the block diagram in Figure 5. coefficient of under 2 ppm/°C.

1. PINS 1, 3, AND 7 ARE INTERNAL TEST POINTS.

MAKE NO CONNECTIONS TO THESE POINTS. Figure 5. Functional Block Diagram on other device characteristics. Figure 6. Optional Fine-Trim Configuration the buried Zener, which contributes approximately 100 nV/√Hz. filter with a 9.922 Hz bandwidth.

12 Hz, and will reduce the high frequency (to 1 MHz) noise to

AD586, both with and without a 1 µF capacitor. Figure 7. 0.1 Hz to 10 Hz Noise

5 V REFERENCE WITH MULTIPLYING

multiplying DAC and the AD711 high speed BiFET op amp.

0 V TO –5V

Figure 20. Low Power 12-Bit CMOS DAC Application amps, the DAC outputs will exhibit similar gain TCs. Figure 21. AD586 as a 5 V Reference for a CMOS that are below the noise level of the references. Figure 22. Multiple AD586s Stacked for Precision 5 V, 10 V, and 15 V Outputs Figure 23. Precision Current Source Figure 24 and Figure 25 can deliver up to 4 amps to the load.

Rev. G | Page 14 of 16 ORDERING GUIDE Model Initial Error Temperature Coefficient Temperature Range Package

Description

AD586JN 20 mV 25 ppm/°C 0°C to 70°C PDIP N-8 AD586JNZ1 20 mV 25 ppm/°C 0°C to 70°C PDIP N-8 AD586JQ 20 mV 25 ppm/°C 0°C to 70°C CERDIP Q-8 AD586JR 20 mV 25 ppm/°C 0°C to 70°C SOIC R-8 AD586JR-REEL7 20 mV 25 ppm/°C 0°C to 70°C SOIC R-8 1,000 AD586JRZ1 20 mV 25 ppm/°C 0°C to 70°C SOIC R-8 AD586JRZ-REEL71 20 mV 25 ppm/°C 0°C to 70°C SOIC R-8 1,000 AD586KN 5 mV 15 ppm/°C 0°C to 70°C PDIP N-8 AD586KNZ1 5 mV 15 ppm/°C 0°C to 70°C PDIP N-8 AD586KQ 5 mV 15 ppm/°C 0°C to 70°C CERDIP Q-8 AD586KR 5 mV 15 ppm/°C 0°C to 70°C SOIC R-8 AD586KR-REEL 5 mV 15 ppm/°C 0°C to 70°C SOIC R-8 2,500 AD586KR-REEL7 5 mV 15 ppm/°C 0°C to 70°C SOIC R-8 1,000 AD586KRZ1 5 mV 15 ppm/°C 0°C to 70°C SOIC R-8 AD586KRZ-REEL1 5 mV 15 ppm/°C 0°C to 70°C SOIC R-8 2,500 AD586KRZ-REEL71 5 mV 15 ppm/°C 0°C to 70°C SOIC R-8 1,000 AD586LN 2.5 mV 5 ppm/°C 0°C to 70°C PDIP N-8 AD586LNZ1 2.5 mV 5 ppm/°C 0°C to 70°C PDIP N-8 AD586LR 2.5 mV 5 ppm/°C 0°C to 70°C SOIC R-8 AD586LR-REEL 2.5 mV 5 ppm/°C 0°C to 70°C SOIC R-8 2,500 AD586LR-REEL7 2.5 mV 5 ppm/°C 0°C to 70°C SOIC R-8 1,000 AD586LRZ1 2.5 mV 5 ppm/°C 0°C to 70°C SOIC R-8 AD586LRZ-REEL1 2.5 mV 5 ppm/°C 0°C to 70°C SOIC R-8 2,500 AD586LRZ-REEL71 2.5 mV 5 ppm/°C 0°C to 70°C SOIC R-8 1,000 AD586MN 2 mV 2 ppm/°C 0°C to 70°C PDIP N-8 AD586MNZ1 2 mV 2 ppm/°C 0°C to 70°C PDIP N-8 AD586AR 5 mV 15 ppm/°C −40°C to +85°C SOIC R-8 AD586AR-REEL 5 mV 15 ppm/°C −40°C to +85°C SOIC R-8 2,500 AD586ARZ1 5 mV 15 ppm/°C −40°C to +85°C SOIC R-8 AD586ARZ-REEL1 5 mV 15 ppm/°C −40°C to +85°C SOIC R-8 2,500 AD586ARZ-REEL71 5 mV 15 ppm/°C −40°C to +85°C SOIC R-8 1,000 AD586BR 2.5 mV 5 ppm/°C −40°C to +85°C SOIC R-8 AD586BR-REEL7 2.5 mV 5 ppm/°C −40°C to +85°C SOIC R-8 1,000 AD586BRZ1 2.5 mV 5 ppm/°C −40°C to +85°C SOIC R-8 AD586BRZ-REEL1 2.5 mV 5 ppm/°C −40°C to +85°C SOIC R-8 2,500 AD586BRZ-REEL71 2.5 mV 5 ppm/°C −40°C to +85°C SOIC R-8 1,000 AD586LQ 2.5 mV 5 ppm/°C 0°C to 70°C CERDIP Q-8 AD586SQ 10 mV 20 ppm/°C −55°C to +125°C CERDIP Q-8 AD586TQ 2.5 mV 10 ppm/°C −55°C to +125°C CERDIP Q-8 AD586TQ/883B2 2.5 mV 10 ppm/°C −55°C to +125°C CERDIP Q-8 1 Z = Pb-free part. 2 For details on grade and package offerings screened in accordance with MIL-STD-883, refer to the Analog Devices Military Products Databook or the current AD586/883B data sheet.

Rev. G | Page 15 of 16 NOTES

Rev. G | Page 16 of 16 NOTES © 2005 Analo g De vices, Inc. All rights reserve d. Tra demarks and registered tra demarks are the prop erty of their respective owners . C00529–0–3/05(G)