AD5620CRM-3REEL7

DATASHEET SEARCH SITE | WWW.ALLDATASHEET.COM

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 28

Technical content

Single, 12-/14-/16-Bit nanoDAC with 5 ppm/°C On-Chip Reference in SOT-23 AD5620/AD5640/AD5660 Rev. F Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2005–2010 Analog Devices, Inc. All rights reserved.

FEATURES

Low power, single nanoDACs AD5660: 16 bits AD5640: 14 bits AD5620: 12 bits 12-bit accuracy guaranteed On-chip, 1.25 V/2.5 V, 5 ppm/°C reference Tiny 8-lead SOT-23/MSOP packages Power-down to 480 nA @ 5 V, 200 nA @ 3 V

3 V/5 V single power supply

Guaranteed 16-bit monotonic by design Power-on reset to zero/midscale 3 power-down functions Serial interface with Schmitt-triggered inputs Rail-to-rail operation SYNC interrupt facility

APPLICATIONS

Portable battery-powered instruments Digital gain and offset adjustment Programmable voltage and current sources Programmable attenuators PRODUCT HIGHLIGHTS 1. 12-/14-/16-bit nanoDAC—12-bit accuracy guaranteed. 2. On-chip, 1.25 V/2.5 V , 5 ppm/°C reference. 3. Available in 8-lead SOT-23 and 8-lead MSOP packages. 4. Power-on reset to 0 V or midscale. 5. 10 μs settling time. Table 1. Related Device voltage-out DACs and are guaranteed monotonic by design.

1.25 V , 5 ppm/°C reference, giving a full-scale output voltage

available at the VREFOUT pin. 2.5 mW at 5 V , reducing to 1 μW in power-down mode. MICROWIRE™, and DSP interface standards.

Rev. F | Page 2 of 28 TABLE OF CONTENTS Using a REF19x as a Power Supply for the Using the AD5660 as an Isolated, Programmable, 4 mA to Using the AD5620/AD5640/AD5660 with a Galvanically

REVISION HISTORY

12/10—Rev. E to Rev. F 7/10—Rev. D to Rev. E Moved Using the AD5660 as an Isolated, Programmable, 4 mA 3/10—Rev. C to Rev. D 10/09—Rev. B to Rev. C 5/06—Rev. A to Rev. B 9/05—Rev. 0 to Rev. A 7/05—Revision 0: Initial Version

Rev. F | Page 3 of 28 SPECIFICATIONS AD5620/AD5640/AD5660-2-3 VDD = 4.5 V to 5.5 V , RL = 2 kΩ to GND, CL = 200 pF to GND, CREFOUT = 100 nF; all specifications TMIN to TMAX, unless otherwise noted. Table 2. Parameter A Grade1 B Grade 1 C Grade 1 Unit Conditions/Comments STATIC PERFORMANCE2 AD5660 Resolution 16 16 16 Bits min Relative Accuracy ±32 ±16 ±16 LSB max Differential Nonlinearity ±1 ±1 ±1 LSB max Guaranteed monotonic by design AD5640 Resolution 14 14 14 Bits min Relative Accuracy ±8 ±4 ±4 LSB max Differential Nonlinearity ±0.5 ±0.5 ±0.5 LSB max Guaranteed monotonic by design AD5620 Resolution 12 12 12 Bits min Relative Accuracy ±6 ±1 ±1 LSB max Differential Nonlinearity ±0.25 ±0.25 ±0.25 LSB max Guaranteed monotonic by design Zero-Code Error 2 2 2 mV typ All 0s loaded to DAC register 10 10 10 mV max Offset Error ±10 ±10 ±10 mV max Full-Scale Error −0.15 −0.15 −0.15 % FSR typ All 1s loaded to DAC register ±1 ±1 ±1 % FSR max Gain Error ±1.5 ±1.5 ±1.5 % FSR max Zero-Code Error Drift ±2 ±2 ±2 μV/°C typ Gain Temperature Coefficient ±2.5 ±2.5 ±2.5 ppm typ Of FSR/°C DC Power Supply Rejection Ratio −75 −75 −75 dB typ DAC code = midscale; V DD = 5 V ± 10% OUTPUT CHARACTERISTICS3 Output Voltage Range 0 0 0 V min V DD V DD V DD V max Output Voltage Settling Time 8 8 8 μs typ ¼ to ¾ scale change settling to ±2 LSB 10 10 10 μs max RL = 2 kΩ; 0 pF < CL < 200 pF Slew Rate 1.5 1.5 1.5 V/μs typ ¼ to ¾ scale Capacitive Load Stability 2 2 2 nF typ R L = ∞ 10 10 10 nF typ RL = 2 kΩ Output Noise Spectral Density 80 80 80 nV/√Hz typ DAC code = midscale, 10 kHz Output Noise (0.1 Hz to 10 Hz) 45 45 45 μV p-p typ DAC code = midscale Digital-to-Analog Glitch Impulse 5 5 5 nV-s typ 1 LSB change around major carry Digital Feedthrough 0.1 0.1 0.1 nV-s typ DC Output Impedance 0.5 0.5 0.5 Ω typ Short-Circuit Current 30 30 30 mA typ V DD = 5 V Power-Up Time 5 5 5 μs typ Coming out of power-down mode; V DD = 5 V REFERENCE OUTPUT Output Voltage 2.495 2.495 2.495 V min At ambient 2.505 2.505 2.505 V max Reference TC3 ±10 ±10 ±5 ppm/°C typ ±10 ppm/°C max Output Impedance 7.5 7.5 7.5 kΩ typ

Rev. F | Page 4 of 28 Parameter A Grade1 B Grade 1 C Grade 1 Unit Conditions/Comments LOGIC INPUTS3 Input Current ±2 ±2 ±2 μA max All digital inputs VINL, Input Low Voltage 0.8 0.8 0.8 V max V DD = 5 V VINH, Input High Voltage 2 2 2 V min V DD = 5 V Pin Capacitance 3 3 3 pF typ POWER REQUIREMENTS VDD 4.5 4.5 4.5 V min All digital inputs at 0 V or V DD 5.5 5.5 5.5 V max DAC active and excluding load current IDD (Normal Mode) VDD = 4.5 V to 5.5 V 1 1 1 mA max V IH = VDD and VIL = GND IDD (All Power-Down Modes) VDD = 4.5 V to 5.5 V 1 1 1 μA max V IH = VDD and VIL = GND 1 Temperature range is −40°C to +105°C, typical at +25°C. 2 Linearity calculated using a reduced code range: AD5660 (Code 511 to Code 65024); AD5640 (Code 128 to Code 16256); AD5620 (Code 32 to Code 4064). Output unloaded. Linearity tested with VDD = 5.5 V. If part is operated with a VDD < 5 V, the output is clamped to VDD. 3 Guaranteed by design and characterization; not production tested.

Rev. F | Page 5 of 28 AD5620/AD5640/AD5660-1 VDD1 = 2.7 V to 3.3 V , RL = 2 kΩ to GND, CL = 200 pF to GND, CREFOUT = 100 nF; all specifications TMIN to TMAX, unless otherwise noted. Table 3. Parameter A Grade2 B Grade 2 C Grade 2 Unit Conditions/Comments STATIC PERFORMANCE3 AD5660 Resolution 16 16 16 Bits min Relative Accuracy ±32 ±16 ±16 LSB max Differential Nonlinearity ±1 ±1 ±1 LSB max Guaranteed monotonic by design AD5640 Resolution 14 14 14 Bits min Relative Accuracy ±8 ±4 ±4 LSB max Differential Nonlinearity ±0.5 ±0.5 ±0.5 LSB max Guaranteed monotonic by design AD5620 Resolution 12 12 12 Bits min Relative Accuracy ±6 ±1 ±1 LSB max Differential Nonlinearity ±0.25 ±0.25 ±0.25 LSB max Guaranteed monotonic by design Zero-Code Error 2 2 2 mV typ All 0s loaded to DAC register 8 8 8 mV max Offset Error ±9 ±9 ±9 mV max Full-Scale Error ±0.15 ±0.15 ±0.15 % FSR typ All 1s loaded to DAC register Gain Error ±0.85 ±0.85 ±0.85 % FSR max Zero-Code Error Drift ±2 ±2 ±2 μV/°C typ Gain Temperature Coefficient ±2.5 ±2.5 ±2.5 ppm typ Of FSR/°C DC Power Supply Rejection Ratio −60 −60 −60 dB typ DAC code = midscale; V DD = 3 V ± 10% OUTPUT CHARACTERISTICS4 Output Voltage Range 0 0 V min V DD V DD V DD V max Output Voltage Settling Time 8 8 8 μs typ ¼ to ¾ scale change settling to ±2 LSB 10 10 10 μs max RL = 2 kΩ; 0 pF < CL < 200 pF Slew Rate 1.5 1.5 1.5 V/μs typ ¼ to ¾ scale Capacitive Load Stability 2 2 2 nF typ R L = ∞ 10 10 10 nF typ RL = 2 kΩ Output Noise Spectral Density 80 80 80 nV/√Hz typ DAC code = midscale, 10 kHz Output Noise (0.1 Hz to 10 Hz) 20 20 20 μV p-p typ DAC code = midscale Digital-to-Analog Glitch Impulse 5 5 5 nV-s typ 1 LSB change around major carry Digital Feedthrough 0.1 0.1 0.1 nV-s typ DC Output Impedance 0.5 0.5 0.5 Ω typ Short-Circuit Current 30 30 30 mA typ V DD = 3 V Power-Up Time 6 6 6 μs typ Coming out of power-down mode; V DD = 3 V REFERENCE OUTPUT Output Voltage 1.247 1.247 1.247 V min At ambient 1.253 1.253 1.253 V max Reference TC4 ±10 ±10 ±5 ppm/°C typ ±15 ppm/°C max Output Impedance 7.5 7.5 7.5 kΩ typ

Rev. F | Page 6 of 28 Parameter A Grade2 B Grade 2 C Grade 2 Unit Conditions/Comments LOGIC INPUTS4 Input Current ±1 ±1 ±1 μA max All digital inputs VINL, Input Low Voltage 0.8 0.8 0.8 V max V DD = 3 V VINH, Input High Voltage 2 2 2 V min V DD = 3 V Pin Capacitance 3 3 3 pF max POWER REQUIREMENTS VDD 2.7 2.7 2.7 V min All digital inputs at 0 V or V DD 3.3 3.3 3.3 V max DAC active and excluding load current IDD (Normal Mode) IDD (All Power-Down Modes) 1 Part is functional with VDD up to 5.5 V. 2 Temperature range is −40°C to +105°C, typical at +25°C. 3 Linearity calculated using a reduced code range: AD5660 (Code 511 to Code 65024); AD5640 (Code 128 to Code 16256); AD5620 (Code 32 to Code 4064). Output unloaded. 4 Guaranteed by design and characterization; not production tested.

All input signals are specified with tr = tf = 1 ns/V (10% to 90% of VDD) and timed from a voltage level of (VIL + VIH)/2. See Figure 2. VDD = 2.7 V to 5.5 V; all specifications TMIN to TMAX, unless otherwise noted. Figure 2. Serial Write Operation

Rev. F | Page 8 of 28 ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Table 5. Parameter Rating VDD to GND −0.3 V to +7 V VOUT to GND −0.3 V to VDD + 0.3 V VFB to GND −0.3 V to VDD + 0.3 V VREFOUT to GND −0.3 V to VDD + 0.3 V Digital Input Voltage to GND −0.3 V to VDD + 0.3 V Operating Temperature Range Industrial −40°C to +105°C Storage Temperature Range −65°C to +150°C Junction Temperature (TJ max) 150°C Power Dissipation (TJ max − TA)/θJA θJA Thermal Impedance 119°C/W θJA Thermal Impedance 141°C/W θJC Thermal Impedance 44°C/W Reflow Soldering Peak Temperature SnPb 240°C Pb-Free 260°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD CAUTION

Rev. F | Page 16 of 28 TERMINOLOGY Relative Accuracy For the DAC, relative accuracy, or integral nonlinearity (INL), is a measurement of the maximum deviation, in LSBs, from a straight line passing through the endpoints of the DAC transfer function. Figure 5 through Figure 7 show typical INL vs. code. Differential Nonlinearity (DNL) Differential nonlinearity is the difference between the measured change and the ideal 1 LSB change between any two adjacent codes. A specified differential nonlinearity of ±1 LSB maximum ensures monotonicity. This DAC is guaranteed monotonic by design. Figure 8 through Figure 10 show typical DNL vs. code. Zero-Code Error Zero-code error is a measurement of the output error when zero code (0x0000) is loaded to the DAC register. Ideally, the output should be 0 V . The zero-code error is always positive in the AD5620/AD5640/AD5660, because the output of the DAC cannot go below 0 V . It is due to a combination of the offset errors in the DAC and the output amplifier. Zero-code error is expressed in mV . Figure 19 shows a plot of zero-code error vs. temperature. Full-Scale Error Full-scale error is a measurement of the output error when full- scale code (0xFFFF) is loaded to the DAC register. Ideally, the output should be V DD − 1 LSB. Full-scale error is expressed as a percentage of the full-scale range. Figure 18 shows a plot of full- scale error vs. temperature. Gain Error This is a measurement of the span error of the DAC. It is the deviation in slope of the DAC transfer characteristic from the ideal, expressed as a percentage of the full-scale range. Zero-Code Error Drift This is a measurement of the change in zero-code error with a change in temperature. It is expressed in μV/°C. Gain Temperature Coefficient This is a measurement of the change in gain error with changes in temperature. It is expressed in (ppm of full-scale range)/°C. Offset Error Offset error is a measurement of the difference between VOUT (actual) and VOUT (ideal) expressed in mV in the linear region of the transfer function. Offset error is measured on the AD5660 with Code 512 loaded into the DAC register. It can be negative or positive. DC Power Supply Rejection Ratio (PSRR) This indicates how the output of the DAC is affected by changes in the supply voltage. PSRR is the ratio of the change in VOUT to the change in VDD for the full-scale output of the DAC. It is measured in dB. VREF is held at 2.5 V , and VDD is varied by ±10%. Output Voltage Settling Time This indicates the amount of time for the output of a DAC to settle to a specified level for a ¼ to ¾ full-scale input change. It is measured from the 24 th falling edge of SCLK. Digital-to-Analog Glitch Impulse Digital-to-analog glitch impulse is the impulse injected into the analog output when the input code in the DAC register changes state. It is normally specified as the area of the glitch in nV-s and is measured when the digital input code is changed by 1 LSB at the major carry transition (0x7FFF to 0x8000). See Figure 31 and Figure 32. Digital Feedthrough Digital feedthrough is a measurement of the impulse injected into the analog output of the DAC from the digital inputs of the DAC, but is measured when the DAC output is not updated. It is specified in nV-s and measured with a full-scale code change on the data bus, that is, from all 0s to all 1s or vice versa. Noise Spectral Density This is a measurement of the internally generated random noise. Random noise is characterized as a spectral density (voltage per √Hz). It is measured by loading the DAC to midscale and measuring noise at the output. It is measured in nV/√Hz. Figure 37 shows a plot of noise spectral density.

shows a block diagram of the DAC architecture. Figure 38. DAC Architecture Figure 39. Resistor String

1.25 V , 5 ppm/°C reference, giving a full-scale output voltage of

GND for reference stability. scale settling time of 10 μs. MICROWIRE interface standards as well as most DSPs. See Figure 2 for a timing diagram of a typical write sequence. The write sequence begins by bringing the SYNC line low. that a falling edge of SYNC can initiate the next write sequence. again just before the next write sequence.

reset circuit that controls the output voltage during power-up.

0 V , and the AD5620/AD5660-3 DAC output powers up to

it is in the process of powering up. Table 7. Modes of Operation for the AD5660 Table 8. Modes of Operation for the AD5620/AD5640 stage is shown in Figure 44. Figure 44. Output Stage During Power-Down

1 ADDITIONAL PINS OMITTED FOR CLARITY

Figure 45. AD5660-to-Blackfin ADSP-BF53x Interface

is taken high at the end of this procedure. Figure 46. AD5660-to-68HC11/68L11 Interface transmit routine should take this into account. Figure 47. AD5660-to-80C51/80L51 Interface AD5660 on the rising edge of the SK. Figure 48. AD5660-to-MICROWIRE Interface

Rev. F | Page 23 of 28 POWER SUPPLY BYPASSING AND GROUNDING When accuracy is important in a circuit, it is helpful to carefully consider the power supply and ground return layout on the board. The printed circuit board containing the AD5620/ AD5640/AD5660 should have separate analog and digital sections, each having its own area of the board. If the AD5620/ AD5640/AD5660 are in a system where other devices require an AGND-to-DGND connection, the connection should be made at one point only. This ground point should be as close as possible to the AD5620/AD5640/AD5660. The power supply to the AD5620/AD5640/AD5660 should be bypassed with 10 μF and 0.1 μF capacitors. The capacitors should be as close as physically possible to the device, with the 0.1 μF capacitor ideally right up against the device. The 10 μF capacitors are the tantalum bead type. It is important that the 0.1 μF capacitor has a low effective series resistance (ESR) and low effective series inductance (ESI), such as is typical of common ceramic types of capacitors. This 0.1 μF capacitor provides a low impedance path to ground for high frequencies caused by transient currents due to internal logic switching. The power supply line itself should have as large a trace as possible to provide a low impedance path and reduce glitch effects on the supply line. Clocks and other components with fast switching digital signals should be shielded from other parts of the board by digital ground. Avoid crossover of digital and analog signals if possible. When traces cross on opposite sides of the board, ensure that they run at right angles to each other to reduce feedthrough effects on the board. The best board layout technique is the microstrip technique, where the component side of the board is dedicated to the ground plane only and the signal traces are placed on the solder side. However, this is not always possible with a 2-layer board.

0.65 BSC

0.15 MAX

0.05 MIN

1.45 MAX

0.95 MIN

0.22 MAX

0.08 MIN

0.38 MAX

0.22 MIN

Figure 53. 8-Lead Small Outline Transistor Package [SOT-23]

1.10 MAX

Figure 54. 8-Lead Mini Small Outline Package [MSOP]

Rev. F | Page 25 of 28 ORDERING GUIDE Model1 Temperature Range Package

Description

AD5620ARJ-1500RL7 −40°C to +105°C 8-Lead SOT-23 RJ-8 D2K Zero ±6 LSB INL 1.25 V AD5620ARJZ-1500RL7 −40°C to +105°C 8-Lead SOT-23 RJ-8 D6V Zero ±6 LSB INL 1.25 V AD5620ARJ-1REEL7 −40°C to +105°C 8-Lead SOT-23 RJ-8 D2K Zero ±6 LSB INL 1.25 V AD5620ARJ-2500RL7 −40°C to +105°C 8-Lead SOT-23 RJ-8 D2L Zero ±6 LSB INL 2.5 V AD5620ARJZ-2500RL7 −40°C to +105°C 8-Lead SOT-23 RJ-8 D5D Zero ±6 LSB INL 2.5 V AD5620ARJ-2REEL7 −40°C to +105°C 8-Lead SOT-23 RJ-8 D2L Zero ±6 LSB INL 2.5 V AD5620ARJZ-2REEL7 −40°C to +105°C 8-Lead SOT-23 RJ-8 D5D Zero ±6 LSB INL 2.5 V AD5620ARMZ-2 −40°C to +105°C 8-Lead MSOP RM-8 DGY Zero ±6 LSB INL 2.5 V AD5620ARMZ-2REEL7 −40°C to +105°C 8-Lead MSOP RM-8 DGY Zero ±6 LSB INL 2.5 V AD5620BRJ-1500RL7 −40°C to +105°C 8-Lead SOT-23 RJ-8 D2H Zero ±1 LSB INL 1.25 V AD5620BRJZ-1500RL7 −40°C to +105°C 8-Lead SOT-23 RJ-8 D87 Zero ±1 LSB INL 1.25 V AD5620BRJ-1REEL7 −40°C to +105°C 8-Lead SOT-23 RJ-8 D2H Zero ±1 LSB INL 1.25 V AD5620BRJ-2500RL7 −40°C to +105°C 8-Lead SOT-23 RJ-8 D2J Zero ±1 LSB INL 2.5 V AD5620BRJZ-2500RL7 −40°C to +105°C 8-Lead SOT-23 RJ-8 D5C Zero ±1 LSB INL 2.5 V AD5620BRJ-2REEL7 −40°C to +105°C 8-Lead SOT-23 RJ-8 D2J Zero ±1 LSB INL 2.5 V AD5620BRJZ-2REEL7 −40°C to +105°C 8-Lead SOT-23 RJ-8 D5C Zero ±1 LSB INL 2.5 V AD5620CRM-1 −40°C to +105°C 8-Lead MSOP RM-8 D2M Zero ±1 LSB INL 1.25 V AD5620CRMZ-1 −40°C to +105°C 8-Lead MSOP RM-8 DGM Zero ±1 LSB INL 1.25 V AD5620CRM-1REEL7 −40°C to +105°C 8-Lead MSOP RM-8 D2M Zero ±1 LSB INL 1.25 V AD5620CRMZ-1REEL7 −40°C to +105°C 8-Lead MSOP RM-8 DGM Zero ±1 LSB INL 1.25 V AD5620CRM-2 −40°C to +105°C 8-Lead MSOP RM-8 D2N Zero ±1 LSB INL 2.5 V AD5620CRM-2REEL7 −40°C to +105°C 8-Lead MSOP RM-8 D2N Zero ±1 LSB INL 2.5 V AD5620CRMZ-2 −40°C to +105°C 8-Lead MSOP RM-8 D59 Zero ±1 LSB INL 2.5 V AD5620CRMZ-2REEL7 −40°C to +105°C 8-Lead MSOP RM-8 D59 Zero ±1 LSB INL 2.5 V AD5620CRM-3 −40°C to +105°C 8-Lead MSOP RM-8 D2P Midscale ±1 LSB INL 2.5 V AD5620CRMZ-3 −40°C to +105°C 8-Lead MSOP RM-8 DGN Midscale ±1 LSB INL 2.5 V AD5620CRM-3REEL7 −40°C to +105°C 8-Lead MSOP RM-8 D2P Midscale ±1 LSB INL 2.5 V AD5620CRMZ-3REEL7 −40°C to +105°C 8-Lead MSOP RM-8 DGN Midscale ±1 LSB INL 2.5 V EVAL-AD5620EBZ Evaluation Board AD5640ARJ-2500RL7 −40°C to +105°C 8-Lead SOT-23 RJ-8 D2T Zero ±8 LSB INL 2.5 V AD5640ARJZ-2500RL7 −40°C to +105°C 8-Lead SOT-23 RJ-8 DC6 Zero ±8 LSB INL 2.5 V AD5640ARJ-2REEL7 −40°C to +105°C 8-Lead SOT-23 RJ-8 D2T Zero ±8 LSB INL 2.5 V AD5640ARJZ-2REEL7 −40°C to +105°C 8-Lead SOT-23 RJ-8 DC6 Zero ±8 LSB INL 2.5 V AD5640BRJ-1500RL7 −40°C to +105°C 8-Lead SOT-23 RJ-8 D2Q Zero ±4 LSB INL 1.25 V AD5640BRJZ-1500RL7 −40°C to +105°C 8-Lead SOT-23 RJ-8 DC3 Zero ±4 LSB INL 1.25 V AD5640BRJ-1REEL7 −40°C to +105°C 8-Lead SOT-23 RJ-8 D2Q Zero ±4 LSB INL 1.25 V AD5640BRJZ-1REEL7 −40°C to +105°C 8-Lead SOT-23 RJ-8 DC3 Zero ±4 LSB INL 1.25 V AD5640BRJ-2500RL7 −40°C to +105°C 8-Lead SOT-23 RJ-8 D2R Zero ±4 LSB INL 2.5 V AD5640BRJZ-2500RL7 −40°C to +105°C 8-Lead SOT-23 RJ-8 DC0 Zero ±4 LSB INL 2.5 V AD5640BRJ-2REEL7 −40°C to +105°C 8-Lead SOT-23 RJ-8 D2R Zero ±4 LSB INL 2.5 V AD5640BRJZ-2REEL7 −40°C to +105°C 8-Lead SOT-23 RJ-8 DC0 Zero ±4 LSB INL 2.5 V AD5640CRM-1 −40°C to +105°C 8-Lead MSOP RM-8 D2U Zero ±4 LSB INL 1.25 V AD5640CRM-1REEL7 −40°C to +105°C 8-Lead MSOP RM-8 D2U Zero ±4 LSB INL 1.25 V AD5640CRMZ-1 −40°C to +105°C 8-Lead MSOP RM-8 DG1 Zero ±4 LSB INL 1.25 V AD5640CRMZ-1REEL7 −40°C to +105°C 8-Lead MSOP RM-8 DG1 Zero ±4 LSB INL 1.25 V AD5640CRM-2 −40°C to +105°C 8-Lead MSOP RM-8 D2V Zero ±4 LSB INL 2.5 V AD5640CRM-2REEL7 −40°C to +105°C 8-Lead MSOP RM-8 D2V Zero ±4 LSB INL 2.5 V AD5640CRMZ-2 −40°C to +105°C 8-Lead MSOP RM-8 DEW Zero ±4 LSB INL 2.5 V AD5640CRMZ-2REEL7 −40°C to +105°C 8-Lead MSOP RM-8 DEW Zero ±4 LSB INL 2.5 V

Rev. F | Page 26 of 28 Model1 Temperature Range Package AD5660ARJ-1500RL7 −40°C to +105°C 8-Lead SOT-23 RJ-8 D30 Zero ±32 LSB INL 1.25 V AD5660ARJZ-1500RL7 −40°C to +105°C 8-Lead SOT-23 RJ-8 D5G Zero ±32 LSB INL 1.25 V AD5660ARJ-1REEL7 −40°C to +105°C 8-Lead SOT-23 RJ-8 D30 Zero ±32 LSB INL 1.25 V AD5660ARJZ-1REEL7 −40°C to +105°C 8-Lead SOT-23 RJ-8 D5G Zero ±32 LSB INL 1.25 V AD5660ARJ-2500RL7 −40°C to +105°C 8-Lead SOT-23 RJ-8 D31 Zero ±32 LSB INL 2.5 V AD5660ARJZ-2500RL7 −40°C to +105°C 8-Lead SOT-23 RJ-8 D6K Zero ±32 LSB INL 2.5 V AD5660ARJ-2REEL7 −40°C to +105°C 8-Lead SOT-23 RJ-8 D31 Zero ±32 LSB INL 2.5 V AD5660ARJZ-2REEL7 −40°C to +105°C 8-Lead SOT-23 RJ-8 D6K Zero ±32 LSB INL 2.5 V AD5660ARJ-3500RL7 −40°C to +105°C 8-Lead SO T-23 RJ-8 D32 Midscale ±32 LSB INL 2.5 V AD5660ARJZ-3500RL7 −40°C to +105°C 8-Lead SOT-23 RJ-8 DAV Midscale ±32 LSB INL 2.5 V AD5660ARJ-3REEL7 −40°C to +105°C 8-Lead SO T-23 RJ-8 D32 Midscale ±32 LSB INL 2.5 V AD5660ARJZ-3REEL7 −40°C to +105°C 8-Lead SO T-23 RJ-8 DAV Midscale ±32 LSB INL 2.5 V AD5660BRJ-1500RL7 −40°C to +105°C 8-Lead SOT-23 RJ-8 D2X Zero ±16 LSB INL 1.25 V AD5660BRJZ-1500RL7 −40°C to +105°C 8-Lead SOT-23 RJ-8 D6C Zero ±16 LSB INL 1.25 V AD5660BRJ-1REEL7 −40°C to +105°C 8-Lead SOT-23 RJ-8 D2X Zero ±16 LSB INL 1.25 V AD5660BRJZ-1REEL7 −40°C to +105°C 8-Lead SOT-23 RJ-8 D6C Zero ±16 LSB INL 1.25 V AD5660BRJ-2500RL7 −40°C to +105°C 8-Lead SOT-23 RJ-8 D2Y Zero ±16 LSB INL 2.5 V AD5660BRJZ-2500RL7 −40°C to +105°C 8-Lead SOT-23 RJ-8 D6L Zero ±16 LSB INL 2.5 V AD5660BRJ-2REEL7 −40°C to +105°C 8-Lead SOT-23 RJ-8 D2Y Zero ±16 LSB INL 2.5 V AD5660BRJZ-2REEL7 −40°C to +105°C 8-Lead SOT-23 RJ-8 D6L Zero ±16 LSB INL 2.5 V AD5660BRJ-3500RL7 −40°C to +105°C 8-Lead SO T-23 RJ-8 D2Z Midscale ±16 LSB INL 2.5 V AD5660BRJZ-3500RL7 −40°C to +105°C 8-Lead SO T-23 RJ-8 DAN Midscale ±16 LSB INL 2.5 V AD5660BRJ-3REEL7 −40°C to +105°C 8-Lead SO T-23 RJ-8 D2Z Midscale ±16 LSB INL 2.5 V AD5660BRJZ-3REEL7 −40°C to +105°C 8-Lead SO T-23 RJ-8 DAN Midscale ±16 LSB INL 2.5 V AD5660CRM-1 −40°C to +105°C 8-Lead MSOP RM-8 D33 Zero ±16 LSB INL 1.25 V AD5660CRM-1REEL7 −40°C to +105°C 8-Lead MSOP RM-8 D33 Zero ±16 LSB INL 1.25 V AD5660CRMZ-1 −40°C to +105°C 8-Lead MSOP RM-8 DEX Zero ±16 LSB INL 1.25 V AD5660CRMZ-1REEL7 −40°C to +105°C 8-Lead MSOP RM-8 DEX Zero ±16 LSB INL 1.25 V AD5660CRM-2 −40°C to +105°C 8-Lead MSOP RM-8 D34 Zero ±16 LSB INL 2.5 V AD5660CRM-2REEL7 −40°C to +105°C 8-Lead MSOP RM-8 D34 Zero ±16 LSB INL 2.5 V AD5660CRMZ-2 −40°C to +105°C 8-Lead MSOP RM-8 DEY Zero ±16 LSB INL 2.5 V AD5660CRMZ-2REEL7 −40°C to +105°C 8-Lead MSOP RM-8 DEY Zero ±16 LSB INL 2.5 V AD5660CRM-3 −40°C to +105°C 8-Lead MSOP RM-8 D35 Midscale ±16 LSB INL 2.5 V AD5660CRM-3REEL7 −40°C to +105°C 8-Lead MSOP RM-8 D35 Midscale ±16 LSB INL 2.5 V AD5660CRMZ-3 −40°C to +105°C 8-Lead MSOP RM-8 DBY Midscale ±16 LSB INL 2.5 V AD5660CRMZ-3REEL7 −40°C to +105°C 8-Lead MSOP RM-8 DBY Midscale ±16 LSB INL 2.5 V EVAL-AD5660EBZ Evaluation Board EVAL-AD5660DKZ Demonstration Board 1 Z = RoHS Compliant Part.

Rev. F | Page 27 of 28 NOTES

Rev. F | Page 28 of 28 NOTES ©2005–2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the prop erty of their respective owners. D04539-0-12/10(F)