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nanoDAC, SPI Interface in LFCSP and SC70 Data Sheet AD5601/AD5611/AD5621 Rev. F Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2005–2012 Analog Devices, Inc. All rights reserved.
FEATURES
6-lead SC70 and LFCSP packages Micropower operation: 100 µA maximum at 5 V Power-down typically to 0.2 µA at 3 V 2.7 V to 5.5 V power supply Guaranteed monotonic by design Power-on reset to 0 V with brownout detection 3 power-down functions Low power serial interface with Schmitt-triggered inputs On-chip output buffer amplifier, rail-to-rail operation SYNC interrupt facility Minimized zero-code error AD5601 buffered 8-bit DAC B version: ±0.5 LSB INL AD5611 buffered 10-bit DAC B version: ±0.5 LSB INL A version: ±4 LSB INL AD5621 buffered 12-bit DAC B version: ±1 LSB INL A version: ±6 LSB INL
APPLICATIONS
Portable battery-powered instruments Digital gain and offset adjustment Programmable voltage and current sources Programmable attenuators GENERAL DESCRIPTION The AD5601/AD5611/AD5621, members of the nanoDAC® family, are single, 8-/10-/12-bit, buffered voltage output DACs that operate from a single 2.7 V to 5.5 V supply, consuming typically 75 µA at 5 V . The parts come in tiny LFCSP and SC70 packages. Their on-chip precision output amplifier allows rail- to-rail output swing to be achieved. The AD5601/AD5611/ AD5621 utilize a versatile 3-wire serial interface that operates at clock rates up to 30 MHz and is compatible with SPI, QSPI™, MICROWIRE™, and DSP interface standards. The reference for the AD5601/AD5611/AD5621 is derived from the power supply inputs and, therefore, gives the widest dynamic output range. The parts incorporate a power-on reset circuit, which ensures that the DAC output powers up to 0 V and remains there until a valid write to the device takes place. The AD5601/AD5611/AD5621 contain a power-down feature that reduces current consumption to typically 0.2 µA at 3 V. FUNCTIONAL BLOCK DIAGRAM Figure 1. Table 1. Related Devices and power-sensitive applications.
- Available in 6-lead LFCSP and SC70 packages.
- Low power, single-supply operation. The AD5601/
making them ideal for battery-powered applications.
- The on-chip output buffer amplifier allows the output of
- Reference is derived from the power supply.
- High speed serial interface with clock speeds up to
30 MHz. Designed for very low power consumption. The interface powers up only during a write cycle.
- Power-down capability. When powered down, the DAC
AD5601/AD5611/AD5621 Data Sheet Rev. F | Page 2 of 24 TABLE OF CONTENTS Choosing a Reference as Power Supply for the Using the AD5601/AD5611/AD5621 with a Galvanically
REVISION HISTORY
2/12—Rev. E to Rev. F Changes to Features Section, General Description Section, Changes to Choosing a Reference as Power Supply for the 7/10—Rev. D to Rev. E 5/08—Rev. C to Rev. D Changes to Choosing a Reference as Power Supply for the 12/07—Rev. B to Rev. C Changes to AD5601/AD5611/AD5621 to ADSP-2101 7/05—Rev. A to Rev. B 3/05—Rev. 0 to Rev. A 1/05—Revision 0: Initial Version
Data Sheet AD5601/AD5611/AD5621 Rev. F | Page 3 of 24 SPECIFICATIONS VDD = 2.7 V to 5.5 V; RL = 2 kΩ to GND; CL = 200 pF to GND; all specifications TMIN to TMAX, unless otherwise noted. Temperature range for A/B grades is −40°C to +125°C, typical at 25°C. Table 2. A Grade B Grade Parameter Min Typ Max Min Typ Max Unit Test Conditions/Comments STATIC PERFORMANCE AD5601 Resolution 8 Bits Relative Accuracy1 (INL) ±0.5 LSB Differential Nonlinearity (DNL) ±0.5 LSB Guaranteed monotonic by design AD5611 Resolution 10 Bits Relative Accuracy1 (INL) ±4 ±0.5 LSB Differential Nonlinearity (DNL) ±0.5 ±0.5 LSB Guaranteed monotonic by design AD5621 Resolution 12 Bits Relative Accuracy1 (INL) ±6 ±1 LSB Differential Nonlinearity (DNL) ±0.5 ±0.5 LSB Guaranteed monotonic by design Zero-Code Error 0.5 10 0.5 10 mV All 0s loaded to DAC register Full-Scale Error ±0.5 ±0.5 mV All 1s loaded to DAC register Offset Error ±0.063 ±10 ±0.063 ±10 mV Gain Error ±0.0004 ±0.037 ±0.0004 ±0.037 %FSR Zero-Code Error Drift 5.0 5.0 µV/°C Gain Temperature Coefficient 2.0 2.0 ppm FSR/°C OUTPUT CHARACTERISTICS2 Output Voltage Range 0 VDD 0 VDD V Output Voltage Settling Time 6 10 6 10 µs Code ¼ scale to ¾ scale Slew Rate 0.5 0.5 V/µs Capacitive Load Stability 470 470 pF RL = ∞ 1000 1000 pF RL = 2 kΩ Output Noise Spectral Density 120 120 nV/√Hz DAC code = midscale,1 kHz Noise 2 2 µV DAC code = midscale,
0.1 Hz to 10 kHz bandwidth
Digital-to-Analog Glitch Impulse 5 5 nV-s 1 LSB change around major carry Digital Feedthrough 0.2 0.2 nV-s Short-Circuit Current 15 15 mA VDD = 3 V/5 V DC Output Impedance 0.5 0.5 Ω LOGIC INPUTS Input Current3 ±2 ±2 µA Input High Voltage, VINH 1.8 1.8 V VDD = 4.7 V to 5.5 V 1.4 1.4 V VDD = 2.7 V to 3.6 V Input Low Voltage, VINL 0.8 0.8 V VDD = 4.7 V to 5.5 V 0.6 0.6 V VDD = 2.7 V to 3.6 V Pin Input Capacitance 3 3 pF
1 Linearity calculated using a reduced code range: AD5621 from Code 64 to Code 4032; AD5611 from Code 16 to Code 1008; AD5601 from Code 4 to Code 252. 2 Guaranteed by design and characterization, not production tested. 3 Total current flowing into all pins. VDD = 2.7 V to 5.5 V; all specifications TMIN to TMAX, unless otherwise noted. See Figure 2. 1 All input signals are specified with tr = tf = 1 ns/V (10% to 90% of VDD) and timed from a voltage level of (VIL + VIH)/2. 2 Maximum SCLK frequency is 30 MHz. Figure 2. Timing Diagram
Data Sheet AD5601/AD5611/AD5621 Rev. F | Page 5 of 24 ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Table 4. Parameter Rating VDD to GND −0.3 V to +7.0 V Digital Input Voltage to GND −0.3 V to VDD + 0.3 V VOUT to GND −0.3 V to VDD + 0.3 V Operating Temperature Range Industrial (A/B Grades) −40°C to +125°C Storage Temperature Range −65°C to +160°C Maximum Junction Temperature 150°C θJA Thermal Impedance 433.34°C/W θJC Thermal Impedance 149.47°C/W θJA Thermal Impedance 95°C/W Lead Temperature, Soldering Vapor Phase (60 sec) 215°C Infrared (15 sec) 220°C ESD (Human Body Model) 2.0 kV Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD CAUTION
Figure 3. 6-Lead SC70 Pin Configuration Figure 4. 6-Lead LFCSP Pin Configuration Table 5. Pin Function Descriptions sequence is ignored by the DAC. input. Data can be transferred at rates up to 30 MHz. edge of the serial clock input. 5 5 GND Ground. Ground reference point for all circuitry on the AD5601/AD5611/AD5621. 6 6 V OUT Analog Output Voltage from the DAC. The o utput amplifier has rail-to-rail operation. EP Exposed Pad. Connect to GND.
1 VDD
- CONNECT THE EXPOSED PAD TO GND.
Figure 29. Total Unadjusted Error (TUE) vs. Temperature (5 V) Figure 30. Offset Error vs. Temperature (3 V/5 V Supply) Figure 31. Gain Error vs. Temperature (3 V/5 V Supply) Figure 32. Supply Current vs. Temperature (3 V/5 V Supply) Figure 33. INL vs. Supply Voltage at 25°C Figure 34. DNL vs. Supply Voltage at 25°C
1.0 VDD = 5V
AD5601/AD5611/AD5621 Data Sheet Rev. F | Page 18 of 24 CHOOSING A REFERENCE AS POWER SUPPLY FOR THE AD5601/AD5611/AD5621 The AD5601/AD5611/AD5621 come in tiny LFCSP and SC70 packages with less than a 100 µA supply current. Because of this, the choice of reference depends on the application requirements. For applications with space-saving requirements, the ADR02 is recommended. It is available in an SC70 package and has excellent drift at 9 ppm/°C (3 ppm/°C in the R-8 package) and provides very good noise performance at 3.4 µV p-p in the 0.1 Hz to 10 Hz range. Because the supply current required by the AD5601/AD5611/ AD5621 is extremely low, the parts are ideal for low supply applications. The ADR395 voltage reference is recommended in this case. It requires less than 100 µA of quiescent current and can, therefore, drive multiple DACs in one system, if required. It also provides very good noise performance at 8 µV p-p in the 0.1 Hz to 10 Hz range. Figure 51. ADR395 as Power Supply to the AD5601/AD5611/AD5621 the AD5601/AD5611/AD5621 are listed in Table 7. Table 7. Precision References for the AD5601/AD5611/AD5621
0.1 Hz to 10 Hz
Figure 52. Bipolar Operation with the AD5601/AD5611/AD5621 where D represents the input code in decimal (0 – 2N).
Figure 53. AD5601/AD5611/AD5621 with a Galvanically Isolated Interface connection, the connection should be made at one point only. currents due to internal logic switching. possible with a two-layer board.
Figure 54. 6-Lead Thin Shrink Small Outline Transistor Package [SC70] Figure 55. 6-Lead Lead Frame Chip Scale Package [LFCSP_WD]
1.30 BSC
0.10 MAX
0.65 BSC
0.00 MIN
0.65 REF
0.20 MIN
Data Sheet AD5601/AD5611/AD5621 Rev. F | Page 21 of 24 ORDERING GUIDE Model1 Temperature Range INL Package Description Package Option Branding AD5601BKSZ-500RL7 –40°C to +125°C ±0.5 LSB 6-Lead Thin Shrink Small Outline Transistor Package [SC70] KS-6 D3V AD5601BKSZ-REEL7 –40°C to +125°C ±0.5 LSB 6-Lead Thin Shrink Small Outline Transistor Package [SC70] KS-6 D3V AD5601BCPZ-RL7 –40°C to +125°C ±0.5 LSB 6-Lead Lead Frame Chip Scale Package [LFCSP_WD] CP-6-5 89 AD5611AKSZ-500RL7 –40°C to +125°C ±4.0 LSB 6-Lead Thin Shrink Small Outline Transistor Package [SC70] KS-6 D3U AD5611AKSZ-REEL7 –40°C to +125°C ±4.0 LSB 6-Lead Thin Shrink Small Outline Transistor Package [SC70] KS-6 D3U AD5611ACPZ-RL7 –40°C to +125°C ±4.0 LSB 6-Lead Lead Frame Chip Scale Package[LFCSP_WD] CP-6-5 8B AD5611BKSZ-500RL7 –40°C to +125°C ±0.5 LSB 6-Lead Thin Shrink Small Outline Transistor Package [SC70] KS-6 D3T AD5611BKSZ-REEL7 –40°C to +125°C ±0.5 LSB 6-Lead Thin Shrink Small Outline Transistor Package [SC70] KS-6 D3T AD5621AKSZ-500RL7 –40°C to +125°C ±6.0 LSB 6-Lead Thin Shrink Small Outline Transistor Package [SC70] KS-6 D3S AD5621AKSZ-REEL7 –40°C to +125°C ±6.0 LSB 6-Lead Thin Shrink Small Outline Transistor Package [SC70] KS-6 D3S AD5621ACPZ-RL7 –40°C to +125°C ±6.0 LSB 6-Lead Lead Frame Chip Scale Package[LFCSP_WD] CP-6-5 88 AD5621BKSZ-500RL7 –40°C to +125°C ±1.0 LSB 6-Lead Thin Shrink Small Outline Transistor Package [SC70] KS-6 D3R AD5621BKSZ-REEL7 –40°C to +125°C ±1.0 LSB 6-Lead Thin Shrink Small Outline Transistor Package [SC70] KS-6 D3R EVAL-AD5621EBZ Evaluation Board 1 Z = RoHS Compliant Part.
AD5601/AD5611/AD5621 Data Sheet Rev. F | Page 22 of 24 NOTES
Data Sheet AD5601/AD5611/AD5621 Rev. F | Page 23 of 24 NOTES
AD5601/AD5611/AD5621 Data Sheet Rev. F | Page 24 of 24 NOTES ©2005–2012 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06853-0-2/12(F)