AD5304BRMZ-REEL7

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2.5 V to 5.5 V, 500 μA, Quad Voltage Output 8-/10-/12-Bit DACs in 10-Lead Packages Data Sheet AD5304/AD5314/AD5324 Rev. H Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2011 Analog Devices, Inc. All rights reserved.

FEATURES

AD5304: 4 buffered 8-Bit DACs in 10-lead MSOP and 10-lead LFCSP A, W Version: ±1 LSB INL, B Version: ±0.625 LSB INL AD5314: 4 buffered 10-Bit DACs in 10-lead MSOP and 10-lead LFCSP A, W Version: ±4 LSB INL, B Version: ±2.5 LSB INL AD5324: 4 buffered 12-Bit DACs in 10-lead MSOP and 10-lead LFCSP A, W Version: ±16 LSB INL, B Version: ±10 LSB INL Low power operation: 500 μA @ 3 V, 600 μA @ 5 V 2.5 V to 5.5 V power supply Guaranteed monotonic by design over all codes Power-down to 80 nA @ 3 V, 200 nA @ 5 V Double-buffered input logic Output range: 0 V to V REF Power-on reset to 0 V Simultaneous update of outputs (LDAC function) Low power-, SPI®-, QSPI™-, MICROWIRE™-, and DSP- compatible 3-wire serial interface On-chip, rail-to-rail output buffer amplifiers Temperature range −40°C to +105°C Qualified for automotive applications

APPLICATIONS

Portable battery-powered instruments Digital gain and offset adjustment Programmable voltage and current sources Programmable attenuators Industrial process controls GENERAL DESCRIPTION The AD5304/AD5314/AD53241 are quad 8-, 10-, and 12-bit buffered voltage output DACs in 10-lead MSOP and 10-lead LFCSP packages that operate from a single 2.5 V to 5.5 V supply, consuming 500 μA at 3 V . Their on-chip output amplifiers allow rail-to-rail output swing to be achieved with a slew rate of 0.7 V/μs. A 3-wire serial interface is used; it operates at clock rates up to

30 MHz and is compatible with standard SPI, QSPI, MICROWIRE,

and DSP interface standards. The references for the four DACs are derived from one reference pin. The outputs of all DACs can be updated simultaneously using the software LDAC function. The parts incorporate a power-on reset circuit, and ensure that the DAC outputs power up to 0 V and remains there until a valid write takes place to the device. The parts contain a power-down feature that reduces the current consumption of the device to 200 nA @ 5 V (80 nA @ 3 V). The low power consumption of these parts in normal operation makes them ideally suited to portable battery-operated equipment. The power consumption is 3 mW at 5 V , 1.5 mW at 3 V , reducing to 1 μW in power-down mode. 1 Protected by U.S. Patent No. 5,969,657. FUNCTIONAL BLOCK DIAGRAM INPUT REGISTER DAC REGISTER STRING DAC A VOUTA BUFFER INPUT REGISTER DAC REGISTER STRING DAC B VOUTB BUFFER AD5304/AD5314/AD5324 INPUT REGISTER DAC REGISTER STRING DAC C VOUTC BUFFER INPUT REGISTER DAC REGISTER STRING DAC D VOUTD BUFFER REFINVDD GND POWER-DOWN LOGICPOWER-ON RESET LDAC INTERFACE LOGIC SCLK SYNC DIN 00929-001 Figure 1.

AD5304/AD5314/AD5324 Data Sheet Rev. H | Page 2 of 24 TABLE OF CONTENTS

REVISION HISTORY

9/11—Rev. G to Rev. H 5/11—Rev. F to Rev. G 9/06—Rev. E to Rev. F 5/05—Rev. D to Rev. E 8/03—Rev. C to Rev. D

Data Sheet AD5304/AD5314/AD5324 Rev. H | Page 3 of 24 SPECIFICATIONS VDD = 2.5 V to 5.5 V; VREF = 2 V; RL = 2 kΩ to GND; CL = 200 pF to GND; all specifications TMIN to TMAX, unless otherwise noted. Table 1. Parameter1 A, W Version2 B Version2 Min Typ Max Min Typ Max Unit Test Conditions/Comments DC PERFORMANCE3, 4 AD5304 Resolution 8 8 Bits Relative Accuracy ±0.15 ±1 ±0.15 ±0.625 LSB Differential Nonlinearity ±0.02 ±0.25 ±0.02 ±0.25 LSB Guaranteed monotonic by design over all codes AD5314 Resolution 10 10 Bits Relative Accuracy ±0.5 ±4 ±0.5 ±2.5 LSB Differential Nonlinearity ±0.05 ±0.5 ±0.05 ±0.5 LSB Guaranteed monotonic by design over all codes AD5324 Resolution 12 12 Bits Relative Accuracy ±2 ±16 ±2 ±10 LSB Differential Nonlinearity ±0.2 ±1 ±0.2 ±1 LSB Guaranteed monotonic by design over all codes Offset Error ±0.4 ±3 ±0.4 ±3 % of FSR See Figure 2 and Figure 3 Gain Error ±0.15 ±1 ±0.15 ±1 % of FSR See Figure 2 and Figure 3 Lower Dead Band 20 60 20 60 mV Lower dead band exists only if offset error is negative Offset Error Drift5 –12 –12 ppm of FSR/°C Gain Error Drift5 –5 –5 ppm of FSR/°C DC Power Supply Rejection Ratio5 –60 –60 dB ΔV DD = ±10% DC Crosstalk5 200 200 μV R L = 2 kΩ to GND or VDD DAC REFERENCE INPUTS5 VREF Input Range 0.25 VDD 0.25 V DD V VREF Input Impedance 37 45 37 45 kΩ Normal operation >10 >10 MΩ Power-down mode Reference Feedthrough –90 –90 dB Frequency = 10 kHz OUTPUT CHARACTERISTICS5 Minimum Output Voltage6 0.001 0.001 V Measurement of the minimum and maximum Maximum Output Voltage6 V DD – 0.001 VDD – 0.001 V drive capability of the output amplifier DC Output Impedance 0.5 0.5 Ω Short Circuit Current 25 25 mA V DD = 5 V 16 16 mA V DD = 3 V Power-Up Time 2.5 2.5 μs Coming out of power- down mode VDD = 5 V 5 5 μs Coming out of power- down mode VDD = 3 V

AD5304/AD5314/AD5324 Data Sheet Rev. H | Page 4 of 24 Parameter1 A, W Version2 B Version2 Min Typ Max Min Typ Max Unit Test Conditions/Comments LOGIC INPUTS5 Input Current ±1 ±1 μA VIL, Input Low Voltage 0.8 0.8 V V DD = 5 V ± 10% 0.6 0.6 V V DD = 3 V ± 10% 0.5 0.5 V V DD = 2.5 V VIH, Input High Voltage 2.4 2.4 V V DD = 5 V ± 10% 2.1 2.1 V V DD = 3 V ± 10% 2.0 2.0 V V DD = 2.5 V Pin Capacitance 3 3 pF POWER REQUIREMENTS VDD 2.5 5.5 2.5 5.5 V IDD (Normal Mode)7 VDD = 4.5 V to 5.5 V 600 900 600 900 μA V IH = VDD and VIL = GND VDD = 2.5 V to 3.6 V 500 700 500 700 μA V IH = VDD and VIL = GND IDD (Power-Down Mode) VDD = 4.5 V to 5.5 V 0.2 1 0.2 1 μA V IH = VDD and VIL = GND VDD = 2.5 V to 3.6 V 0.08 1 0.08 1 μA V IH = VDD and VIL = GND 1 See the Terminology section. 2 Temperature range (A, B, W Version): −40°C to +105°C; typical at +25°C. 3 DC specifications tested with the outputs unloaded. 4 Linearity is tested using a reduced code range: AD5304 (Code 8 to Code 248); AD5314 (Code 28 to Code 995); AD5324 (Code 115 to Code 3981). 5 Guaranteed by design and characterization, not production tested. 6 For the amplifier output to reach its minimum voltage, offset error must be negative. For the amplifier output to reach its maximum voltage, VREF = VDD and offset plus gain error must be positive. 7 IDD specification is valid for all DAC codes; interface inactive; all DACs active; load currents excluded. AC CHARACTERISTICS VDD = 2.5 V to 5.5 V; RL = 2 kΩ to GND; CL = 200 pF to GND; all specifications TMIN to TMAX, unless otherwise noted. Table 2. Parameter1, 2 A, B, W Version3 Min Typ Max Unit Test Conditions/Comments Output Voltage Settling Time V REF = VDD = 5 V AD5304 6 8 μs ¼ scale to ¾ scale change (0x40 to 0xC0) AD5314 7 9 μs ¼ scale to ¾ scale change (0x100 to 0x300) AD5324 8 10 μs ¼ scale to ¾ scale change (0x400 to 0xC00) Slew Rate 0.7 V/ μs Major-Code Transition Glitch Energy 12 nV-sec 1 LSB change around major carry Digital Feedthrough 1 nV-sec Digital Crosstalk 1 nV-sec DAC-to-DAC Crosstalk 3 nV-sec Multiplying Bandwidth 200 kHz V REF = 2 V ± 0.1 V p-p Total Harmonic Distortion –70 dB V REF = 2.5 V ± 0.1 V p-p; frequency = 10 kHz 1 See the Terminology section. 2 Guaranteed by design and characterization, not production tested. 3 Temperature range (A, B, W Version): −40°C to +105°C; typical at +25°C.

VDD = 2.5 V to 5.5 V; all specifications TMIN to TMAX, unless otherwise noted. 1 Guaranteed by design and characterization, not production tested. 2 All input signals are specified with tr = tf = 5 ns (10% to 90 % of VDD) and timed from a voltage level of (VIL + VIH)/2. Figure 2. Serial Interface Timing Diagram

AD5304/AD5314/AD5324 Data Sheet Rev. H | Page 6 of 24 ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Table 4. Parameter1 Rating VDD to GND –0.3 V to +7 V Digital Input Voltage to GND –0.3 V to V DD + 0.3 V Reference Input Voltage to GND –0.3 V to V DD + 0.3 V VOUTA through VOUTD to GND –0.3 V to VDD + 0.3 V Operating Temperature Range Industrial (A, B, W Version) –40°C to +105°C Storage Temperature Range –65°C to +150°C Junction Temperature (TJ max) 150°C 10-Lead MSOP Power Dissipation (TJ max – TA)/ θJA θJA Thermal Impedance 206°C/W θJC Thermal Impedance 44°C/W 10-Lead LFCSP Power Dissipation (TJ max – TA)/ θJA θJA Thermal Impedance 84°C/W Reflow Soldering Peak Temperature (Pb-free) 260°C Peak Temperature (non Pb-free) 220°C Time at Peak Temperature 10 sec to 40 sec 1 Transient currents of up to 100 mA do not cause SCR latch-up. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD CAUTION

AD5304/AD5314/AD5324 Data Sheet Rev. H | Page 12 of 24 TERMINOLOGY Relative Accuracy or Integral Nonlinearity (INL) For the DAC, relative accuracy or integral nonlinearity (INL) is a measure of the maximum deviation, in LSB, from a straight line passing through the endpoints of the DAC transfer function. Typical INL vs. code plots can be seen in Figure 5, Figure 6, and Figure 7. Differential Nonlinearity Differential nonlinearity (DNL) is the difference between the measured change and the ideal 1 LSB change between any two adjacent codes. A specified differential nonlinearity of ±1 LSB maximum ensures monotonicity. This DAC is guaranteed mono- tonic by design. Typical DNL vs. code plots can be seen in Figure 8, Figure 9, and Figure 10. Offset Error This is a measure of the offset error of the DAC and the output amplifier. It is expressed as a percentage of the full-scale range. Gain Error This is a measure of the span error of the DAC. It is the deviation in slope of the actual DAC transfer characteristic from the ideal expressed as a percentage of the full-scale range. Offset Error Drift This is a measure of the change in offset error with changes in temperature. It is expressed in (ppm of full-scale range)/°C. Gain Error Drift This is a measure of the change in gain error with changes in temperature. It is expressed in (ppm of full-scale range)/°C. Power Supply Rejection Ratio (PSRR) This indicates how the output of the DAC is affected by changes in the supply voltage. PSRR is the ratio of the change in V OUT to a change in VDD for full-scale output of the DAC. It is measured in decibels. VREF is held at 2 V and VDD is varied ±10%. DC Crosstalk This is the dc change in the output level of one DAC at midscale in response to a full-scale code change (all 0s to all 1s and vice versa) and output change of another DAC. It is expressed in microvolts. Reference Feedthrough This is the ratio of the amplitude of the signal at the DAC output to the reference input when the DAC output is not being updated. It is expressed in decibels. Major-Code Transition Glitch Energy Major-code transition glitch energy is the energy of the impulse injected into the analog output when the code in the DAC register changes state. It is normally specified as the area of the glitch in nV-s and is measured when the digital code is changed by 1 LSB 00 to 011 . . . 11). Digital Feedthrough Digital feedthrough is a measure of the impulse injected into the analog output of the DAC from the digital input pins of the device when the DAC output is not being written to (SYNC held high). It is specified in nV-s and is measured with a worst- case change on the digital input pins (for example, from all 0s to all 1s or vice versa.) Digital Crosstalk This is the glitch impulse transferred to the output of one DAC at midscale in response to a full-scale code change (all 0s to all 1s and vice versa) in the input register of another DAC. It is expressed in nV-s. DAC-to-DAC Crosstalk This is the glitch impulse transferred to the output of one DAC due to a digital code change and subsequent output change of another DAC. This includes both digital and analog crosstalk. It is measured by loading one of the DACs with a full-scale code change (all 0s to all 1s and vice versa) with the LDAC bit set low and monitoring the output of another DAC. The energy of the glitch is expressed in nV-s. Multiplying Bandwidth The amplifiers within the DAC have a finite bandwidth. The multiplying bandwidth is a measure of this. A sine wave on the reference (with full-scale code loaded to the DAC) appears on the output. The multiplying bandwidth is the frequency at which the output amplitude falls to 3 dB below the input. Total Harmonic Distortion (THD) This is the difference between an ideal sine wave and its attenuated version using the DAC. The sine wave is used as the reference for the DAC and the THD is a measure of the harmonics present on the DAC output. It is measured in decibels.

to internal logic switching. while signal traces are placed on the solder side. Table 7. Overview of AD53xx Serial Devices

Table 8. Overview of AD53xx Parallel Devices

0.50 BSC

1.10 MAX

Figure 45. 10-Lead Mini Small Outline Package [MSOP]

0.20 REF

0.05 MAX

0.02 NOM

Figure 46. 10-Lead Lead Frame Chip Scale Package [LFCSP_WD]

Data Sheet AD5304/AD5314/AD5324 Rev. H | Page 23 of 24 ORDERING GUIDE Model1, 2 Temperature Range Package Description Package Option Branding AD5304ARM –40°C to +105°C 10-Lead MSOP RM-10 DBA AD5304ARM-REEL7 –40°C to +105°C 10-Lead MSOP RM-10 DBA AD5304ARMZ –40°C to +105°C 10-Lead MSOP RM-10 D9W AD5304ARMZ-REEL7 –40°C to +105°C 10-Lead MSOP RM-10 D9W AD5304ACPZ-REEL7 –40°C to +105°C 10-Lead LFCSP_WD CP-10-9 DBA# AD5304BRM –40°C to +105°C 10-Lead MSOP RM-10 DBB AD5304BRM-REEL –40°C to +105°C 10-Lead MSOP RM-10 DBB AD5304BRM-REEL7 –40°C to +105°C 10-Lead MSOP RM-10 DBB AD5304BRMZ –40°C to +105°C 10-Lead MSOP RM-10 DBB# AD5304BRMZ-REEL –40°C to +105°C 10-Lead MSOP RM-10 DBB# AD5304BRMZ-REEL7 –40°C to +105°C 10-Lead MSOP RM-10 DBB# AD5304BCPZ-REEL7 –40°C to +105°C 10-Lead LFCSP_WD CP-10-9 DBB# AD5314ACPZ-REEL7 –40°C to +105°C 10-Lead LFCSP_WD CP-10-9 DCA# AD5314ARM –40°C to +105°C 10-Lead MSOP RM-10 DCA AD5314ARM-REEL7 –40°C to +105°C 10-Lead MSOP RM-10 DCA AD5314ARMZ –40°C to +105°C 10-Lead MSOP RM-10 DCA# AD5314ARMZ-REEL7 –40°C to +105°C 10-Lead MSOP RM-10 DCA# AD5314WARMZ-REEL7 –40°C to +105°C 10-Lead MSOP RM-10 DCA# AD5314BCPZ-REEL7 –40°C to +105°C 10-Lead LFCSP_WD CP-10-9 DCB# AD5314BRM –40°C to +105°C 10-Lead MSOP RM-10 DCB AD5314BRM-REEL –40°C to +105°C 10-Lead MSOP RM-10 DCB AD5314BRM-REEL7 –40°C to +105°C 10-Lead MSOP RM-10 DCB AD5314BRMZ –40°C to +105°C 10-Lead MSOP RM-10 DCB# AD5314BRMZ-REEL –40°C to +105°C 10-Lead MSOP RM-10 DCB# AD5314BRMZ-REEL7 –40°C to +105°C 10-Lead MSOP RM-10 DCB# AD5324ACPZ-REEL7 –40°C to +105°C 10-Lead LFCSP_WD CP-10-9 DDA# AD5324ARM –40°C to +105°C 10-Lead MSOP RM-10 DDA AD5324ARM-REEL7 –40°C to +105°C 10-Lead MSOP RM-10 DDA AD5324ARMZ –40°C to +105°C 10-Lead MSOP RM-10 D8F AD5324ARMZ-REEL7 –40°C to +105°C 10-Lead MSOP RM-10 D8F AD5324BCPZ-REEL7 –40°C to +105°C 10-Lead LFCSP_WD CP-10-9 DDB# AD5324BRM –40°C to +105°C 10-Lead MSOP RM-10 DDB AD5324BRM-REEL –40°C to +105°C 10-Lead MSOP RM-10 DDB AD5324BRM-REEL7 –40°C to +105°C 10-Lead MSOP RM-10 DDB AD5324BRMZ –40°C to +105°C 10-Lead MSOP RM-10 DDB# AD5324BRMZ-REEL –40°C to +105°C 10-Lead MSOP RM-10 DDB# AD5324BRMZ-REEL7 –40°C to +105°C 10-Lead MSOP RM-10 DDB# 1 Z = RoHS Compliant Part; # denotes lead-free product can be top or bottom marked. 2 W = Qualified for Automotive Applications. AUTOMOTIVE PRODUCTS The AD5314W ARMZ-REEL7 model is available with controlled manufacturing to support the quality and reliability requirements of automotive applications. Note that this automotive model may have specifications that differ from the commercial models; therefore designers should review the Specifications section of this data sheet carefully. Only the automotive grade product shown is available for use in automotive applications. Contact your local Analog Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for this model.

AD5304/AD5314/AD5324 Data Sheet Rev. H | Page 24 of 24 NOTES ©2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the prop erty of their respective owners. D00929-0-9/11(H)