AD521 AD | Alldatasheet
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os . egs > DEVICES Precision Instrumentation Amplifier FEATURES PIN CONFIGURATION Programmable Gains from 0.1 to 1000 Differential Inputs R High CMRR: 110dB min smwur [a] He) dam Low Drift: 2uV/°C max (L) ate] fa] 8 Complete Input Protection, Power ON and Power OFF SCALE Functionally Complete with the Addition of Two Resistors -wweut [3 | [12] sense Internally Compensated Gain Bandwidth Product: 40MHz Orreey ] [a] ner Output Current Limited: 25mA . Very Low Noise: 0.5uV p-p, 0.1Hz to 10Hz, RTI @ G = 1000 v- [5] R Chips are A ome [10] Scace Tam [8 | [9 | come, ourrut [7 | [8] v+ PRODUCT DESCRIPTION +70°C. The “S” grade guarantees performance to specification The ADS21 is a second generation, low cost, monolithic IC over the extended temperature range: ~55°C to +125°C. instrumentation amplifier developed by Analog Devices. As a PRODUCT HIGHLIGHTS oem mentation amplifier, the AD521 is a gain block with 1. “The aDS21 is a true instrumentation amplifier in integrated differential whade wane accurately programmable input/ circuit form, offering the user performance comparable to output gain relationship. many modular instrumentation amplifiers at a fraction of The ADS21 IC instrumentation amplifier should not be con- the cost. fs caren tackling Loalog Tee oe er whieh can 2. The ADS21 has low guaranteed input offset voltage drift be used as building blocks in variable gain instrumentation cave for L grade) and low noise for precision, high gain amplifier circuits. Op amps are general-purpose components PP! jons. . which, when used with precision-matched external resistors, 3. The ADS21 is functionally complete with the addition of can perform the instrumentation amplifier function. two resistors. Gain can be preset from 0.1 to more than An instrumentation amplifier is a precision differential volt- 1000. age gain device optimized for operation ina real world envi- 4. The AD521 is fully protected for input levels up to 15V ronment, and is intended to be used wherever acquisition of a beyond the supply voltages and 30V differential at the useful signal is difficult. It is characterized by high input im- inputs. pedance:t balanced differential inputs, low bias currents and 5. In lly com ted for all gains, the ADS21 also offers igh CMR. ; ; the user the provision for limiting bandwidth. As a complete instrumentation amplifier the ps2 ruree 6. Offset nulling can be achieved with an optional trim pot. ly two resistors to set its gain to any value between 0.1 an . ‘ a - 1000. The ratio matching ofthese resistors doesnot affect the "” On DIE ts specs dtc pesformance with « high CMRR (up to 120dB) or the high input impedance (3 X 100kHz (independent of gain) and a settling time of Sus 10° Q) of the ADS21. Furthermore, unlike most operational t0 0.1% of a 10V step. amplifier-based instrumentation amplifiers, the inputs are protected against overvoltages up to +15 volts beyond the supplies. The ADS521 IC instrumentation amplifier is available in four different versions of accuracy and operating temperature range. The economical “J” grade, the low drift “K” grade, and the lower drift, higher linearity “L"” grade are specified from 0 to
ADHD —— “ADS2150 MODEL ADs21JD ADS2iKD ADS21LD_ (ADS215D/9838) GAIN . . ‘Range (For Specified Operation, Note 1) 1 t0 1000 : : : Equation Ge Rg/RoV/V : : : Error from Equation (40.25-0.0046)% . ‘Nonlinearity (Note 2) Gain Temperature Coefficient, 2(3 £0.05G)ppm/°C : : £(15 20.4G)ppa/c ‘OUTPUT CHARACTERISTICS Y . Rated Ourput 210V, 210mA min : ‘Output at Maximum Operating Temperacure 210V@ SmA min : . . i ce 018 : : : : DYNAMIC RESPONSE ‘Small Signal Bandwidth (2348) Gel >2MHz . : . G=10 300kH2 . . . G=100 200kH2 . : . G= 1000 okt -° . ‘Small Signal, £1.0% Flatness . Gal 75k : : : G=10 26kH2 : . : G= 100 Dake . . : G= 1000 ‘kts . : : Full Peak Response (Note 3) 100kHz . : : Slew Rate, 16G<1000 10vius . ‘Settling Time (any 10V step to within 10mV of Final Value) Get 1s : : : Ge10 Sus . : : G= 100 10ys . . : G= 1000 35ps . . Differential Overload Recovery (#30V Input to within 10mV of Final Value) (Note 4) G= 1000 sous . . . ‘Common Mode Step Recovery (30V Input to within 10mV of Final Value) (Note 5) G= 1000 toys * . : VOLTAGE OFFSET (may be mulled) ——— TT rrr? Input Offset Voltage (Vos) mV max (2mV typ) 1 Smy max (05mV 97) L.Omy max (0.5mV typ) fe. Temperature 15uVP'C max (7uV7C typ) SuVPC max (3xVAC typ) 44V°C max ” va. Supply ead : . : Output Offset Voltage (Vso) 420mV max 200nV typ) 200mV max VOMV 9g) 100m max ” vs. Temperature 400pV/°C max (150nV/°C typ) 150uVPC max (SOUVPCryp) —-75HVP° Cmax bad vv. Supply (Note 6) 0.005V o40/% * . . INPUT CURRENTS Input Bias Current (cither inpat) S0nA max 400A max o ie ‘vs, Temperature 1nA/C max S00pA/C max - ad v3. Supply 2 . . . Input Offser Current 20nA max 10nA mex ” ‘vs. Temperature 2S0pA/C max 125pA/C max bed had TNPUT Differential Input Impedance (Note 7) 3x 10°2i11.8pF ° . ° ‘Common Mode Input Impedance (Note 8) 6 x 10'°213.0pF . . . Input Voltage Range for Specified Performance (with respect to ground) s10V . . . Maximum Voltage without Damage to Unit, Power ON ‘or OFF Differential Mode (Note 9) 30v . . . Voltage at either input (Note 9) Vs t13V . . . ‘Common Mode Rejection Ratio, DC to 60H: with 148? source unbalance Get 7048 min (7448 typ) 7448 min (808 typ) ” ” G10 904B min (9448 typ) ‘944B min (10048 typ) ” G= 100 1004B min (1044B typ) 1044B min (1144B typ) ” ” G= 1000 1004B min (11048 typ) 1104B min (12048 typ) “ + —— NOISE Voltage RTO (p-p) @ 0.1Hz to 10Hz (Note 10) Veosc + a257 uv : . . RMS RTO, 10H: to 10kH2 Vesa caw . : . Input Current, rms, 10Hz to 10kH2 15pA (rms) : : : — REFERENCE TERMINAL Bias Current SMA . . . Inpot Resistance 10M . : . Voltage Range tov . . . Gain to Ourput 1 : . : — POWER SUPPLY ‘Operating Voltage Range 45V to 218V . . . Quiescent Supply Current SmA max . . . - TEMPERATURE RANGE . ‘Specified Performance 010 «70°C . . “sstcro o128°C ‘Operating -25°C 10 +85°C : . =s8°C to #125°C Storage 63°C co +180°C . ° . - *Specieations ame ws ADS21)D. ‘sspeciflesions mune as ADSZ1KD. ‘Specifications mibject to change without notice. ae A
NOTES: mon mode signal greater than Vs -0.5V is applied to the 1. Gains below 1 and above 1000 are obtained by simply ad- inputs, transistor clamps are activated which drop the excessive justing the gain setting resistors. (Input voltage should be re- input voltage across internal input resistors. Power dissipated stricted to +10V for gains equal to or less than 1.) in these resistors causes temperature gradients and a correspon- gs ; a ding change in offset voltage, as well as an added thermal time 2. Nonlinearity is defined as the ratio of the deviation from the “best straight line” through a full scale output range of constant, but will not damage the device.) +9 volts. With a combination of high gain and +10 volt output 6. Output Offset Voltage versus Power Supply includes a swing, distortion may increase to as much as 0.3%. constant 0.005 times the unnulled output offset per percent , . . change in either power supply. If the output offset is nulled, 3. Full Peak Response is the frequency below which a typical the output offset change versus supply change is substantially amplifier will produce full output swing. reduced. 4. Differential Overload Recovery is the time it takes the ampli- 7. Differential Input Impedance is the impedance between the fier to recover from a pulsed 30V differential input with 15V two inputs. of common mode voltage, to within 10mV of final value. The oo . test input is a 30V, 10ys pulse at a 1kHz rate. (When adiffer- 8- Common Mode Input Impedance is the impedance from ential signal of greater than 11V is applied between the inputs, _¢ither input to the power supplies. transistor clamps are activated which drop the excess input 9. Maximum Input Voltage (differential or at either input) is voltage across internal input resistors. If a continuous overload = 30V when using +15V supplies. A more general specification is is maintained, power dissipated in these resistors causes temper- that neither input may exceed either supply (even when ature gradients and a corresponding change in offset voltage, Vs = 0) by more than 15V and that the difference between the as well as added thermal time constant, but will not damage two inputs must not exceed 30V. (See also Notes 4 and 5.) the device.) 10, 0.1Hz to 10Hz Peak-to-Peak Voltage Noise is defined as 5. Common Mode Step Recovery is the time it takes the amp- the maximum peak-to-peak voltage noise ovserved during 2 lifier to recover from a 30V common mode input with zero of 3 separate 10 second periods with the test circuit of Fig- volts of differential signal to within 10mV of final value. The ure 8. test input is 30V, 10ys pulse at a 1kHz rate. (When a com- ORDERING GUIDE METALIZATION PHOTOGRAPH Dimensions shown in inches and (mm). ‘Temperature Package Contact factory for latest dimensions. Model Range Description Option’ SENeE AR SCALE ‘ADS21JD (OC to +70°C | 14-Pin Ceramic DIP|D-14 necauz | mer) com ADS21KD 0°C to +70°C | 14-Pin Ceramic DIP|D-14 es ae ey : ADS21LD 0°C to +70°C ‘| 14-Pin Ceramic DIP|D-14 as [a - ADS21SD —55°C to +125°C| 14-Pin Ceramic DIP|D-14 H | i ay wd wt . ADS21SD/883B?| - 55°C to +125°C|14Pin Ceramic DIP|D-14 (| Fees = iphaal: . ADS21J Chips |0°C to +70°C | Die Sal—==4) he Ie ina ADS2IK Chips |0°C to +70°C [Die A i | |e 3 | ees ADS21S Chips _|-55°C to +125°C|Die a Te sll es 7 7 ae uh NOTES VG up [ Sh hi 'For outline information see Package Information section. oe zx eer a Sa) ld ourrur ‘Standard military drawing available. W A oo er Mo 203 458 RGA -weUT OFFSET -V, OFreeT Tr TM 0.110 (2.800)
1 Ne the output signal and are unaffected by the gain can be classi-
[toa] proportional to the gain, can be classified as input errors. Figure 3. Ground Returns for “Floating” Transducers The offset trim adjustment (pins 4 and 6, Figure 2) is associ- wa 6) A . total output offset can be reduced to zero. on Vour terminal feedback path (as well as adjusting the ratio, Rg/Rg).
- INCREARE Re TO PICK UP GAIN LOST BY A R, and Rp. This gain factor is 1 + R2/Ry.
- INPUT SIGNAL MUST BE REDUCED IN 7
Figure 4. Operating Conditions for Vin=~Vs= 10V ‘0 i | (fy in kHz, Cx in F) carefully nulled at the highest gain setting. Figure 5. Optional Compensation Circuit